From nobody Tue Nov 26 18:22:20 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1706153421; cv=none; d=zohomail.com; s=zohoarc; b=leCEKRfCalhMu6FZ3QVnmG+HplbDiQbXpsCX94XT3zCQuOqHfYsrV4Sk+5y7oAGaO81mi/Rfi8EDa77OtKGApxBkUTDCpj/QMcxsz370kdMfdZrNB1x4EbMy23CV6oxNnegtXvHv//Rxkuti+kYFE0TCUnyfEPgJgQOmE3msTp4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706153421; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2/EuEczuEHHQI36NBuE+6GuuSSyObW1vQMFrTC6nDqw=; b=SZdcyXZKwShcmht/1QrRgKCMlyZjj9JzlP0iAcjml6YWkIbX1LtKlHksnZ4puDpbtaIkt6DvpjTS0tKcQci56e+nv3MBhme/ga8dGVLhOBjU/CyvO5PEyB7z0rab8zyaw5AuHnnmo3cqXtJmBM1sEJ1nMPNF6pI7kqWFdlwnvfc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706153421981895.538642273151; Wed, 24 Jan 2024 19:30:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rSqQX-0004T4-MI; Wed, 24 Jan 2024 22:29:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rSqQQ-0004Px-W7 for qemu-devel@nongnu.org; Wed, 24 Jan 2024 22:29:12 -0500 Received: from mgamail.intel.com ([192.198.163.10]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rSqQO-0001Dy-Dx for qemu-devel@nongnu.org; Wed, 24 Jan 2024 22:29:10 -0500 Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 19:25:39 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orviesa005.jf.intel.com with ESMTP; 24 Jan 2024 19:25:33 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706153348; x=1737689348; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AYw75Pw83Xl6z3/72/UUQl/0Yl2ep50dVhLqomSF5BQ=; b=hKM5cl/+0EX8E84aPYjY2nGVvgjxppJSVIZlTYYtABo1jOrrMnJRI8ZA buJgidBsWFl0IMs2J1+MSMJSU66aCFaV7/cF3pKV4DsjjOTGI62F6tyZB z35iqfjndEgVwXdw2lTvfvtVAQUpaEwDM4R2hMaW0JWfj1uQgzGTZ1Dyt 0JAEIgWNZy/rDB83EGaOJ1ocpBWXKNN9nDZgeu6UoxScL2zo7QKuX7zcE X6kEDFuS9QXopM5F3ktjs7XDVWIF7bYZ2lzb1i8JH5JFgHnfAnlZBFWnH 6bfs6qZMltMKMub5/CgpWOLVFCTauKdxgYJgqyB/UVvw53a4OlYohtSA+ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="9428651" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="9428651" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="2085556" From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Cornelia Huck , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v4 22/66] i386/kvm: Move architectural CPUID leaf generation to separate helper Date: Wed, 24 Jan 2024 22:22:44 -0500 Message-Id: <20240125032328.2522472-23-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240125032328.2522472-1-xiaoyao.li@intel.com> References: <20240125032328.2522472-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.10; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.5, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.999, HK_RANDOM_FROM=1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1706153422363100002 Content-Type: text/plain; charset="utf-8" From: Sean Christopherson Move the architectural (for lack of a better term) CPUID leaf generation to a separate helper so that the generation code can be reused by TDX, which needs to generate a canonical VM-scoped configuration. Signed-off-by: Sean Christopherson Signed-off-by: Xiaoyao Li --- target/i386/kvm/kvm.c | 459 +++++++++++++++++++------------------ target/i386/kvm/kvm_i386.h | 3 + 2 files changed, 240 insertions(+), 222 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 64dfa6c36a88..8e3b491fb071 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -1732,6 +1732,241 @@ static void kvm_init_nested_state(CPUX86State *env) } } =20 +uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *ent= ries, + uint32_t cpuid_i) +{ + uint32_t limit, i, j; + uint32_t unused; + struct kvm_cpuid_entry2 *c; + + if (cpuid_i > KVM_MAX_CPUID_ENTRIES) { + error_report("exceeded cpuid index (%d) for entries[]", cpuid_i); + abort(); + } + + cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); + + for (i =3D 0; i <=3D limit; i++) { + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "unsupported level value: 0x%x\n", limit); + abort(); + } + c =3D &entries[cpuid_i++]; + + switch (i) { + case 2: { + /* Keep reading function 2 till all the input is received */ + int times; + + c->function =3D i; + c->flags =3D KVM_CPUID_FLAG_STATEFUL_FUNC | + KVM_CPUID_FLAG_STATE_READ_NEXT; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + times =3D c->eax & 0xff; + + for (j =3D 1; j < times; ++j) { + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:2):eax & 0xf =3D 0x%x\n", times); + abort(); + } + c =3D &entries[cpuid_i++]; + c->function =3D i; + c->flags =3D KVM_CPUID_FLAG_STATEFUL_FUNC; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->ed= x); + } + break; + } + case 0x1f: + if (env->nr_dies < 2) { + cpuid_i--; + break; + } + /* fallthrough */ + case 4: + case 0xb: + case 0xd: + for (j =3D 0; ; j++) { + if (i =3D=3D 0xd && j =3D=3D 64) { + break; + } + + c->function =3D i; + c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index =3D j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); + + if (i =3D=3D 4 && c->eax =3D=3D 0) { + break; + } + if (i =3D=3D 0xb && !(c->ecx & 0xff00)) { + break; + } + if (i =3D=3D 0x1f && !(c->ecx & 0xff00)) { + break; + } + if (i =3D=3D 0xd && c->eax =3D=3D 0) { + continue; + } + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); + abort(); + } + c =3D &entries[cpuid_i++]; + } + break; + case 0x12: + for (j =3D 0; ; j++) { + c->function =3D i; + c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index =3D j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); + + if (j > 1 && (c->eax & 0xf) !=3D 1) { + break; + } + + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:0x12,ecx:0x%x)\n", j); + abort(); + } + c =3D &entries[cpuid_i++]; + } + break; + case 0x7: + case 0x14: + case 0x1d: + case 0x1e: { + uint32_t times; + + c->function =3D i; + c->index =3D 0; + c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + times =3D c->eax; + + for (j =3D 1; j <=3D times; ++j) { + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); + abort(); + } + c =3D &entries[cpuid_i++]; + c->function =3D i; + c->index =3D j; + c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); + } + break; + } + default: + c->function =3D i; + c->flags =3D 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is miss= ing, + * so we can omit it and avoid hitting KVM's 80-entry limi= t. + */ + cpuid_i--; + } + break; + } + } + + if (limit >=3D 0x0a) { + uint32_t eax, edx; + + cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx); + + has_architectural_pmu_version =3D eax & 0xff; + if (has_architectural_pmu_version > 0) { + num_architectural_pmu_gp_counters =3D (eax & 0xff00) >> 8; + + /* Shouldn't be more than 32, since that's the number of bits + * available in EBX to tell us _which_ counters are available. + * Play it safe. + */ + if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) { + num_architectural_pmu_gp_counters =3D MAX_GP_COUNTERS; + } + + if (has_architectural_pmu_version > 1) { + num_architectural_pmu_fixed_counters =3D edx & 0x1f; + + if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNT= ERS) { + num_architectural_pmu_fixed_counters =3D MAX_FIXED_COU= NTERS; + } + } + } + } + + cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); + + for (i =3D 0x80000000; i <=3D limit; i++) { + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit); + abort(); + } + c =3D &entries[cpuid_i++]; + + switch (i) { + case 0x8000001d: + /* Query for all AMD cache information leaves */ + for (j =3D 0; ; j++) { + c->function =3D i; + c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + c->index =3D j; + cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); + + if (c->eax =3D=3D 0) { + break; + } + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "cpuid_data is full, no space for " + "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); + abort(); + } + c =3D &entries[cpuid_i++]; + } + break; + default: + c->function =3D i; + c->flags =3D 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is miss= ing, + * so we can omit it and avoid hitting KVM's 80-entry limi= t. + */ + cpuid_i--; + } + break; + } + } + + /* Call Centaur's CPUID instructions they are supported. */ + if (env->cpuid_xlevel2 > 0) { + cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unuse= d); + + for (i =3D 0xC0000000; i <=3D limit; i++) { + if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { + fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit= ); + abort(); + } + c =3D &entries[cpuid_i++]; + + c->function =3D i; + c->flags =3D 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + } + } + + return cpuid_i; +} + int kvm_arch_init_vcpu(CPUState *cs) { struct { @@ -1748,8 +1983,7 @@ int kvm_arch_init_vcpu(CPUState *cs) =20 X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; - uint32_t limit, i, j, cpuid_i; - uint32_t unused; + uint32_t cpuid_i; struct kvm_cpuid_entry2 *c; uint32_t signature[3]; int kvm_base =3D KVM_CPUID_SIGNATURE; @@ -1902,8 +2136,6 @@ int kvm_arch_init_vcpu(CPUState *cs) c->edx =3D env->features[FEAT_KVM_HINTS]; } =20 - cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); - if (cpu->kvm_pv_enforce_cpuid) { r =3D kvm_vcpu_enable_cap(cs, KVM_CAP_ENFORCE_PV_FEATURE_CPUID, 0,= 1); if (r < 0) { @@ -1914,224 +2146,7 @@ int kvm_arch_init_vcpu(CPUState *cs) } } =20 - for (i =3D 0; i <=3D limit; i++) { - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported level value: 0x%x\n", limit); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - - switch (i) { - case 2: { - /* Keep reading function 2 till all the input is received */ - int times; - - c->function =3D i; - c->flags =3D KVM_CPUID_FLAG_STATEFUL_FUNC | - KVM_CPUID_FLAG_STATE_READ_NEXT; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - times =3D c->eax & 0xff; - - for (j =3D 1; j < times; ++j) { - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:2):eax & 0xf =3D 0x%x\n", times); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - c->function =3D i; - c->flags =3D KVM_CPUID_FLAG_STATEFUL_FUNC; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->ed= x); - } - break; - } - case 0x1f: - if (env->nr_dies < 2) { - cpuid_i--; - break; - } - /* fallthrough */ - case 4: - case 0xb: - case 0xd: - for (j =3D 0; ; j++) { - if (i =3D=3D 0xd && j =3D=3D 64) { - break; - } - - c->function =3D i; - c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index =3D j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); - - if (i =3D=3D 4 && c->eax =3D=3D 0) { - break; - } - if (i =3D=3D 0xb && !(c->ecx & 0xff00)) { - break; - } - if (i =3D=3D 0x1f && !(c->ecx & 0xff00)) { - break; - } - if (i =3D=3D 0xd && c->eax =3D=3D 0) { - continue; - } - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - } - break; - case 0x12: - for (j =3D 0; ; j++) { - c->function =3D i; - c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index =3D j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); - - if (j > 1 && (c->eax & 0xf) !=3D 1) { - break; - } - - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x12,ecx:0x%x)\n", j); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - } - break; - case 0x7: - case 0x14: - case 0x1d: - case 0x1e: { - uint32_t times; - - c->function =3D i; - c->index =3D 0; - c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - times =3D c->eax; - - for (j =3D 1; j <=3D times; ++j) { - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - c->function =3D i; - c->index =3D j; - c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); - } - break; - } - default: - c->function =3D i; - c->flags =3D 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - if (!c->eax && !c->ebx && !c->ecx && !c->edx) { - /* - * KVM already returns all zeroes if a CPUID entry is miss= ing, - * so we can omit it and avoid hitting KVM's 80-entry limi= t. - */ - cpuid_i--; - } - break; - } - } - - if (limit >=3D 0x0a) { - uint32_t eax, edx; - - cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx); - - has_architectural_pmu_version =3D eax & 0xff; - if (has_architectural_pmu_version > 0) { - num_architectural_pmu_gp_counters =3D (eax & 0xff00) >> 8; - - /* Shouldn't be more than 32, since that's the number of bits - * available in EBX to tell us _which_ counters are available. - * Play it safe. - */ - if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) { - num_architectural_pmu_gp_counters =3D MAX_GP_COUNTERS; - } - - if (has_architectural_pmu_version > 1) { - num_architectural_pmu_fixed_counters =3D edx & 0x1f; - - if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNT= ERS) { - num_architectural_pmu_fixed_counters =3D MAX_FIXED_COU= NTERS; - } - } - } - } - - cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); - - for (i =3D 0x80000000; i <=3D limit; i++) { - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - - switch (i) { - case 0x8000001d: - /* Query for all AMD cache information leaves */ - for (j =3D 0; ; j++) { - c->function =3D i; - c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - c->index =3D j; - cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->ed= x); - - if (c->eax =3D=3D 0) { - break; - } - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "cpuid_data is full, no space for " - "cpuid(eax:0x%x,ecx:0x%x)\n", i, j); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - } - break; - default: - c->function =3D i; - c->flags =3D 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - if (!c->eax && !c->ebx && !c->ecx && !c->edx) { - /* - * KVM already returns all zeroes if a CPUID entry is miss= ing, - * so we can omit it and avoid hitting KVM's 80-entry limi= t. - */ - cpuid_i--; - } - break; - } - } - - /* Call Centaur's CPUID instructions they are supported. */ - if (env->cpuid_xlevel2 > 0) { - cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unuse= d); - - for (i =3D 0xC0000000; i <=3D limit; i++) { - if (cpuid_i =3D=3D KVM_MAX_CPUID_ENTRIES) { - fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit= ); - abort(); - } - c =3D &cpuid_data.entries[cpuid_i++]; - - c->function =3D i; - c->flags =3D 0; - cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); - } - } - + cpuid_i =3D kvm_x86_arch_cpuid(env, cpuid_data.entries, cpuid_i); cpuid_data.cpuid.nent =3D cpuid_i; =20 if (((env->cpuid_version >> 8)&0xF) >=3D 6 diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h index c3ef46a97a7b..cbf52c1c6d17 100644 --- a/target/i386/kvm/kvm_i386.h +++ b/target/i386/kvm/kvm_i386.h @@ -24,6 +24,9 @@ #define kvm_ioapic_in_kernel() \ (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) =20 +uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *ent= ries, + uint32_t cpuid_i); + #else =20 #define kvm_pit_in_kernel() 0 --=20 2.34.1