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Iglesias" , Rob Herring , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 8/8] hw/arm/zynq: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:42 +0100 Message-ID: <20240123063842.35255-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1705992001480100001 Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/xilinx_zynq.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 66d0de139f..6ec65d4780 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -355,6 +355,10 @@ static void zynq_init(MachineState *machine) =20 static void zynq_machine_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] =3D { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc =3D MACHINE_CLASS(oc); mc->desc =3D "Xilinx Zynq Platform Baseboard for Cortex-A9"; mc->init =3D zynq_init; @@ -362,6 +366,7 @@ static void zynq_machine_class_init(ObjectClass *oc, vo= id *data) mc->no_sdcard =3D 1; mc->ignore_memory_transaction_failures =3D true; mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types =3D valid_cpu_types; mc->default_ram_id =3D "zynq.ext_ram"; } =20 --=20 2.41.0