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a="761646631" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="761646631" From: Zhenzhong Duan To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: eric.auger@redhat.com, jean-philippe@linaro.org, alex.williamson@redhat.com, clg@redhat.com, peterx@redhat.com, jasowang@redhat.com, mst@redhat.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan Subject: [PATCH 1/3] virtio_iommu: Clear IOMMUPciBus pointer cache when system reset Date: Mon, 22 Jan 2024 14:40:13 +0800 Message-Id: <20240122064015.94630-2-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240122064015.94630-1-zhenzhong.duan@intel.com> References: <20240122064015.94630-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.11; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.287, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1705905807362100001 Content-Type: text/plain; charset="utf-8" IOMMUPciBus pointer cache is indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to endpoint binding to wrong iommu MR in virtio_iommu_get_endpoint(), then vfio device setup wrong mapping from other device. Signed-off-by: Zhenzhong Duan --- hw/virtio/virtio-iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 8a4bd933c6..bfce3237f3 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1264,6 +1264,8 @@ static void virtio_iommu_system_reset(void *opaque) =20 trace_virtio_iommu_system_reset(); =20 + memset(s->iommu_pcibus_by_bus_num, 0, sizeof(s->iommu_pcibus_by_bus_nu= m)); + /* * config.bypass is sticky across device reset, but should be restored= on * system reset --=20 2.34.1 From nobody Tue Nov 26 17:27:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1705905837; cv=none; d=zohomail.com; s=zohoarc; b=ibN0xhy6ewLS5G+8WqzaoXDaBGyImONxTXRET47FfxajfptSufkh7MlQJM0imjEUGdvrSCODz93a4wUc7bCQkdUgZmYlkx/b7oQif88AHAIRicT4Hktx32BDW6Uj/84124QchG/O05I5ccZ3K18o68hQcPOxMSJON8MagS/YJ2o= ARC-Message-Signature: i=1; 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Mon, 22 Jan 2024 01:43:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rRo1D-0005A1-Il; Mon, 22 Jan 2024 01:42:51 -0500 Received: from mgamail.intel.com ([198.175.65.11]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rRo19-0007FD-Nl; Mon, 22 Jan 2024 01:42:50 -0500 Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2024 22:42:44 -0800 Received: from spr-s2600bt.bj.intel.com ([10.240.192.124]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2024 22:42:34 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705905768; x=1737441768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sd2qhbDS+R0CvE0gfiTA/WvHWETVcnWh56P7wXLnVzg=; b=Qg9Ne1HPrhPMl62g8DvvVkN4Gy/dDZ17xtSM+utGPWDh6BKqWoeOqakm uk+sB0hNeza7FVloYH1vvzFJfO39zV6Ze9LGoqcAL5HVZYhkS6G7oDTgN sGBu4xUtn+6JyEnrWRFHvjOLREJyU3hS0qSAyNEzaNTRaGpB1V5SVR2xF aJFCshTPCv7QQD34PgfZe/Zr9dl6ovLqd3X5szgCES4abi6KOIcBlnS48 DkjYq3rXARqrmSGt1G6XBOmbUP/Q16XFtpl4vsZoEKVAXGBMM1aB5guwo ODzyvPz8zJQxZqqqf9TasI9sZQGQQxmJU7jFS6iELV+IX1LFiansvslEB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="7792088" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="7792088" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="761646691" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="761646691" From: Zhenzhong Duan To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: eric.auger@redhat.com, jean-philippe@linaro.org, alex.williamson@redhat.com, clg@redhat.com, peterx@redhat.com, jasowang@redhat.com, mst@redhat.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan , Richard Henderson , Peter Maydell , Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Helge Deller , Andrey Smirnov , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Nicholas Piggin , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Mark Cave-Ayland , BALATON Zoltan , Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora , Elena Ufimtseva , Jagannathan Raman , Matthew Rosato , Eric Farman , Thomas Huth , Halil Pasic , Christian Borntraeger , David Hildenbrand , Ilya Leoshkevich , qemu-ppc@nongnu.org (open list:PowerNV Non-Virt...), qemu-s390x@nongnu.org (open list:S390 PCI) Subject: [PATCH 2/3] hw/pci: Add two parameters to get_address_space Date: Mon, 22 Jan 2024 14:40:14 +0800 Message-Id: <20240122064015.94630-3-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240122064015.94630-1-zhenzhong.duan@intel.com> References: <20240122064015.94630-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.11; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.287, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1705905839668100001 Content-Type: text/plain; charset="utf-8" This adds PCI device's real bus and devfn to API get_address_space(), for vIOMMU which also wants real BDF, i.e., virtio-iommu. Signed-off-by: Zhenzhong Duan --- include/hw/pci/pci.h | 11 ++++++++--- hw/alpha/typhoon.c | 3 ++- hw/arm/smmu-common.c | 3 ++- hw/i386/amd_iommu.c | 6 ++++-- hw/i386/intel_iommu.c | 6 ++++-- hw/pci-host/astro.c | 3 ++- hw/pci-host/designware.c | 3 ++- hw/pci-host/dino.c | 3 ++- hw/pci-host/pnv_phb3.c | 3 ++- hw/pci-host/pnv_phb4.c | 3 ++- hw/pci-host/ppce500.c | 3 ++- hw/pci-host/raven.c | 3 ++- hw/pci-host/sabre.c | 3 ++- hw/pci/pci.c | 3 ++- hw/ppc/ppc440_pcix.c | 3 ++- hw/ppc/spapr_pci.c | 3 ++- hw/remote/iommu.c | 3 ++- hw/s390x/s390-pci-bus.c | 3 ++- hw/virtio/virtio-iommu.c | 3 ++- 19 files changed, 48 insertions(+), 23 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index fa6313aabc..2483d61a8c 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -378,13 +378,18 @@ typedef struct PCIIOMMUOps { * * Mandatory callback which returns a pointer to an #AddressSpace * - * @bus: the #PCIBus being accessed. + * @bus: the aliased #PCIBus being accessed. * * @opaque: the data passed to pci_setup_iommu(). * - * @devfn: device and function number + * @devfn: aliased device and function number + * + * @real_bus: the #PCIBus being accessed. + * + * @real_devfn: device and function number */ - AddressSpace * (*get_address_space)(PCIBus *bus, void *opaque, int devf= n); + AddressSpace * (*get_address_space)(PCIBus *bus, void *opaque, int devf= n, + PCIBus *real_bus, int real_devfn); } PCIIOMMUOps; =20 AddressSpace *pci_device_iommu_address_space(PCIDevice *dev); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index e8711ae16a..eda5a1c391 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -732,7 +732,8 @@ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemor= yRegion *iommu, return ret; } =20 -static AddressSpace *typhoon_pci_dma_iommu(PCIBus *bus, void *opaque, int = devfn) +static AddressSpace *typhoon_pci_dma_iommu(PCIBus *bus, void *opaque, int = devfn, + PCIBus *real_bus, int real_devf= n) { TyphoonState *s =3D opaque; return &s->pchip.iommu_as; diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 9a8ac45431..c3a8f84c38 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -569,7 +569,8 @@ SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t= bus_num) return NULL; } =20 -static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) +static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn, + PCIBus *real_bus, int real_devfn) { SMMUState *s =3D opaque; SMMUPciBus *sbus =3D g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus= ); diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 4203144da9..0cc63fd050 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1390,7 +1390,8 @@ static const MemoryRegionOps amdvi_ir_ops =3D { } }; =20 -static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int d= evfn) +static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int d= evfn, + PCIBus *real_bus, int real_devfn) { char name[128]; AMDVIState *s =3D opaque; @@ -1578,7 +1579,8 @@ static void amdvi_sysbus_realize(DeviceState *dev, Er= ror **errp) } =20 /* Pseudo address space under root PCI bus. */ - x86ms->ioapic_as =3D amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVI= D); + x86ms->ioapic_as =3D amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVI= D, + NULL, 0); =20 /* set up MMIO */ memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mm= io", diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 1a07faddb4..9d8c8e1d03 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4094,7 +4094,8 @@ static void vtd_reset(DeviceState *dev) vtd_address_space_refresh_all(s); } =20 -static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int dev= fn) +static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int dev= fn, + PCIBus *real_bus, int real_devfn) { IntelIOMMUState *s =3D opaque; VTDAddressSpace *vtd_as; @@ -4233,7 +4234,8 @@ static void vtd_realize(DeviceState *dev, Error **err= p) vtd_init(s); pci_setup_iommu(bus, &vtd_iommu_ops, dev); /* Pseudo address space under root PCI bus. */ - x86ms->ioapic_as =3D vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPI= C); + x86ms->ioapic_as =3D vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPI= C, + NULL, 0); qemu_add_machine_init_done_notifier(&vtd_machine_done_notify); } =20 diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 37d271118c..c6c0f3f95f 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -337,7 +337,8 @@ static IOMMUTLBEntry astro_translate_iommu(IOMMUMemoryR= egion *iommu, } =20 static AddressSpace *elroy_pcihost_set_iommu(PCIBus *bus, void *opaque, - int devfn) + int devfn, + PCIBus *real_bus, int real_de= vfn) { ElroyState *s =3D opaque; return &s->astro->iommu_as; diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index dd9e389c07..fc652e6609 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -656,7 +656,8 @@ static const MemoryRegionOps designware_pci_mmio_ops = =3D { }; =20 static AddressSpace *designware_pcie_host_set_iommu(PCIBus *bus, void *opa= que, - int devfn) + int devfn, PCIBus *rea= l_bus, + int real_devfn) { DesignwarePCIEHost *s =3D DESIGNWARE_PCIE_HOST(opaque); =20 diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c index d992c4bb69..45f8784b2b 100644 --- a/hw/pci-host/dino.c +++ b/hw/pci-host/dino.c @@ -347,7 +347,8 @@ static const MemoryRegionOps dino_config_addr_ops =3D { }; =20 static AddressSpace *dino_pcihost_set_iommu(PCIBus *bus, void *opaque, - int devfn) + int devfn, PCIBus *real_bus, + int real_devfn) { DinoState *s =3D opaque; =20 diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 2a74dbe45f..a0c4235fae 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -935,7 +935,8 @@ static const MemoryRegionOps pnv_phb3_msi_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN }; =20 -static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int dev= fn) +static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int dev= fn, + PCIBus *real_bus, int real_devfn) { PnvPHB3 *phb =3D opaque; PnvPhb3DMASpace *ds; diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 075499d36d..fee34f376e 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1450,7 +1450,8 @@ static PnvPhb4DMASpace *pnv_phb4_dma_find(PnvPHB4 *ph= b, PCIBus *bus, int devfn) return ds; } =20 -static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int dev= fn) +static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int dev= fn, + PCIBus *real_bus, int real_devfn) { PnvPHB4 *phb =3D opaque; PnvPhb4DMASpace *ds; diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index fa0d67b342..52c17a8a02 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -428,7 +428,8 @@ static void e500_pcihost_bridge_realize(PCIDevice *d, E= rror **errp) } =20 static AddressSpace *e500_pcihost_set_iommu(PCIBus *bus, void *opaque, - int devfn) + int devfn, PCIBus *real_bus, + int real_devfn) { PPCE500PCIState *s =3D opaque; =20 diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index c7a0a2878a..d1b7c1a847 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -216,7 +216,8 @@ static void raven_set_irq(void *opaque, int irq_num, in= t level) } =20 static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque, - int devfn) + int devfn, PCIBus *real_bus, + int real_devfn) { PREPPCIState *s =3D opaque; =20 diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index d0851b48b0..c82c62c640 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -105,7 +105,8 @@ static inline void sabre_clear_request(SabreState *s, u= nsigned int irq_num) s->irq_request =3D NO_IRQ_REQUEST; } =20 -static AddressSpace *sabre_pci_dma_iommu(PCIBus *bus, void *opaque, int de= vfn) +static AddressSpace *sabre_pci_dma_iommu(PCIBus *bus, void *opaque, int de= vfn, + PCIBus *real_bus, int real_devfn) { IOMMUState *is =3D opaque; =20 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 76080af580..2f91b87559 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2719,7 +2719,8 @@ AddressSpace *pci_device_iommu_address_space(PCIDevic= e *dev) } if (!pci_bus_bypass_iommu(bus) && iommu_bus->iommu_ops) { return iommu_bus->iommu_ops->get_address_space(bus, - iommu_bus->iommu_opaque, devfn); + iommu_bus->iommu_opaque, devfn, + pci_get_bus(dev), dev->devfn); } return &address_space_memory; } diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index df4ee374d0..ea8fa28699 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -442,7 +442,8 @@ static void ppc440_pcix_set_irq(void *opaque, int irq_n= um, int level) qemu_set_irq(*pci_irq, level); } =20 -static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b, void *opaque, int de= vfn) +static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b, void *opaque, int de= vfn, + PCIBus *real_bus, int real_devf= n) { PPC440PCIXState *s =3D opaque; =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 25e0295d6f..4a2893c845 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -773,7 +773,8 @@ static const MemoryRegionOps spapr_msi_ops =3D { /* * PHB PCI device */ -static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int de= vfn) +static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int de= vfn, + PCIBus *real_bus, int real_devfn) { SpaprPhbState *phb =3D opaque; =20 diff --git a/hw/remote/iommu.c b/hw/remote/iommu.c index 7c56aad0fc..7e71647e79 100644 --- a/hw/remote/iommu.c +++ b/hw/remote/iommu.c @@ -37,7 +37,8 @@ */ =20 static AddressSpace *remote_iommu_find_add_as(PCIBus *pci_bus, - void *opaque, int devfn) + void *opaque, int devfn, + PCIBus *real_bus, int real_d= evfn) { RemoteIommu *iommu =3D opaque; RemoteIommuElem *elem =3D NULL; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 347580ebac..00de41df69 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -644,7 +644,8 @@ static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s= , PCIBus *bus, return iommu; } =20 -static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int dev= fn) +static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int dev= fn, + PCIBus *real_bus, int real_devfn) { S390pciState *s =3D opaque; S390PCIIOMMU *iommu =3D s390_pci_get_iommu(s, bus, devfn); diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index bfce3237f3..d99c1f0d64 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -395,7 +395,8 @@ static void add_prop_resv_regions(IOMMUDevice *sdev) } =20 static AddressSpace *virtio_iommu_find_add_as(PCIBus *bus, void *opaque, - int devfn) + int devfn, PCIBus *real_bus, + int real_devfn) { VirtIOIOMMU *s =3D opaque; IOMMUPciBus *sbus =3D g_hash_table_lookup(s->as_by_busptr, bus); --=20 2.34.1 From nobody Tue Nov 26 17:27:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1705905842; cv=none; d=zohomail.com; s=zohoarc; b=WOc/SD0tCwop5epE9jrGLzlZov6MlxNLDBYvc8azm3vsG5DuidrLpfdfM8rWZIQtRhSJQt0cys/3ZAZQNTbZSLFD4RjwFJMq0nuYQHLrHksbr8dzQeFxDOdNaM1PqHWuTeQq3uG1b05IiKKyL5/uT8p2JfoOSDCE0IUjpJ/9RhE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1705905842; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="7792107" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="7792107" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="761646713" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="761646713" From: Zhenzhong Duan To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: eric.auger@redhat.com, jean-philippe@linaro.org, alex.williamson@redhat.com, clg@redhat.com, peterx@redhat.com, jasowang@redhat.com, mst@redhat.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan Subject: [PATCH 3/3] virtio-iommu: Support PCI device aliases Date: Mon, 22 Jan 2024 14:40:15 +0800 Message-Id: <20240122064015.94630-4-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240122064015.94630-1-zhenzhong.duan@intel.com> References: <20240122064015.94630-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.11; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.287, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1705905843488100001 Content-Type: text/plain; charset="utf-8" Currently virtio-iommu doesn't work well if there are multiple devices in same iommu group. In below example config, guest virtio-iommu driver can successfully probe first device but fail on others. Only one device under the bridge can work normally. -device virtio-iommu \ -device pcie-pci-bridge,id=3Droot0 \ -device vfio-pci,host=3D81:11.0,bus=3Droot0 \ -device vfio-pci,host=3D6f:01.0,bus=3Droot0 \ The reason is virtio-iommu stores AS(address space) in hash table with aliased BDF and corelates endpoint which is indexed by device's real BDF, i.e., virtio_iommu_mr() is passed a real BDF to lookup AS hash table, we either get wrong AS or NULL. Fix it by storing AS indexed by real BDF. This way also make iova_ranges from vfio device stored in IOMMUDevice of real BDF successfully. Signed-off-by: Zhenzhong Duan --- hw/virtio/virtio-iommu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index d99c1f0d64..6880d92a44 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -399,27 +399,27 @@ static AddressSpace *virtio_iommu_find_add_as(PCIBus = *bus, void *opaque, int real_devfn) { VirtIOIOMMU *s =3D opaque; - IOMMUPciBus *sbus =3D g_hash_table_lookup(s->as_by_busptr, bus); + IOMMUPciBus *sbus =3D g_hash_table_lookup(s->as_by_busptr, real_bus); static uint32_t mr_index; IOMMUDevice *sdev; =20 if (!sbus) { sbus =3D g_malloc0(sizeof(IOMMUPciBus) + sizeof(IOMMUDevice *) * PCI_DEVFN_MAX); - sbus->bus =3D bus; - g_hash_table_insert(s->as_by_busptr, bus, sbus); + sbus->bus =3D real_bus; + g_hash_table_insert(s->as_by_busptr, real_bus, sbus); } =20 - sdev =3D sbus->pbdev[devfn]; + sdev =3D sbus->pbdev[real_devfn]; if (!sdev) { char *name =3D g_strdup_printf("%s-%d-%d", TYPE_VIRTIO_IOMMU_MEMORY_REGION, - mr_index++, devfn); - sdev =3D sbus->pbdev[devfn] =3D g_new0(IOMMUDevice, 1); + mr_index++, real_devfn); + sdev =3D sbus->pbdev[real_devfn] =3D g_new0(IOMMUDevice, 1); =20 sdev->viommu =3D s; - sdev->bus =3D bus; - sdev->devfn =3D devfn; + sdev->bus =3D real_bus; + sdev->devfn =3D real_devfn; =20 trace_virtio_iommu_init_iommu_mr(name); =20 --=20 2.34.1