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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id m14-20020adff38e000000b003379b549a00sm10091357wro.10.2024.01.16.07.12.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jan 2024 07:12:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705417958; x=1706022758; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=imXpClTBvGaeRVjAbq6Mzb0EDwuvuLXSMLzsw/Tl9kw=; b=wDiT0omG4gFDmMebYCmyilSH2yZ+6c6LmFpcltBk+oN/aYNDIdZ+qeKbkiQo3aGtw9 8TUWi/BZqX7x2AFXKA1OjxovJLbAsmioFcI/YrcRV3ezCiBK3JEAXD6f+Pcz2UMQvi0V FcmVsAWsaPT0GV2tKtzgwexQX9rrkpwyea3NTR5pYyDdHzZrkzOS6Ysh1aTCon+Wh0or 9eNfFjcIsboKOItG5vNVDCEIY6ioZO5sSjoJhSxxQf/xAropFJN/PbClERV+zG3tBkqp 1LApfrFUBCrb+eJWCqxeXyW2lmWjjkPwJ8Y/9yrV/DuvSVzBxrUiqI9dqu8yaBxqYqKM BraA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705417958; x=1706022758; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=imXpClTBvGaeRVjAbq6Mzb0EDwuvuLXSMLzsw/Tl9kw=; b=ZwUMhvspXwo+/suRnzAzbS4k7p1mH0WTXfNL77fn+rKkYECsVvxNpEGQH6MZjpiE41 P69iZivfc4+BV7cKy5qGOF43UXkz1cnKMIi5DvYfYBpI+iEzo1fkurCU7ary72vvWpT2 TWIchpuY9sLQ0F342rmHVUU6LIsLNiFrfJwmcUgHwbR+RVE3630oK1hEeVX8tE2ZsDJz xamanz0qsCIg62sA1C4IHprke3HounKXpRVlk3X/YoLma8OHPEW2H6LgrVwtdRgFmoOC ZnCMCa1ccFu4457e8VAuleWglDJDs5OvK/R8a66aJP3MqZUGk53wFj/LdNWxwG0/WsAF XGBQ== X-Gm-Message-State: AOJu0Yznu3CYMKVVAL5gkVWtv1lMjSA9Le5Q6JIght+BEw0/vwkRf1FU IlQarVolmVg7CeEL2X6jemA7TVU7tzq8Kjt6/ucj/pPitv0= X-Google-Smtp-Source: AGHT+IH15tv1+Skl2XmMtj0Y5xmvHlLoHKFTWFeZ4Wd7bI0uh5ds0MTtNYoowItZISN/z7dNyXFLCw== X-Received: by 2002:adf:e489:0:b0:336:d8c3:a65c with SMTP id i9-20020adfe489000000b00336d8c3a65cmr4026189wrm.36.1705417957778; Tue, 16 Jan 2024 07:12:37 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/21] hw/arm/virt: Consolidate valid CPU types Date: Tue, 16 Jan 2024 15:12:27 +0000 Message-Id: <20240116151228.2430754-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240116151228.2430754-1-peter.maydell@linaro.org> References: <20240116151228.2430754-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1705418105170100003 Content-Type: text/plain; charset="utf-8" From: Gavin Shan It's found that some of the CPU type names in the array of valid CPU types are invalid because their corresponding classes aren't registered, as reported by Peter Maydell. [gshan@gshan build]$ ./qemu-system-arm -machine virt -cpu cortex-a9 qemu-system-arm: Invalid CPU model: cortex-a9 The valid models are: cortex-a7, cortex-a15, (null), (null), (null), (null), (null), (null), (null), (null), (null), (null), (null), max Fix it by consolidating the array of valid CPU types. After it's applied, we have the following output when TCG is enabled. [gshan@gshan build]$ ./qemu-system-arm -machine virt -cpu cortex-a9 qemu-system-arm: Invalid CPU model: cortex-a9 The valid models are: cortex-a7, cortex-a15, max [gshan@gshan build]$ ./qemu-system-aarch64 -machine virt -cpu cortex-a9 qemu-system-aarch64: Invalid CPU model: cortex-a9 The valid models are: cortex-a7, cortex-a15, cortex-a35, cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, cortex-a57, max Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2084 Reported-by: Peter Maydell Signed-off-by: Gavin Shan Reviewed-by: Cornelia Huck Message-id: 20240111051054.83304-1-gshan@redhat.com Fixes: fa8c617791 ("hw/arm/virt: Check CPU type in machine_run_board_init()= ") Signed-off-by: Gavin Shan Signed-off-by: Peter Maydell --- hw/arm/virt.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2793121cb41..5cbc69dff83 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2905,6 +2905,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) #ifdef CONFIG_TCG ARM_CPU_TYPE_NAME("cortex-a7"), ARM_CPU_TYPE_NAME("cortex-a15"), +#ifdef TARGET_AARCH64 ARM_CPU_TYPE_NAME("cortex-a35"), ARM_CPU_TYPE_NAME("cortex-a55"), ARM_CPU_TYPE_NAME("cortex-a72"), @@ -2914,12 +2915,15 @@ static void virt_machine_class_init(ObjectClass *oc= , void *data) ARM_CPU_TYPE_NAME("neoverse-n1"), ARM_CPU_TYPE_NAME("neoverse-v1"), ARM_CPU_TYPE_NAME("neoverse-n2"), -#endif +#endif /* TARGET_AARCH64 */ +#endif /* CONFIG_TCG */ +#ifdef TARGET_AARCH64 ARM_CPU_TYPE_NAME("cortex-a53"), ARM_CPU_TYPE_NAME("cortex-a57"), #if defined(CONFIG_KVM) || defined(CONFIG_HVF) ARM_CPU_TYPE_NAME("host"), -#endif +#endif /* CONFIG_KVM || CONFIG_HVF */ +#endif /* TARGET_AARCH64 */ ARM_CPU_TYPE_NAME("max"), NULL }; --=20 2.34.1