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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=daniel@0x0f.com; helo=mail-pj1-x1032.google.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, URIBL_SBL_A=0.1 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Mon, 15 Jan 2024 09:02:29 -0500 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @0x0f.com) X-ZM-MESSAGEID: 1705327388421100003 Content-Type: text/plain; charset="utf-8" From the 68010 a word with the frame format and exception vector are placed on the stack before the PC and SR. M68K_FEATURE_QUAD_MULDIV is currently checked to workout if to do this or not for the configured CPU but that flag isn't set for 68010 so currently the exception stack when 68010 is configured is incorrect. It seems like checking M68K_FEATURE_MOVEFROMSR_PRIV would do but adding a new flag that shows exactly what is going on here is maybe clearer. Add a new flag for the behaviour, M68K_FEATURE_EXCEPTION_FORMAT_VEC, and set it for 68010 and above, and then use it to control if the format and vector word are pushed/pop during exception entry/exit. Signed-off-by: Daniel Palmer Reviewed-by: Laurent Vivier Reviewed-by: Thomas Huth --- target/m68k/cpu.c | 4 +++- target/m68k/cpu.h | 2 ++ target/m68k/op_helper.c | 4 ++-- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 1421e77c2c07..20718944b4c8 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -137,7 +137,8 @@ static void m68000_cpu_initfn(Object *obj) } =20 /* - * Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD + * Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD, + * format+vector in exception frame. */ static void m68010_cpu_initfn(Object *obj) { @@ -150,6 +151,7 @@ static void m68010_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_BKPT); m68k_set_feature(env, M68K_FEATURE_MOVEC); m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); + m68k_set_feature(env, M68K_FEATURE_EXCEPTION_FORMAT_VEC); } =20 /* diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index d13427b0fe61..0fc591e618f6 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -549,6 +549,8 @@ enum m68k_features { M68K_FEATURE_TRAPCC, /* MOVE from SR privileged (from 68010) */ M68K_FEATURE_MOVEFROMSR_PRIV, + /* Exception frame with format+vector (from 68010) */ + M68K_FEATURE_EXCEPTION_FORMAT_VEC, }; =20 static inline bool m68k_feature(CPUM68KState *env, int feature) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 1ce850bbc594..b09771672dec 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -52,7 +52,7 @@ throwaway: sp +=3D 2; env->pc =3D cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp +=3D 4; - if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) { + if (m68k_feature(env, M68K_FEATURE_EXCEPTION_FORMAT_VEC)) { /* all except 68000 */ fmt =3D cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp +=3D 2; @@ -256,7 +256,7 @@ static inline void do_stack_frame(CPUM68KState *env, ui= nt32_t *sp, uint16_t format, uint16_t sr, uint32_t addr, uint32_t retaddr) { - if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) { + if (m68k_feature(env, M68K_FEATURE_EXCEPTION_FORMAT_VEC)) { /* all except 68000 */ CPUState *cs =3D env_cpu(env); switch (format) { --=20 2.43.0