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Sun, 14 Jan 2024 22:31:49 -0800 (PST) From: Akihiko Odaki Date: Mon, 15 Jan 2024 15:31:26 +0900 Subject: [PATCH v9 1/4] hw/riscv: Use misa_mxl instead of misa_mxl_max MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240115-riscv-v9-1-ff171e1aedc8@daynix.com> References: <20240115-riscv-v9-0-ff171e1aedc8@daynix.com> In-Reply-To: <20240115-riscv-v9-0-ff171e1aedc8@daynix.com> To: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , =?utf-8?q?Alex_Benn=C3=A9e?= , Mikhail Tyutin , Aleksandr Anenkov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Fabiano Rosas Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Akihiko Odaki X-Mailer: b4 0.12.3 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=2607:f8b0:4864:20::42e; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x42e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @daynix-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1705300395679100001 A later commit requires one extra step to retrieve misa_mxl_max. As misa_mxl is semantically more correct and does not need such a extra step, refer to misa_mxl instead. Below is the explanation why misa_mxl is more semantically correct to refer to than misa_mxl_max in this case. Currently misa_mxl always equals to misa_mxl_max so it does not matter which of misa_mxl or misa_mxl_max to refer to. However, it is possible to have different values for misa_mxl and misa_mxl_max if QEMU gains a new feature to load a RV32 kernel on a RV64 system, for example. For such a behavior, the real system will need the firmware to switch MXL to RV32, and if QEMU implements the same behavior, mxl will represent the MXL that corresponds to the kernel being loaded. Therefore, it is more appropriate to refer to mxl instead of misa_mxl_max when misa_mxl !=3D misa_mxl_max. Signed-off-by: Akihiko Odaki --- hw/riscv/boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 0ffca05189f0..bc67c0bd1890 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -36,7 +36,7 @@ =20 bool riscv_is_32bit(RISCVHartArrayState *harts) { - return harts->harts[0].env.misa_mxl_max =3D=3D MXL_RV32; + return harts->harts[0].env.misa_mxl =3D=3D MXL_RV32; } =20 /* --=20 2.43.0