From nobody Sat Sep 21 07:33:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=ilande.co.uk Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1705065586563407.6476563485884; Fri, 12 Jan 2024 05:19:46 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOHOF-0004R1-Fv; Fri, 12 Jan 2024 08:16:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOHO5-0003zA-5o for qemu-devel@nongnu.org; Fri, 12 Jan 2024 08:15:54 -0500 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOHO3-0008Ng-H1 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 08:15:52 -0500 Received: from [2a02:8012:c93d:0:260e:bf57:a4e9:8142] (helo=cheesecake.fritz.box) by mail.ilande.co.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1rOHNN-0009Gy-1x; Fri, 12 Jan 2024 13:15:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=ilande.co.uk; s=20220518; h=Subject:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:To:From:Sender:Reply-To:Cc: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=clhDSjKwvvLWs0WuVzpbQyYiAfdqFG7d8092GY9OHes=; b=Hsbp6+AJ0wCjeQRFY7ZI4tcXt/ +23tdyjo44oxvE7qOz5XWev6txdeGawyDOc0o9A9NXZdrJXfTkJAPUrXZPl3mNGX6PrOu3xykwss+ VoXPDYv2ABxwaL7awUlSl/qob7ChfEp3gSWgW9d48QhiRKBuTV97dd4VdieSnDm7uNPtgwGWVPS05 wZXA7xOskul8lVbbKV4iGsE72eOOkQN3xRsglc6vps/uPJxkYb5jfi4j7VoWDm2merRfS+ZcbMKtE 93lSHiAawpltWwRAVnGyyKnoDUBP2iQkGBFQgm2p6boBwcy/ol0C2ozrcxJjhumU3CHBJs9XE51hI QTLd8dngOqI+gfk9XhuN7xgOZ9NuTybwnW3NOdcEsnu49oY/U6XhoIzj9GQ1IomzZ88oMnjK+3nfc 88gO1aJ7ZfS9HGaZ1MB2ytyUcXIjLeViKU5myGBX8NPJsN6sEBoqMVrLzO0q70t0l6jpETSJJsUeC Isyrv6KjpST3gm20dthTopmMFxKlmoxX+0Z3jKOULmli/hSDYAU/7AArdvope2P+ds/dCTU+xLJfJ L7Va8tSW7+3VIx6GlNHhPoPDidFWhJN/KwHPoUjXoV010q53TGORLEggqaPjXZ+bKhc6F0wIsVQr2 27LsrHtOeUGPJfTwOCx1nvh/B21ihpy3UqxoSG7EM=; From: Mark Cave-Ayland To: pbonzini@redhat.com, fam@euphon.net, hpoussin@reactos.org, deller@gmx.de, linux@roeck-us.net, qemu-devel@nongnu.org Date: Fri, 12 Jan 2024 13:15:27 +0000 Message-Id: <20240112131529.515642-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240112131529.515642-1-mark.cave-ayland@ilande.co.uk> References: <20240112131529.515642-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a02:8012:c93d:0:260e:bf57:a4e9:8142 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 2/4] esp-pci.c: generate PCI interrupt from separate ESP and PCI sources X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.ilande.co.uk) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.ilande.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1705065587876100001 Content-Type: text/plain; charset="utf-8" The am53c974/dc390 PCI interrupt has two separate sources: the first is fro= m the internal ESP device, and the second is from the PCI DMA transfer logic. Update the ESP interrupt handler so that it sets DMA_STAT_SCSIINT rather th= an driving the PCI IRQ directly, and introduce a new esp_pci_update_irq() func= tion to generate the correct PCI IRQ level. In particular this fixes spurious in= terrupts being generated by setting DMA_STAT_DONE at the end of a transfer if DMA_CM= D_INTE_D isn't set in the DMA_CMD register. Signed-off-by: Mark Cave-Ayland Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck --- hw/scsi/esp-pci.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index 7117725371..15dc3c004d 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -77,6 +77,29 @@ struct PCIESPState { ESPState esp; }; =20 +static void esp_pci_update_irq(PCIESPState *pci) +{ + int scsi_level =3D !!(pci->dma_regs[DMA_STAT] & DMA_STAT_SCSIINT); + int dma_level =3D (pci->dma_regs[DMA_CMD] & DMA_CMD_INTE_D) ? + !!(pci->dma_regs[DMA_STAT] & DMA_STAT_DONE) : 0; + int level =3D scsi_level || dma_level; + + pci_set_irq(PCI_DEVICE(pci), level); +} + +static void esp_irq_handler(void *opaque, int irq_num, int level) +{ + PCIESPState *pci =3D PCI_ESP(opaque); + + if (level) { + pci->dma_regs[DMA_STAT] |=3D DMA_STAT_SCSIINT; + } else { + pci->dma_regs[DMA_STAT] &=3D ~DMA_STAT_SCSIINT; + } + + esp_pci_update_irq(pci); +} + static void esp_pci_handle_idle(PCIESPState *pci, uint32_t val) { ESPState *s =3D &pci->esp; @@ -151,6 +174,7 @@ static void esp_pci_dma_write(PCIESPState *pci, uint32_= t saddr, uint32_t val) /* clear some bits on write */ uint32_t mask =3D DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_D= ONE; pci->dma_regs[DMA_STAT] &=3D ~(val & mask); + esp_pci_update_irq(pci); } break; default: @@ -161,17 +185,14 @@ static void esp_pci_dma_write(PCIESPState *pci, uint3= 2_t saddr, uint32_t val) =20 static uint32_t esp_pci_dma_read(PCIESPState *pci, uint32_t saddr) { - ESPState *s =3D &pci->esp; uint32_t val; =20 val =3D pci->dma_regs[saddr]; if (saddr =3D=3D DMA_STAT) { - if (s->rregs[ESP_RSTAT] & STAT_INT) { - val |=3D DMA_STAT_SCSIINT; - } if (!(pci->sbac & SBAC_STATUS)) { pci->dma_regs[DMA_STAT] &=3D ~(DMA_STAT_ERROR | DMA_STAT_ABORT= | DMA_STAT_DONE); + esp_pci_update_irq(pci); } } =20 @@ -350,6 +371,7 @@ static void esp_pci_command_complete(SCSIRequest *req, = size_t resid) esp_command_complete(req, resid); pci->dma_regs[DMA_WBC] =3D 0; pci->dma_regs[DMA_STAT] |=3D DMA_STAT_DONE; + esp_pci_update_irq(pci); } =20 static const struct SCSIBusInfo esp_pci_scsi_info =3D { @@ -386,7 +408,7 @@ static void esp_pci_scsi_realize(PCIDevice *dev, Error = **errp) "esp-io", 0x80); =20 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->io); - s->irq =3D pci_allocate_irq(dev); + s->irq =3D qemu_allocate_irq(esp_irq_handler, pci, 0); =20 scsi_bus_init(&s->bus, sizeof(s->bus), d, &esp_pci_scsi_info); } --=20 2.39.2