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([102.35.208.160]) by smtp.gmail.com with ESMTPSA id h7-20020adff4c7000000b0033677aae2e2sm1349000wrp.107.2024.01.11.06.23.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 06:23:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704983024; x=1705587824; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IJ7j1cDsI/uXWEkCQ4Id/bagXB6Y2gY5m1Du+N1BU48=; b=Qe6Nl1d2T0CXnGKGDLyVVf4YGDSlyjhfHRLj8h2nPeXFtfd4tLawDdqJNqmgoLB/kw RV/pNUfs3jLKbvUu1Wqk3x3y05J5iUBWLngcihxN9FPxsjt6JQnUovMS6Fp72MWUfGkM PL/e85f25fQRsXWfQ3SWAe2W/2i7yIAjDZh7Xc7607oanP3y0ZAifiuv8sm5u2v2RyJP y6vh/063zJd2QhSCrgNAd7ZQln/FYl1RJ245mctYMUremxlgDhFWcROYZQcqiLErQzae Z3NEfNNo8fqdbq5QUFdYB5f9A6jjWMaxx5OZ2MhkE+ZnSaglm4Z6A1D9TN5kC9KOoAKe pqZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704983024; x=1705587824; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IJ7j1cDsI/uXWEkCQ4Id/bagXB6Y2gY5m1Du+N1BU48=; b=xLOH2k5vhALY/JMlqRkG1Zsb0cq8WrYBbRNyEstveIRbV3rlHw1w8TRKC84whFT4n7 rdKctalPY0jFnIu3AoqfF12K4JzeWMiz+QAnrAvRDSMDsYSrCbO4i5+wgCgiZp5Effpa o4x+T+mVO+s4Vg3aQ/RW4oSP9+VYd7CsJxAcixDM9KF0zWMctbIr3KYOuhEofvFpEDBY /UQEhwfslDueXm8HYDyfGcBESQ5i3p88QjJBpGX+enutUwcGaje+++o79oxB38UC0tvr T+zOMdJpEygU+ORAesNolQXMWILFY/o8ciRFtn8KQPArgHFY8UXfuRESU64j/KuCAP47 lZFw== X-Gm-Message-State: AOJu0Yx7Ih7E3KAxv9e1nv50TKDDOBWDJm9y4qOmumHUXhSfziJ7mhJv WdM6YcdRrA10/uyjlePWQPnyDUG2T9nHrHFSJvwyYq0PNrCPtA== X-Google-Smtp-Source: AGHT+IEuUNX3Ledm3oMOjhEYFkNf7usYSiFNsg9XTUgUTPj5CvDFDgPGC+svu/pBfWZOOMCKb0dOnA== X-Received: by 2002:a5d:480b:0:b0:337:62d3:f68a with SMTP id l11-20020a5d480b000000b0033762d3f68amr690624wrq.81.1704983024567; Thu, 11 Jan 2024 06:23:44 -0800 (PST) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Mahmoud Mandour , Richard Henderson , Paolo Bonzini , Alexandre Iooss Subject: [PATCH 01/12] plugins: implement inline operation with cpu_index offset Date: Thu, 11 Jan 2024 18:23:14 +0400 Message-ID: <20240111142326.1743444-2-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240111142326.1743444-1-pierrick.bouvier@linaro.org> References: <20240111142326.1743444-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=pierrick.bouvier@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1704983132066100002 Content-Type: text/plain; charset="utf-8" Instead of working on a fixed memory location, allow to index it based on cpu_index and a given offset (ptr + cpu_index * offset). Current semantic is not modified as we use a 0 offset, thus inline operation still targets always the same memory location. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- accel/tcg/plugin-gen.c | 60 +++++++++++++++++++++++++++++++++++------- include/qemu/plugin.h | 1 + plugins/api.c | 7 ++--- plugins/core.c | 11 +++++--- plugins/plugin.h | 5 ++-- 5 files changed, 65 insertions(+), 19 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 78b331b2510..fc9d3ee23bc 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -118,16 +118,28 @@ static void gen_empty_udata_cb(void) */ static void gen_empty_inline_cb(void) { + TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); + TCGv_ptr cpu_index_as_ptr =3D tcg_temp_ebb_new_ptr(); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); TCGv_ptr ptr =3D tcg_temp_ebb_new_ptr(); =20 + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + /* pass an immediate !=3D 0 so that it doesn't get optimized away */ + tcg_gen_muli_i32(cpu_index, cpu_index, 0xdeadbeef); + tcg_gen_ext_i32_ptr(cpu_index_as_ptr, cpu_index); + tcg_gen_movi_ptr(ptr, 0); + tcg_gen_add_ptr(ptr, ptr, cpu_index_as_ptr); tcg_gen_ld_i64(val, ptr, 0); /* pass an immediate !=3D 0 so that it doesn't get optimized away */ tcg_gen_addi_i64(val, val, 0xdeadface); + tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_ptr(ptr); tcg_temp_free_i64(val); + tcg_temp_free_ptr(cpu_index_as_ptr); + tcg_temp_free_i32(cpu_index); } =20 static void gen_empty_mem_cb(TCGv_i64 addr, uint32_t info) @@ -274,12 +286,37 @@ static TCGOp *copy_const_ptr(TCGOp **begin_op, TCGOp = *op, void *ptr) return op; } =20 +static TCGOp *copy_ld_i32(TCGOp **begin_op, TCGOp *op) +{ + return copy_op(begin_op, op, INDEX_op_ld_i32); +} + +static TCGOp *copy_ext_i32_ptr(TCGOp **begin_op, TCGOp *op) +{ + if (UINTPTR_MAX =3D=3D UINT32_MAX) { + op =3D copy_op(begin_op, op, INDEX_op_mov_i32); + } else { + op =3D copy_op(begin_op, op, INDEX_op_ext_i32_i64); + } + return op; +} + +static TCGOp *copy_add_ptr(TCGOp **begin_op, TCGOp *op) +{ + if (UINTPTR_MAX =3D=3D UINT32_MAX) { + op =3D copy_op(begin_op, op, INDEX_op_add_i32); + } else { + op =3D copy_op(begin_op, op, INDEX_op_add_i64); + } + return op; +} + static TCGOp *copy_ld_i64(TCGOp **begin_op, TCGOp *op) { if (TCG_TARGET_REG_BITS =3D=3D 32) { /* 2x ld_i32 */ - op =3D copy_op(begin_op, op, INDEX_op_ld_i32); - op =3D copy_op(begin_op, op, INDEX_op_ld_i32); + op =3D copy_ld_i32(begin_op, op); + op =3D copy_ld_i32(begin_op, op); } else { /* ld_i64 */ op =3D copy_op(begin_op, op, INDEX_op_ld_i64); @@ -315,6 +352,13 @@ static TCGOp *copy_add_i64(TCGOp **begin_op, TCGOp *op= , uint64_t v) return op; } =20 +static TCGOp *copy_mul_i32(TCGOp **begin_op, TCGOp *op, uint32_t v) +{ + op =3D copy_op(begin_op, op, INDEX_op_mul_i32); + op->args[2] =3D tcgv_i32_arg(tcg_constant_i32(v)); + return op; +} + static TCGOp *copy_st_ptr(TCGOp **begin_op, TCGOp *op) { if (UINTPTR_MAX =3D=3D UINT32_MAX) { @@ -380,18 +424,14 @@ static TCGOp *append_inline_cb(const struct qemu_plug= in_dyn_cb *cb, TCGOp *begin_op, TCGOp *op, int *unused) { - /* const_ptr */ + op =3D copy_ld_i32(&begin_op, op); + op =3D copy_mul_i32(&begin_op, op, cb->userp_offset); + op =3D copy_ext_i32_ptr(&begin_op, op); op =3D copy_const_ptr(&begin_op, op, cb->userp); - - /* ld_i64 */ + op =3D copy_add_ptr(&begin_op, op); op =3D copy_ld_i64(&begin_op, op); - - /* add_i64 */ op =3D copy_add_i64(&begin_op, op, cb->inline_insn.imm); - - /* st_i64 */ op =3D copy_st_i64(&begin_op, op); - return op; } =20 diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 7fdc3a4849f..4548affc295 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -85,6 +85,7 @@ enum plugin_dyn_cb_subtype { struct qemu_plugin_dyn_cb { union qemu_plugin_cb_sig f; void *userp; + size_t userp_offset; enum plugin_dyn_cb_subtype type; /* @rw applies to mem callbacks only (both regular and inline) */ enum qemu_plugin_mem_rw rw; diff --git a/plugins/api.c b/plugins/api.c index 5521b0ad36c..0fcce825680 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -99,7 +99,8 @@ void qemu_plugin_register_vcpu_tb_exec_inline(struct qemu= _plugin_tb *tb, void *ptr, uint64_t imm) { if (!tb->mem_only) { - plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE], 0, op, ptr, = imm); + plugin_register_inline_op(&tb->cbs[PLUGIN_CB_INLINE], + 0, op, ptr, 0, imm); } } =20 @@ -120,7 +121,7 @@ void qemu_plugin_register_vcpu_insn_exec_inline(struct = qemu_plugin_insn *insn, { if (!insn->mem_only) { plugin_register_inline_op(&insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_INL= INE], - 0, op, ptr, imm); + 0, op, ptr, 0, imm); } } =20 @@ -145,7 +146,7 @@ void qemu_plugin_register_vcpu_mem_inline(struct qemu_p= lugin_insn *insn, uint64_t imm) { plugin_register_inline_op(&insn->cbs[PLUGIN_CB_MEM][PLUGIN_CB_INLINE], - rw, op, ptr, imm); + rw, op, ptr, 0, imm); } =20 void qemu_plugin_register_vcpu_tb_trans_cb(qemu_plugin_id_t id, diff --git a/plugins/core.c b/plugins/core.c index 49588285dd0..cc6d7720b1f 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -280,13 +280,15 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(G= Array **arr) =20 void plugin_register_inline_op(GArray **arr, enum qemu_plugin_mem_rw rw, - enum qemu_plugin_op op, void *ptr, + enum qemu_plugin_op op, + void *ptr, size_t offset, uint64_t imm) { struct qemu_plugin_dyn_cb *dyn_cb; =20 dyn_cb =3D plugin_get_dyn_cb(arr); dyn_cb->userp =3D ptr; + dyn_cb->userp_offset =3D offset; dyn_cb->type =3D PLUGIN_CB_INLINE; dyn_cb->rw =3D rw; dyn_cb->inline_insn.op =3D op; @@ -431,9 +433,10 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb) +void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) { - uint64_t *val =3D cb->userp; + const size_t offset =3D cpu_index * cb->userp_offset; + uint64_t *val =3D (uint64_t *)((char *) cb->userp + offset); =20 switch (cb->inline_insn.op) { case QEMU_PLUGIN_INLINE_ADD_U64: @@ -466,7 +469,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t va= ddr, vaddr, cb->userp); break; case PLUGIN_CB_INLINE: - exec_inline_op(cb); + exec_inline_op(cb, cpu->cpu_index); break; default: g_assert_not_reached(); diff --git a/plugins/plugin.h b/plugins/plugin.h index 5eb2fdbc85e..e597ef3c30e 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -66,7 +66,8 @@ struct qemu_plugin_ctx *plugin_id_to_ctx_locked(qemu_plug= in_id_t id); =20 void plugin_register_inline_op(GArray **arr, enum qemu_plugin_mem_rw rw, - enum qemu_plugin_op op, void *ptr, + enum qemu_plugin_op op, + void *ptr, size_t offset, uint64_t imm); =20 void plugin_reset_uninstall(qemu_plugin_id_t id, @@ -95,6 +96,6 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb); +void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); =20 #endif /* PLUGIN_H */ --=20 2.43.0