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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id t65-20020a628144000000b006d9879ba6besm3223814pfd.170.2024.01.10.01.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 01:00:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704877218; x=1705482018; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Axs0H56Btt4TxmenWBzfcgI1G5BHWnRaIUY418ZTC6I=; b=iUD5bTTvNrjm8JrvHSqE86rxH5hmxqZlGz7fBA+74oC28XlKxjRuE+leJA50PPXVg6 GhFLpdIAZL3h/nGFpRU+us7wcJkUPULKY1f0M1yc/EXd3g7Mb+srz2G2USuihc8OpNwF WTgkRKsHw+dwoPpuru9sIeDfjBlgsUtHHBt0y6nbYmmOTAF1S0TeLlUm0uVMHb0nVjV3 0t1qm+j2MGDvuj7XSMXaEJDmeLzCft3n88kpyFBaC32VVrkccIgW91iJO3H0kw3Lol9C RQ+1Bv6sq6zDoBibTAXvN6fa4IWrtyU9SeW8ASyaE6nZ/yAPWA+1vrUfI6E/HIavKwMv AD1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704877218; x=1705482018; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Axs0H56Btt4TxmenWBzfcgI1G5BHWnRaIUY418ZTC6I=; b=ehvkwYFodEkLabqhmol8sGFzbQZGISN3w2nG5DOBeDCltvDlD/6AK6YoLZLsufv+2/ YfxcastIbtq0npS87ngWG7+C7Ga6lbPbhqFqaB0AtcTRtdsUszfaTSh1VwRCwGZ2YoEE W6xG6twNAHuuvUBeusgg2uDAs2uDLlFc2WDy2vHAoapCQ5k5UifXesg9oELrIoBbuo49 GdXV4PgGCuhm/hu4stnYdnY8Vek+6wt9rtm3GLNWTMK+U/hJ3fGRVmP/GCoU9dz/VSug RoNEwT7YXbPfiqe4wKm8UYoMx7N4/kK+O0KdHjcremRbLnLkkufoqseVCWhqvSRwTPqz /FQg== X-Gm-Message-State: AOJu0Yw9YxAE7i98IpdT0EpY5tBVFSAD0Ecv70otupRu1Qq97Ja9rBry BhE4VXEjV6M06vgJZuRA6GjvUHiEZQAqzy+t X-Google-Smtp-Source: AGHT+IHpXyjUTRpc15z3IrV0Pz0ygiKYMKNG6Eg2r2k3qZjfzJ+SoLIa4WiYFyFVgpZkgV7ydfb5SA== X-Received: by 2002:a05:6808:13c4:b0:3bd:4416:42f9 with SMTP id d4-20020a05680813c400b003bd441642f9mr826637oiw.82.1704877218398; Wed, 10 Jan 2024 01:00:18 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Alistair Francis , LIU Zhiwei , Andrew Jones Subject: [PULL 40/65] target/riscv/tcg: add riscv_cpu_write_misa_bit() Date: Wed, 10 Jan 2024 18:57:08 +1000 Message-ID: <20240110085733.1607526-41-alistair.francis@wdc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240110085733.1607526-1-alistair.francis@wdc.com> References: <20240110085733.1607526-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=alistair23@gmail.com; helo=mail-oi1-x22f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1704877520140100005 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza We have two instances of the setting/clearing a MISA bit from env->misa_ext and env->misa_ext_mask pattern. And the next patch will end up adding one more. Create a helper to avoid code repetition. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei Reviewed-by: Andrew Jones Message-ID: <20231218125334.37184-13-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/tcg-cpu.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 731ec2279e..dd8f49b2a6 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -42,6 +42,20 @@ static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset) GUINT_TO_POINTER(ext_offset)); } =20 +static void riscv_cpu_write_misa_bit(RISCVCPU *cpu, uint32_t bit, + bool enabled) +{ + CPURISCVState *env =3D &cpu->env; + + if (enabled) { + env->misa_ext |=3D bit; + env->misa_ext_mask |=3D bit; + } else { + env->misa_ext &=3D ~bit; + env->misa_ext_mask &=3D ~bit; + } +} + static void riscv_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { @@ -833,13 +847,9 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor = *v, const char *name, */ env->priv_ver =3D PRIV_VERSION_1_12_0; } - - env->misa_ext |=3D misa_bit; - env->misa_ext_mask |=3D misa_bit; - } else { - env->misa_ext &=3D ~misa_bit; - env->misa_ext_mask &=3D ~misa_bit; } + + riscv_cpu_write_misa_bit(cpu, misa_bit, value); } =20 static void cpu_get_misa_ext_cfg(Object *obj, Visitor *v, const char *name, @@ -883,7 +893,6 @@ static const RISCVCPUMisaExtConfig misa_ext_cfgs[] =3D { */ static void riscv_cpu_add_misa_properties(Object *cpu_obj) { - CPURISCVState *env =3D &RISCV_CPU(cpu_obj)->env; bool use_def_vals =3D riscv_cpu_is_generic(cpu_obj); int i; =20 @@ -904,13 +913,8 @@ static void riscv_cpu_add_misa_properties(Object *cpu_= obj) NULL, (void *)misa_cfg); object_property_set_description(cpu_obj, name, desc); if (use_def_vals) { - if (misa_cfg->enabled) { - env->misa_ext |=3D bit; - env->misa_ext_mask |=3D bit; - } else { - env->misa_ext &=3D ~bit; - env->misa_ext_mask &=3D ~bit; - } + riscv_cpu_write_misa_bit(RISCV_CPU(cpu_obj), bit, + misa_cfg->enabled); } } } --=20 2.43.0