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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id t65-20020a628144000000b006d9879ba6besm3223814pfd.170.2024.01.10.00.58.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 00:58:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704877098; x=1705481898; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g2b79fjezI+w7ia0ZXSXAOjdvnoCztfU/i3RsPXm/NE=; b=IM8htAruo60QUP6/Xis+QqwdAxhR02RX8vYnz9M/lW3RqC6awa/6wNFWBqHFEMnF9L gfDJhEh4bgfFSWer3qhVA523u2J4COQRAmSjQv38RPfuIdIlvT53HS6s0u7zF1As17aO HI2G6F4tO1oqjyzyaZcMP+CnDWq8GxboI8jcn2MyNuaSIRu2RWAsX+082fiSs2xbRoGB IyLI/iJjg3WjVghTrwokNyu/+cuRrlcPwcDZfY3CiLOLexOQlDn7+6MUoI3QdOJRZOAb 4BV9plC0rF6R6K036kKXant1c8/go9MNNR3uj5LPTJjJnN+g41NKvxruwMCMKkxPaGgY +TQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704877098; x=1705481898; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g2b79fjezI+w7ia0ZXSXAOjdvnoCztfU/i3RsPXm/NE=; b=uYNGeSkCOW+FSAr9J27dGXlTKlO1rt4WcyJqx70O0hhjCxAI2Ql5z6nGvbgp5612Y1 uX8MWUz3J1KRNhfwoIxeMf7DAr2k4t6uwWq5gy7sPb6p3EytCw+n3w0ODSbwVPemruFM STrIyJrToEW9MBed++TUGpUu6EGu06W8loTX7AOgQCcf9fpxHySXFCGmX5Y4NJq+uHHs SH7KkoYs+IcaWQfEamCTWvq0biAd13H1dkGhgDCwLpJZbgvAyJsrwcxQQnsM6oZviuY/ 4ZIOVn8VP+X+8HHsnli8AF5Dm6WYB8FT5yXngD5G/dl+HyUIMVtp8dVLW2ake8T4YZX+ 1/bw== X-Gm-Message-State: AOJu0Yy7yDRo5bTs06gGDd9DK84d1hpvOxQ5IfXwuyeUhn/anQL8DUXo oTjPMUkThj1BG3/pC9aU8OKjdoz7KCDUH7lf X-Google-Smtp-Source: AGHT+IH8pULSFJT8Id5HmHP/rKv9ozFwYw167iws8K+3hS2KREEWfGyvEhU3VD2IL7LoNCmSlxo5Dw== X-Received: by 2002:a05:6808:1489:b0:3bc:641f:c7f7 with SMTP id e9-20020a056808148900b003bc641fc7f7mr1022236oiw.8.1704877098657; Wed, 10 Jan 2024 00:58:18 -0800 (PST) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Daniel Henrique Barboza , Andrew Jones , Alistair Francis Subject: [PULL 10/65] target/riscv/kvm: add RISCV_CONFIG_REG() Date: Wed, 10 Jan 2024 18:56:38 +1000 Message-ID: <20240110085733.1607526-11-alistair.francis@wdc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240110085733.1607526-1-alistair.francis@wdc.com> References: <20240110085733.1607526-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::229; envelope-from=alistair23@gmail.com; helo=mail-oi1-x229.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1704877471945100003 Content-Type: text/plain; charset="utf-8" From: Daniel Henrique Barboza Create a RISCV_CONFIG_REG() macro, similar to what other regs use, to hide away some of the boilerplate. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Message-ID: <20231208183835.2411523-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis --- target/riscv/kvm/kvm-cpu.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index b7871b2f8f..15573402be 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -88,6 +88,10 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint= 64_t idx) #define RISCV_CSR_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR,= \ KVM_REG_RISCV_CSR_REG(name)) =20 +#define RISCV_CONFIG_REG(env, name) \ + kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, \ + KVM_REG_RISCV_CONFIG_REG(name)) + #define RISCV_TIMER_REG(name) kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \ KVM_REG_RISCV_TIMER_REG(name)) =20 @@ -756,24 +760,21 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu) struct kvm_one_reg reg; int ret; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mvendorid)); + reg.id =3D RISCV_CONFIG_REG(env, mvendorid); reg.addr =3D (uint64_t)&cpu->cfg.mvendorid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { error_report("Unable to retrieve mvendorid from host, error %d", r= et); } =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(marchid)); + reg.id =3D RISCV_CONFIG_REG(env, marchid); reg.addr =3D (uint64_t)&cpu->cfg.marchid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { error_report("Unable to retrieve marchid from host, error %d", ret= ); } =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mimpid)); + reg.id =3D RISCV_CONFIG_REG(env, mimpid); reg.addr =3D (uint64_t)&cpu->cfg.mimpid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { @@ -788,8 +789,7 @@ static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu, struct kvm_one_reg reg; int ret; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(isa)); + reg.id =3D RISCV_CONFIG_REG(env, isa); reg.addr =3D (uint64_t)&env->misa_ext_mask; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); =20 @@ -1092,8 +1092,7 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CP= UState *cs) uint64_t id; int ret; =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mvendorid)); + id =3D RISCV_CONFIG_REG(env, mvendorid); /* * cfg.mvendorid is an uint32 but a target_ulong will * be written. Assign it to a target_ulong var to avoid @@ -1105,15 +1104,13 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, = CPUState *cs) return ret; } =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(marchid)); + id =3D RISCV_CONFIG_REG(env, marchid); ret =3D kvm_set_one_reg(cs, id, &cpu->cfg.marchid); if (ret !=3D 0) { return ret; } =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mimpid)); + id =3D RISCV_CONFIG_REG(env, mimpid); ret =3D kvm_set_one_reg(cs, id, &cpu->cfg.mimpid); =20 return ret; --=20 2.43.0