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[77.11.174.94]) by smtp.gmail.com with ESMTPSA id f20-20020a056402195400b005576f4471besm624922edz.42.2024.01.06.13.05.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Jan 2024 13:05:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704575159; x=1705179959; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=py92FQejKDlLtWW57eF8TnbqU3TrVAOsFf1Pvat3KP0=; b=bdpwCToRsGOSXQnrJy0laaxQgKwYM4xwd+OAo8RCCLjugKnJb+mX2XiGRZ23Qvgyrb AXJqlPElryp9cEB6lwePkteDGmp51l3qlvrmVT5XZJeV7jHw8bz/W1fisvZyYqBOzsgO UhH3gOqWEsj1kd09KJvmyWPlA7Ew3nNjpqZet9Z3uggElSjpeHJ1zZjOrmsMax6NkOQj liejEM61u9Tk2gksQ0GpknQWSUxAu6W44o/DLRPzxbC/ot2K48ppTS0EW42JGmecWmLd JWmEV2A3pFvwH2NV/nziRzUkOr9D4clMB1nZVZnn3/mvEmt//IAcQ0p25AHGxf7GarvP gTAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704575159; x=1705179959; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=py92FQejKDlLtWW57eF8TnbqU3TrVAOsFf1Pvat3KP0=; b=o3K700/VL6BXrvvhMaAoYXuVp1t+bTtKfQWGSe31bGJxSKRu2w+xzB+nH8oyjOvzRv ZNeu8yTJEa9CTBeg4pLIn2SPPK495EG0wt4CPEqyg231KdgHmHkPhr6ggutSbqCyOd7l fv4W+kNsgmrZsbu3FE4PgdDVBvNh4NrORN1udqIp26piXHmoLyT+c2pNvqdxyVg59OH1 xk4PYnB3t9HrIzu15WyIih1PWcIVmWnwnib2R5icnPohddq9ffKHnLe6onn5jJo8R8os TZQfxYEcgLbGctfaNLarruKJQDlXG0YgZIusTKDf2mt2bKi6g1T7rPKFwyt7v0jG+7lH W0uA== X-Gm-Message-State: AOJu0YwUW0ag8ymWv/h3NgOmp/YCjv7IC7g3NhTKOQS7nvpJoXGr0aEJ 62ZOjCzrlQJJlVU2aAg4n911yGkde9k= X-Google-Smtp-Source: AGHT+IELw8mPxKFc41Q8uSbl5gicbbEH8EpGDEMqaJFg+sXFiIQ7hN7Fvfa0BLQAWVt8elDR2pE5jw== X-Received: by 2002:a50:d7d7:0:b0:557:7c2:1114 with SMTP id m23-20020a50d7d7000000b0055707c21114mr524894edj.171.1704575159369; Sat, 06 Jan 2024 13:05:59 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Artyom Tarasenko , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Fabiano Rosas , Jiaxun Yang , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , John Snow , qemu-block@nongnu.org, Kevin Wolf , Thomas Huth , Richard Henderson , Nicholas Piggin , Aleksandar Rikalo , Peter Xu , BALATON Zoltan , Leonardo Bras , Paolo Bonzini , "Michael S. Tsirkin" , Juan Quintela , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, David Hildenbrand , Marcel Apfelbaum , Sergio Lopez , Hanna Reitz , Mark Cave-Ayland , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH v4 08/11] hw/char/serial-isa: Implement relocation and enabling/disabling for TYPE_ISA_SERIAL Date: Sat, 6 Jan 2024 22:05:28 +0100 Message-ID: <20240106210531.140542-9-shentey@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240106210531.140542-1-shentey@gmail.com> References: <20240106210531.140542-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=shentey@gmail.com; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1704575262269100003 Content-Type: text/plain; charset="utf-8" The real SuperI/O chips emulated by QEMU allow for relocating and enabling = or disabling their SuperI/O functions via software. So far this is not impleme= nted. Prepare for that by adding isa_serial_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow --- include/hw/char/serial.h | 2 ++ hw/char/serial-isa.c | 14 ++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 8ba7eca3d6..6e14099ee7 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -112,5 +112,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, =20 #define TYPE_ISA_SERIAL "isa-serial" void serial_hds_isa_init(ISABus *bus, int from, int to); +void isa_serial_set_iobase(ISADevice *serial, hwaddr iobase); +void isa_serial_set_enabled(ISADevice *serial, bool enabled); =20 #endif diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 1c793b20f7..329b352b9a 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -184,3 +184,17 @@ void serial_hds_isa_init(ISABus *bus, int from, int to) } } } + +void isa_serial_set_iobase(ISADevice *serial, hwaddr iobase) +{ + ISASerialState *s =3D ISA_SERIAL(serial); + + serial->ioport_id =3D iobase; + s->iobase =3D iobase; + memory_region_set_address(&s->state.io, s->iobase); +} + +void isa_serial_set_enabled(ISADevice *serial, bool enabled) +{ + memory_region_set_enabled(&ISA_SERIAL(serial)->state.io, enabled); +} --=20 2.43.0