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[77.11.174.94]) by smtp.gmail.com with ESMTPSA id f20-20020a056402195400b005576f4471besm624922edz.42.2024.01.06.13.05.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Jan 2024 13:05:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704575158; x=1705179958; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t/DnmwsZ7xP8YAXiG+Ug2+agkl77mYRu9Wp28MfNLeE=; b=OJTvaIsE03wJqP0DmNEqYo7PrFR+epFXHRFVbJJAUABbwbkg4nxgf7met5CgSAt47U dF6/9YuLwIynNT3H7nqrg0DS6OrSy8N4yFdJ9qt3PhoLS3+1nBnpxZCDLM9HxAtwKnRi bcjV8Up+9Lqj4Gy+Mwoh0GNyM+DMlEQwfZcbHypfP6Y26DQ4DcgMtyC5lFVhsFfcj4JO mEQN2DIMSDtuhgmvj2l560anQNJd3Cn4rereLwgUXCFI4Bfnl30hykLw6xMm/qEey9Zr EmK6IP1T9F4rCyx9lOaDX6V7FUWKTpYbTU+7NFv4wSNaR7kUWlRL24M1OBUBpM+H74t6 svLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704575158; x=1705179958; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t/DnmwsZ7xP8YAXiG+Ug2+agkl77mYRu9Wp28MfNLeE=; b=o/YTnULqwX30XZTsSkX7Ke3+yfUv2Uw4ik8YoLYD76EC+LoO61rQ4kUnylHI+zI72G p3xlu3vLZ32i2kVPWvhvJZ4FQnY2aFr2gbHADTqOT9tqdRrtOI0aHcsmrsOCBLYgyyv4 2a2mHeknGhBMIvM2bkmPNkRHI5o1T/YJychBEZ8ukWCWHOd+73cQaVVMK17ibLHf2ZCB gWLx3FUXQfl3HZwXmDswJwG21KBwEbF6ql+C55JgwL69CoNX+PUv/k5dc3FTe5nYWR28 /4qxRqK2331yoa3yxU1+Hdx4TuqysmFywaJc64hno99WSDAJBP+QB98sDMiR9Ykx/+wT QPcQ== X-Gm-Message-State: AOJu0Yyh/ADlgzRlTrSL8216yNLR28ueWk1oAcqJ26J2eHXWGK4DcxjW PaJiI46lYtXX9cUTmkj9hIMGsvbJSbE= X-Google-Smtp-Source: AGHT+IHhalljsJT/0csqKr/rwDF2CMzpSFNjT0vQQ4dyeFph8JRw6xTd8IWJO/gC+R9KNpRWhxPiHg== X-Received: by 2002:adf:fe03:0:b0:336:5f08:bbe0 with SMTP id n3-20020adffe03000000b003365f08bbe0mr700600wrr.101.1704575157677; Sat, 06 Jan 2024 13:05:57 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Artyom Tarasenko , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Fabiano Rosas , Jiaxun Yang , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , John Snow , qemu-block@nongnu.org, Kevin Wolf , Thomas Huth , Richard Henderson , Nicholas Piggin , Aleksandar Rikalo , Peter Xu , BALATON Zoltan , Leonardo Bras , Paolo Bonzini , "Michael S. Tsirkin" , Juan Quintela , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, David Hildenbrand , Marcel Apfelbaum , Sergio Lopez , Hanna Reitz , Mark Cave-Ayland , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH v4 07/11] hw/block/fdc-isa: Implement relocation and enabling/disabling for TYPE_ISA_FDC Date: Sat, 6 Jan 2024 22:05:27 +0100 Message-ID: <20240106210531.140542-8-shentey@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240106210531.140542-1-shentey@gmail.com> References: <20240106210531.140542-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=shentey@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1704575218402100011 Content-Type: text/plain; charset="utf-8" The real SuperI/O chips emulated by QEMU allow for relocating and enabling = or disabling their SuperI/O functions via software. So far this is not impleme= nted. Prepare for that by adding isa_fdc_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow --- include/hw/block/fdc.h | 3 +++ hw/block/fdc-isa.c | 14 ++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/include/hw/block/fdc.h b/include/hw/block/fdc.h index 35248c0837..c367c5efea 100644 --- a/include/hw/block/fdc.h +++ b/include/hw/block/fdc.h @@ -14,6 +14,9 @@ void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, D= riveInfo **fds); void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, DriveInfo **fds, qemu_irq *fdc_tc); =20 +void isa_fdc_set_iobase(ISADevice *fdc, hwaddr iobase); +void isa_fdc_set_enabled(ISADevice *fdc, bool enabled); + FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i); int cmos_get_fd_drive_type(FloppyDriveType fd0); =20 diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c index 2d8a98ce7d..e43dc532af 100644 --- a/hw/block/fdc-isa.c +++ b/hw/block/fdc-isa.c @@ -192,6 +192,20 @@ static Aml *build_fdinfo_aml(int idx, FloppyDriveType = type) return dev; } =20 +void isa_fdc_set_iobase(ISADevice *fdc, hwaddr iobase) +{ + FDCtrlISABus *isa =3D ISA_FDC(fdc); + + fdc->ioport_id =3D iobase; + isa->iobase =3D iobase; + portio_list_set_address(&isa->portio_list, isa->iobase); +} + +void isa_fdc_set_enabled(ISADevice *fdc, bool enabled) +{ + portio_list_set_enabled(&ISA_FDC(fdc)->portio_list, enabled); +} + int cmos_get_fd_drive_type(FloppyDriveType fd0) { int val; --=20 2.43.0