From nobody Tue Nov 26 22:32:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1704496157; cv=none; d=zohomail.com; s=zohoarc; b=KM5knV4Zgfs3LL+pqALSAkDpHck0Jw9HCJn7nEPeTFNrAhQ5vFhoeXcyLv03/TrMF8e+MSwui+zBza4grKkrr7SvHDvQ9i+fdPvUbKGUk8qKlAMBK+JLVWVgz9erpPJLd76iSFiRXW6mCs50808m47S29C7F3CZE1oXfI0JYf6o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704496157; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CR3P1CyFIwU/prZir9G66Ueg2vl6mRW09ZOo4BcguKI=; b=d3XRdVl3/c/JQ/vTGzemLzL1Bm4NG6UmCX9jxS3MH57se5G0dpYHOGFqrI1fplcNDID8Yt605+63WdtWYqVElojza4ofXg1gHYD//HkypVu95o9NVVObknIBYIxXi7FIizJqkKO8ZCy55TndO6cW6Mysskwmj0Vnn8JOKH70YPw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1704496157328678.8226662439633; Fri, 5 Jan 2024 15:09:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLtGY-0002IJ-Pu; Fri, 05 Jan 2024 18:06:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLtGX-0002Gz-1K for qemu-devel@nongnu.org; Fri, 05 Jan 2024 18:06:13 -0500 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLtGU-0002Hl-2w for qemu-devel@nongnu.org; Fri, 05 Jan 2024 18:06:12 -0500 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-6d98ce84e18so89254b3a.3 for ; Fri, 05 Jan 2024 15:06:09 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([152.234.127.254]) by smtp.gmail.com with ESMTPSA id r19-20020aa78b93000000b006dacfab07b6sm1849249pfd.121.2024.01.05.15.06.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 15:06:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1704495968; x=1705100768; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CR3P1CyFIwU/prZir9G66Ueg2vl6mRW09ZOo4BcguKI=; b=Lu2IHyOwc4IYKLJOD4JubK40cT7nm110Zdys2q9v/NC2IylB6HgEGqCtRtFTWUsmGb RkrbX75l5uC9bQYtSBfqM7R5n/YATYTGIF7KdfujTRV/8rk5cugVQmde52fnI+arj2NH +JuRX1MJ5xAlNMhUfLfHvQ6e+gTx3qPyrszhyYDY5xyhTAOYP0zb3kJhW451XXh3ibSP 5Xew5eNb92qA8Q8HPXy5URul+ll6crGmTBb34FdpP3KFG/lJRc8dSk8s5/kfppTKyj/7 9Ltas3CVCDHtIL88ISIHsn99Nakj7KZ0nfZTuVrfW1BYzr406b+D4+25D2hd3XMvXZRi aM9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704495968; x=1705100768; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CR3P1CyFIwU/prZir9G66Ueg2vl6mRW09ZOo4BcguKI=; b=u7NS18YM1rLP/Gbrg1nP//ZBQHJqcUxwY0P2LmsmVoQSZR08DR8FiXsWr2qhztzuu1 LcJjk/hFoliK+P7qphnoxWAqJ54VnUA4iOgklQUEksM/Vinpa4OGW5QNxz4AXVl7GDfu 5J1kvhXBYLw2QA+Jn6QbDMZFqU9EgN4Pj0MmuvCkODymjB5CRLMF2TCLSYiBSyYn7tZr rlDWVXwNGCDHpJS1in9p172pg/C3Xce8DvU1vDvFreBQsn7DECGPxJnKEEI46bFte9pV OMxUPtoQPnibH14RT1kcxdgjwzaWF46/KTdw4IiZWyT+mc4S7M1aPgTnBUa7JWWQPdYn GeJw== X-Gm-Message-State: AOJu0YzWpvDrfFQT3jBm7OkPCsnmBtT2acoDHX5yvDxe39/TKZ9QTeNi oC520Gizylv8rM4VjifmRBrac5GWqoGOqBJP8pITmpnKMJvF4A== X-Google-Smtp-Source: AGHT+IE/qn47DjXOieLenBM/UmGGxvXJEssvTQnx/wMDF72YJ1mbMDaSfGCThTg/SathIyZzCmJCBA== X-Received: by 2002:a05:6a20:1b15:b0:199:b2:92c4 with SMTP id ch21-20020a056a201b1500b0019900b292c4mr87853pzb.51.1704495968422; Fri, 05 Jan 2024 15:06:08 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 05/17] target/riscv: move 'pmp' to riscv_cpu_properties[] Date: Fri, 5 Jan 2024 20:05:34 -0300 Message-ID: <20240105230546.265053-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240105230546.265053-1-dbarboza@ventanamicro.com> References: <20240105230546.265053-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1704496157802100007 Content-Type: text/plain; charset="utf-8" Move 'pmp' to riscv_cpu_properties[], creating a new setter() for it that forbids 'pmp' to be changed in vendor CPUs, like we did with the 'mmu' option. We'll also have to manually set 'pmp =3D true' to generic CPUs that were still relying on the previous default to set it. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 891a3b630b..df8e0b43f7 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -438,6 +438,7 @@ static void riscv_max_cpu_init(Object *obj) RISCVMXL mlx =3D MXL_RV64; =20 cpu->cfg.mmu =3D true; + cpu->cfg.pmp =3D true; =20 #ifdef TARGET_RISCV32 mlx =3D MXL_RV32; @@ -457,6 +458,7 @@ static void rv64_base_cpu_init(Object *obj) CPURISCVState *env =3D &cpu->env; =20 cpu->cfg.mmu =3D true; + cpu->cfg.pmp =3D true; =20 /* We set this in the realise function */ riscv_cpu_set_misa(env, MXL_RV64, 0); @@ -586,6 +588,7 @@ static void rv128_base_cpu_init(Object *obj) } =20 cpu->cfg.mmu =3D true; + cpu->cfg.pmp =3D true; =20 /* We set this in the realise function */ riscv_cpu_set_misa(env, MXL_RV128, 0); @@ -624,6 +627,7 @@ static void rv32_base_cpu_init(Object *obj) CPURISCVState *env =3D &cpu->env; =20 cpu->cfg.mmu =3D true; + cpu->cfg.pmp =3D true; =20 /* We set this in the realise function */ riscv_cpu_set_misa(env, MXL_RV32, 0); @@ -1640,9 +1644,38 @@ static const PropertyInfo prop_mmu =3D { .set =3D prop_mmu_set, }; =20 -Property riscv_cpu_options[] =3D { - DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), +static void prop_pmp_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu =3D RISCV_CPU(obj); + bool value; + + visit_type_bool(v, name, &value, errp); =20 + if (cpu->cfg.pmp !=3D value && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.pmp =3D value; +} + +static void prop_pmp_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool value =3D RISCV_CPU(obj)->cfg.pmp; + + visit_type_bool(v, name, &value, errp); +} + +static const PropertyInfo prop_pmp =3D { + .name =3D "pmp", + .get =3D prop_pmp_get, + .set =3D prop_pmp_set, +}; + +Property riscv_cpu_options[] =3D { DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec), DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec), =20 @@ -1730,6 +1763,7 @@ static Property riscv_cpu_properties[] =3D { {.name =3D "pmu-num", .info =3D &prop_pmu_num}, /* Deprecated */ =20 {.name =3D "mmu", .info =3D &prop_mmu}, + {.name =3D "pmp", .info =3D &prop_pmp}, =20 #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), --=20 2.43.0