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[176.184.26.1]) by smtp.gmail.com with ESMTPSA id z6-20020a05600c0a0600b0040e3ac9f4c8sm898004wmp.28.2024.01.05.07.43.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 05 Jan 2024 07:43:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1704469434; x=1705074234; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=woqU0CJbLpbBNTO5d7sFgz50JLFq3nMIZ0ht3SRJ1YE=; b=xSpH4fYkHdsPRicQUBBr9yk+JuKO+SmbCrl1mHawHDzs73/ZTgDaMs9ug/h5bG6sC/ jMvOYRWaF5Kjz0YAtG94CQS0/wLiZx0jMnWALgBH1yMluVYF12j2RuLShZKfWl5bHce1 lX2wuo+HsFcrOwjVp3RbwJWT03fXukqPB6dKVmCy2FdQ5GoVpJGn0IPWlQJWu0s4uH9M rZTbNjmh4nA0zZBjG5LfP5M/nIKGJEjKJQn1vdGl9Va170gWDXkqZ1BclqLdf67nOC8c sOn4x/gXWdO1iSn/TW5V9AEDvH6I5kE6gKMJr2h4MKfT61DbzM23GbNvjrGL2TT5MTmH gcFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704469434; x=1705074234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=woqU0CJbLpbBNTO5d7sFgz50JLFq3nMIZ0ht3SRJ1YE=; b=m7N1Z7Dr31ou/K0zOErA7Gd2FTc/TTACr7wGvS9NGXQAticFsk/xxBGMSAobTGX5L+ bR6lcIBgncFf84xooM+DdQtH5p8S+3cl24kFXamUPNVWZmiAgD+lfYoHiEE2G36V3KG4 w2F8opUCf8F+rdtVcuf7lWWRaHdu24eUi8BKie2x3VV8+4qJjcdbBGf5CKoK14HcBE0k WHTUPRJZsJntvhLdvhGS9Nx5rj1dqy16Uy/hYSOjBXbFIoX7TtVUrWMoaAYJiFJuyx1a YoOnKHpvffsrDtxp0YIVEMjFyahz/uNyxLt/5DtirYyRpKu3yxTrHQ1tWbBrt4DLFpvd kX+Q== X-Gm-Message-State: AOJu0Yxj/uH1WPLHBRir1dBchQxvYHKudmOhEB4vblOoVIJ51R7mIoHr dWeL9WwttjB3R06LcHSqSjcqQfEsFJotzRy7eFHbrl0kW08= X-Google-Smtp-Source: AGHT+IEeRcFLbKk4dFeAmeBvJcSygmKaaj/1gLM6njWmdPg6vzuBbto2c0jdOLbPMEUjorS5a5yEaA== X-Received: by 2002:a7b:cbd9:0:b0:40d:62f6:5d51 with SMTP id n25-20020a7bcbd9000000b0040d62f65d51mr1336159wmi.127.1704469434059; Fri, 05 Jan 2024 07:43:54 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Gavin Shan , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Peter Maydell Subject: [PULL 08/71] target/arm: Use generic cpu_list() Date: Fri, 5 Jan 2024 16:42:01 +0100 Message-ID: <20240105154307.21385-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240105154307.21385-1-philmd@linaro.org> References: <20240105154307.21385-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1704469732312100007 From: Gavin Shan No changes of the output from the following command before and after it's applied. [gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ? Available CPUs: a64fx arm1026 arm1136 arm1136-r2 arm1176 arm11mpcore arm926 arm946 cortex-a15 cortex-a35 cortex-a53 cortex-a55 cortex-a57 cortex-a7 cortex-a710 cortex-a72 cortex-a76 cortex-a8 cortex-a9 cortex-m0 cortex-m3 cortex-m33 cortex-m4 cortex-m55 cortex-m7 cortex-r5 cortex-r52 cortex-r5f max neoverse-n1 neoverse-n2 neoverse-v1 pxa250 pxa255 pxa260 pxa261 pxa262 pxa270-a0 pxa270-a1 pxa270 pxa270-b0 pxa270-b1 pxa270-c0 pxa270-c5 sa1100 sa1110 ti925t Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-ID: <20231114235628.534334-9-gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.h | 3 --- target/arm/helper.c | 46 --------------------------------------------- 2 files changed, 49 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a0282e0d28..8c3ca2e231 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2737,7 +2737,6 @@ static inline bool access_secure_reg(CPUARMState *env) (arm_is_secure(_env) && !arm_el_is_aa64((_env), 3))= , \ (_val)) =20 -void arm_cpu_list(void); uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, uint32_t cur_el, bool secure); =20 @@ -2840,8 +2839,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_syn= c); =20 #define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU =20 -#define cpu_list arm_cpu_list - /* ARM has the following "translation regimes" (as the ARM ARM calls them): * * If EL3 is 64-bit: diff --git a/target/arm/helper.c b/target/arm/helper.c index fc546df5c7..a2a7f6c29f 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9468,52 +9468,6 @@ void register_cp_regs_for_features(ARMCPU *cpu) #endif } =20 -/* Sort alphabetically by type name, except for "any". */ -static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b) -{ - ObjectClass *class_a =3D (ObjectClass *)a; - ObjectClass *class_b =3D (ObjectClass *)b; - const char *name_a, *name_b; - - name_a =3D object_class_get_name(class_a); - name_b =3D object_class_get_name(class_b); - if (strcmp(name_a, "any-" TYPE_ARM_CPU) =3D=3D 0) { - return 1; - } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) =3D=3D 0) { - return -1; - } else { - return strcmp(name_a, name_b); - } -} - -static void arm_cpu_list_entry(gpointer data, gpointer user_data) -{ - ObjectClass *oc =3D data; - CPUClass *cc =3D CPU_CLASS(oc); - const char *typename; - char *name; - - typename =3D object_class_get_name(oc); - name =3D g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CP= U)); - if (cc->deprecation_note) { - qemu_printf(" %s (deprecated)\n", name); - } else { - qemu_printf(" %s\n", name); - } - g_free(name); -} - -void arm_cpu_list(void) -{ - GSList *list; - - list =3D object_class_get_list(TYPE_ARM_CPU, false); - list =3D g_slist_sort(list, arm_cpu_list_compare); - qemu_printf("Available CPUs:\n"); - g_slist_foreach(list, arm_cpu_list_entry, NULL); - g_slist_free(list); -} - /* * Private utility function for define_one_arm_cp_reg_with_opaque(): * add a single reginfo struct to the hash table. --=20 2.41.0