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Thu, 21 Dec 2023 09:52:29 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 15/16] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[] Date: Thu, 21 Dec 2023 14:51:36 -0300 Message-ID: <20231221175137.497379-16-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231221175137.497379-1-dbarboza@ventanamicro.com> References: <20231221175137.497379-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::12d; envelope-from=dbarboza@ventanamicro.com; helo=mail-il1-x12d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1703181279523100003 Content-Type: text/plain; charset="utf-8" Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 68 ++++++++++++++++++++++++---------------------- 1 file changed, 36 insertions(+), 32 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b5f754309a..a5607bf1d0 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1895,6 +1895,41 @@ const PropertyInfo prop_mvendorid =3D { .set =3D prop_mvendorid_set, }; =20 +static void prop_mimpid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu =3D riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu =3D RISCV_CPU(obj); + uint64_t prev_val =3D cpu->cfg.mimpid; + uint64_t value; + + if (!visit_type_uint64(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val !=3D value) { + error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")", + object_get_typename(obj), prev_val); + return; + } + + cpu->cfg.mimpid =3D value; +} + +static void prop_mimpid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint64_t value =3D RISCV_CPU(obj)->cfg.mimpid; + + visit_type_uint64(v, name, &value, errp); +} + +const PropertyInfo prop_mimpid =3D { + .name =3D "mimpid", + .get =3D prop_mimpid_get, + .set =3D prop_mimpid_set, +}; + static Property riscv_cpu_properties[] =3D { DEFINE_PROP_BOOL("debug", RISCVCPU, cfg.debug, true), =20 @@ -1920,6 +1955,7 @@ static Property riscv_cpu_properties[] =3D { .set_default =3D true, .defval.u =3D 64}, =20 {.name =3D "mvendorid", .info =3D &prop_mvendorid}, + {.name =3D "mimpid", .info =3D &prop_mimpid}, =20 #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), @@ -1985,35 +2021,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = =3D { }; #endif =20 -static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu =3D riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu =3D RISCV_CPU(obj); - uint64_t prev_val =3D cpu->cfg.mimpid; - uint64_t value; - - if (!visit_type_uint64(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val !=3D value) { - error_setg(errp, "Unable to change %s mimpid (0x%" PRIu64 ")", - object_get_typename(obj), prev_val); - return; - } - - cpu->cfg.mimpid =3D value; -} - -static void cpu_get_mimpid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint64_t value =3D RISCV_CPU(obj)->cfg.mimpid; - - visit_type_uint64(v, name, &value, errp); -} - static void cpu_set_marchid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -2094,9 +2101,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void= *data) cc->gdb_arch_name =3D riscv_gdb_arch_name; cc->gdb_get_dynamic_xml =3D riscv_gdb_get_dynamic_xml; =20 - object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid, - cpu_set_mimpid, NULL, NULL); - object_class_property_add(c, "marchid", "uint64", cpu_get_marchid, cpu_set_marchid, NULL, NULL); =20 --=20 2.43.0