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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f5-20020a5d5685000000b0033657376b62sm12007754wrv.105.2023.12.19.11.13.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 11:13:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703013201; x=1703618001; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=h3V71XAx3UDA0zBtoUkIA2yNtSzC2BWFrBTkEOk1jT4=; b=rHYclgNF2FmdSJqPqjaIx07zD4O4ZilkQt7JXensIj6uWK65XUsWO0Uks8F1QS8+tM qHZpxqRtM9Asp2OfrtTJEAAXPeBwD2cT5tD0ip0eOkwKW0IZAOi61yoT0Xg7oxx46qZJ dLPdwfYgiJeUNbZ/gAbD6I7YBbIF2VJXE65zDU5a9zEobnVLlu6RjFTdYZfT00ZHphvr /97PEVaLD49/aKP+NMxVEdkihUwEYU2bWxMxBFmhqtGqDKd3N0tgAhub9JL6twMgwtyh Uxik1paI07dTGkbnAVrrnfi3krgSZ3mvGmIbr1+7Iv7LksIyTaNyHkJ/tuSFxbRd/zTD UYdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703013201; x=1703618001; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h3V71XAx3UDA0zBtoUkIA2yNtSzC2BWFrBTkEOk1jT4=; b=oZM2JABsmT4JDxlfST8S7jFD64qPR3Y3ymhNQsC0zloetkmq7XNrutg3Q8+ebupxic SKBng26yK6ilwgEZIF0WwlDEOxucvsQv+tXdImEuCF86lun1CB3HujiovwBWBPDBeC1R AWbr7ec1LVDtzKb81tf+XznPCTPKFJwaaOS5Jy9jDt6Iq1dUZn3w9K9yvXGzw4LXLyM+ qyoWfyddcO1117UwMKoxlsnPARaZm/UJcMgGMlF996fyhsdsAQamBhHdZJKD9RwZNQZW u8qQ6pGX4XVtJM/6SfEEIZFqLkbbZt5b6nH41pop1S8n2OexP1+p70JXaJdFQFLCP59c bvmg== X-Gm-Message-State: AOJu0YzKuXiBjARyX54bH9wQFte06wLusmr9RT+yIUWbgYeWm4XNTZCE +vEud7iqEzN/TXFOojF7oxzOvXxI6Heb7ttzIhQ= X-Google-Smtp-Source: AGHT+IE7IQCmULk4WrzZ0HxkPqv0tYHYAbWSaueyrg+Fcl/Rcr3RKFJlAk1SpNWI96zkjlWPSaOY0A== X-Received: by 2002:a05:6000:1f0f:b0:336:6dad:2698 with SMTP id bv15-20020a0560001f0f00b003366dad2698mr1003805wrb.82.1703013201313; Tue, 19 Dec 2023 11:13:21 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/43] target/arm/kvm: Have kvm_arm_sve_get_vls take a ARMCPU argument Date: Tue, 19 Dec 2023 19:12:50 +0000 Message-Id: <20231219191307.2895919-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219191307.2895919-1-peter.maydell@linaro.org> References: <20231219191307.2895919-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1703013459927100008 From: Philippe Mathieu-Daud=C3=A9 Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan Message-id: 20231123183518.64569-6-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/kvm_arm.h | 6 +++--- target/arm/cpu64.c | 2 +- target/arm/kvm.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 3abbef02601..d6d999b1ff8 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -129,13 +129,13 @@ void kvm_arm_destroy_scratch_host_vcpu(int *fdarray); =20 /** * kvm_arm_sve_get_vls: - * @cs: CPUState + * @cpu: ARMCPU * * Get all the SVE vector lengths supported by the KVM host, setting * the bits corresponding to their length in quadwords minus one * (vq - 1) up to ARM_MAX_VQ. Return the resulting map. */ -uint32_t kvm_arm_sve_get_vls(CPUState *cs); +uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu); =20 /** * kvm_arm_set_cpu_features_from_host: @@ -278,7 +278,7 @@ static inline void kvm_arm_steal_time_finalize(ARMCPU *= cpu, Error **errp) g_assert_not_reached(); } =20 -static inline uint32_t kvm_arm_sve_get_vls(CPUState *cs) +static inline uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) { g_assert_not_reached(); } diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1e9c6c85aec..8e30a7993ea 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -66,7 +66,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) */ if (kvm_enabled()) { if (kvm_arm_sve_supported()) { - cpu->sve_vq.supported =3D kvm_arm_sve_get_vls(CPU(cpu)); + cpu->sve_vq.supported =3D kvm_arm_sve_get_vls(cpu); vq_supported =3D cpu->sve_vq.supported; } else { assert(!cpu_isar_feature(aa64_sve, cpu)); diff --git a/target/arm/kvm.c b/target/arm/kvm.c index e9c6e2e17c1..132a1b47d04 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1801,7 +1801,7 @@ bool kvm_arm_sve_supported(void) =20 QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN !=3D 1); =20 -uint32_t kvm_arm_sve_get_vls(CPUState *cs) +uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu) { /* Only call this function if kvm_arm_sve_supported() returns true. */ static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS]; --=20 2.34.1