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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f5-20020a5d5685000000b0033657376b62sm12007754wrv.105.2023.12.19.11.13.20 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 11:13:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703013201; x=1703618001; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=d/ifw9z6r6bmX0fdH0IVqZ7YqgrTTUGMwKeFbCj1mN8=; b=lUHh8iXgSg0FZIk6wVxdPfVFJF9sUTGd0Jb0xjUNZFmXNxWkor2jSDZpew8fYTg6kO 9M/xEgU42sagv4jQQJGIcQyd2c0ji8ntnbldFi5XwrtDBOOeEvxbq2Vhwx5uGFmx+j0x WK4J1u3OLeBChR4lXVi51ttDVtNLzFbEZ4R1HtFskeZOexBCWfDqlbwhhNr6EuVX8VLL Q2wamH/ie00wS5X3K6PT2w7XoD0MBm3dEemEJXk0rMrVMPjTJ7lwXKsxhYOj+WFXNOhN +0PRdym6BpU8PfWu+O2vcJDl8n+er67e21EfRffLYPFrxozIYXuFjRS5P9t4kjsqPJD1 j5CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703013201; x=1703618001; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=d/ifw9z6r6bmX0fdH0IVqZ7YqgrTTUGMwKeFbCj1mN8=; b=Z64aF2pjbyhiKSa7tqHt0BSl/vzDvk8/TowhKWv8SSsWxYHur0uDC1bkzAmvksE5DA Yo42WFC7mKhWXtPyCqHF8SjrUbTRgAQUnzL1QgEtE1Yjw1IBT11uCpFAzSzvrD1XRL7x SdhL7oWJEkdyEYg0RL03HuSbLCh6V7bW/KEOy06U7WbnghcFqASj5RleKv4EPABNE169 /REzrMHZ9pMkwU3IU8TI42ZB8Q695G6MoxV7P/NYUavRR0pDWiWc39LyWInNpgeV6lC8 MJ9bYT4AA98oSPUinfFaY19XHRgfoMAqHJGgA0vlrqBUNc6cJPSYGD2EAvOSccJol1zf TJwg== X-Gm-Message-State: AOJu0Yx4OhauN5cQYnut8SPv3h8jXlA2+SJKxKQVQz724ka3U74LSxYB E7zNXsKAWkUfDYQ6ikCg1IpN0avWw2/iZijYGe8= X-Google-Smtp-Source: AGHT+IFgIrz/QiNB9uiDfy8HkVl4kbEuMVbU6wKiM4MBmw30L4D/z893FaazOueV+lKQHMxSuJMAlQ== X-Received: by 2002:a05:6000:1d84:b0:336:1fcf:5aec with SMTP id bk4-20020a0560001d8400b003361fcf5aecmr10149644wrb.55.1703013200759; Tue, 19 Dec 2023 11:13:20 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/43] target/arm/kvm: Have kvm_arm_sve_set_vls take a ARMCPU argument Date: Tue, 19 Dec 2023 19:12:49 +0000 Message-Id: <20231219191307.2895919-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231219191307.2895919-1-peter.maydell@linaro.org> References: <20231219191307.2895919-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1703013333461100006 From: Philippe Mathieu-Daud=C3=A9 Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan Message-id: 20231123183518.64569-5-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/kvm.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index e5a2596890b..e9c6e2e17c1 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1855,14 +1855,13 @@ uint32_t kvm_arm_sve_get_vls(CPUState *cs) return vls[0]; } =20 -static int kvm_arm_sve_set_vls(CPUState *cs) +static int kvm_arm_sve_set_vls(ARMCPU *cpu) { - ARMCPU *cpu =3D ARM_CPU(cs); uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] =3D { cpu->sve_vq.map }; =20 assert(cpu->sve_max_vq <=3D KVM_ARM64_SVE_VQ_MAX); =20 - return kvm_set_one_reg(cs, KVM_REG_ARM64_SVE_VLS, &vls[0]); + return kvm_set_one_reg(CPU(cpu), KVM_REG_ARM64_SVE_VLS, &vls[0]); } =20 #define ARM_CPU_ID_MPIDR 3, 0, 0, 0, 5 @@ -1919,7 +1918,7 @@ int kvm_arch_init_vcpu(CPUState *cs) } =20 if (cpu_isar_feature(aa64_sve, cpu)) { - ret =3D kvm_arm_sve_set_vls(cs); + ret =3D kvm_arm_sve_set_vls(cpu); if (ret) { return ret; } --=20 2.34.1