From nobody Wed Nov 27 00:23:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1702060807; cv=none; d=zohomail.com; s=zohoarc; b=WhpMzSPyPTyz5xGHz/i5GMjQzVqjdAKmn4gbHJ0EsnuiQfb4E8EWNj3Oux+bzN3OltM0J41heoopsOlIiPWGwC2uTA0IZghyylI9UBuEpN07whox7bEEZMYyGg2rhLLQaptaL0vMQWBs2T9g2VAD3MEoJGqcufiTQ7fs9+OCNEQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1702060807; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=AuGWTzZ9lGLSBA940/xkiCPkW9T/I5CIydcq77Q1d74=; b=S3bJMkqvxdZrjqZkrMgdKX+EW6oiaPO53+SNuwiKcT6nJcs5/CBFi6KivNs4x6hrxV7lsacrv5rUdnL6y84qXYWxbCFeWggWUEfb0ab5+P7vB1zafo8RyYXotVXeHOjCq3ZE8r385R4/kEhmbgBEWP8PD0xlpx2V+sIwoWBXWmo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1702060807017529.4271353371221; Fri, 8 Dec 2023 10:40:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBfkZ-0006BF-FK; Fri, 08 Dec 2023 13:38:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBfkQ-00069F-Cf for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:51 -0500 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBfkN-0008Sr-Dg for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:49 -0500 Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-5c66418decaso1700061a12.3 for ; Fri, 08 Dec 2023 10:38:47 -0800 (PST) Received: from grind.. ([152.234.124.8]) by smtp.gmail.com with ESMTPSA id sk13-20020a17090b2dcd00b002864c14063fsm2190709pjb.20.2023.12.08.10.38.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 10:38:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702060725; x=1702665525; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AuGWTzZ9lGLSBA940/xkiCPkW9T/I5CIydcq77Q1d74=; b=KUw0OvjkbauvZ6CLuTtZRAcK5xfzERdCboFYd9wELTZ+KhF59/qZZdf0qJN6XLeV2E s5c7kVjsrt2mGmn4Y8kYW1H1KpiAe5V5uM3xBfjjX+M5WW0C8Uy0yoHep71u86imQ0u7 SrD6lZLcRrCvrtEKX+a2C1h0xwieLsnWfo4bhoEEWzLeRekRbrL0vuUpeExN8xMNTK+3 zIhaVuv45JdHrqc0EAkZTpaw1dgYFQJ3xV8+T/1jPwNOv3d8LWDhAvHn+EvZVfQ6JEqN Y+LoIA4Fwrkj5Yxj0bbUtFT2im/lIMnr0cILcRICbYowjytGOJm1s8Ze1/4jNi5Z9K+z bjzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702060725; x=1702665525; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AuGWTzZ9lGLSBA940/xkiCPkW9T/I5CIydcq77Q1d74=; b=OiLhIKDR7bO7iee+phI5PEeVGRonmr9zctgKDBGRG0Ygnzq3Q31MkvZYO6oBbCcRed 98cuNDvjAACcVR85mnwtGMk6JkY2HLxDUXiGzenzqlfDtbI26a94cznnTfR+4QPKHyuz QGbhpQy06uOUKIktAvSzfjsGTErMP8xx2eNYbBArG1TUiwAQQZeKK8qhcEhfNGnfoTLy ioeYY7y56+ZGLibNP4iom8DVRNFR0K4sXqwEqBmUNk8LU01YJiI4wW4K+uZq+VvOaszf q3Zga61p4TlcoVZ0oFmrfhcVNigIkxYg0rpxJ4z/ZtLIDzEsEn47KQKKRc4XzxCZLVZz /nYA== X-Gm-Message-State: AOJu0YyPcb5FVzN6k3JTW740JrkeXeXRs+mL7RQerjEkUruuzFqv6ZHj wYrTzJ+TgC2KWTAKNbsWo7+3Ak4Rd1obreXfBEY= X-Google-Smtp-Source: AGHT+IGdVpXA0hlOtd7TGFa+vSPyRm7AheFjWwNpYhmjpKNSV2jZHicDPkkHQcRvH4ZCBtmPtEG5LQ== X-Received: by 2002:a05:6a20:4caa:b0:18f:97c:5b95 with SMTP id fq42-20020a056a204caa00b0018f097c5b95mr307352pzb.99.1702060725281; Fri, 08 Dec 2023 10:38:45 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 1/5] target/riscv/kvm: change KVM_REG_RISCV_FP_F to u32 Date: Fri, 8 Dec 2023 15:38:31 -0300 Message-ID: <20231208183835.2411523-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208183835.2411523-1-dbarboza@ventanamicro.com> References: <20231208183835.2411523-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=dbarboza@ventanamicro.com; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1702060807915100015 Content-Type: text/plain; charset="utf-8" KVM_REG_RISCV_FP_F regs have u32 size according to the API, but by using kvm_riscv_reg_id() in RISCV_FP_F_REG() we're returning u64 sizes when running with TARGET_RISCV64. The most likely reason why no one noticed this is because we're not implementing kvm_cpu_synchronize_state() in RISC-V yet. Create a new helper that returns a KVM ID with u32 size and use it in RISCV_FP_F_REG(). Reported-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 45b6cf1cfa..9bfbc4ac98 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -72,6 +72,11 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uin= t64_t type, return id; } =20 +static uint64_t kvm_riscv_reg_id_u32(uint64_t type, uint64_t idx) +{ + return KVM_REG_RISCV | KVM_REG_SIZE_U32 | type | idx; +} + #define RISCV_CORE_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_COR= E, \ KVM_REG_RISCV_CORE_REG(name)) =20 @@ -81,7 +86,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint= 64_t type, #define RISCV_TIMER_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_TI= MER, \ KVM_REG_RISCV_TIMER_REG(name)) =20 -#define RISCV_FP_F_REG(env, idx) kvm_riscv_reg_id(env, KVM_REG_RISCV_FP_F= , idx) +#define RISCV_FP_F_REG(idx) kvm_riscv_reg_id_u32(KVM_REG_RISCV_FP_F, idx) =20 #define RISCV_FP_D_REG(env, idx) kvm_riscv_reg_id(env, KVM_REG_RISCV_FP_D= , idx) =20 @@ -586,7 +591,7 @@ static int kvm_riscv_get_regs_fp(CPUState *cs) if (riscv_has_ext(env, RVF)) { uint32_t reg; for (i =3D 0; i < 32; i++) { - ret =3D kvm_get_one_reg(cs, RISCV_FP_F_REG(env, i), ®); + ret =3D kvm_get_one_reg(cs, RISCV_FP_F_REG(i), ®); if (ret) { return ret; } @@ -620,7 +625,7 @@ static int kvm_riscv_put_regs_fp(CPUState *cs) uint32_t reg; for (i =3D 0; i < 32; i++) { reg =3D env->fpr[i]; - ret =3D kvm_set_one_reg(cs, RISCV_FP_F_REG(env, i), ®); + ret =3D kvm_set_one_reg(cs, RISCV_FP_F_REG(i), ®); if (ret) { return ret; } --=20 2.41.0 From nobody Wed Nov 27 00:23:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1702060801; cv=none; d=zohomail.com; s=zohoarc; b=bXomC2vYmwnRd1aJGUxu7QkqQclmqUsFXDQE/ALbt7SCfx5Z07w/HvjifwdX8STICGjYvcswEcv4ZeSbWoYJoJV+Zi+2wtRvdtG8KEfrbNRtZ0ekQOW9KT4x9QLlkQ8coWV73uA3B8Wa/vvmBZyx8JTBYppvwxXr2EC8kldjsZc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1702060801; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=g99zgwaBh2/HEzbH/4woDHxTvwBcpq3eb1Kqmu2F8XQ=; b=UvRNiI6S1UhJmppcXSqZJ5Le6dPjtwRgJdIs81FBUikl8aCQdNF3rnE1GIh9W/WIhXYv28wEu2Un6/M3CZIUTcxiI6H2rMh2QQCVNE3Vx0Np9PrR/e/jZOopquZ+hlIOsn2FV7BYXwYd/GKQEfDtNAMpIq5isErxSU/CLAeBkrA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170206080109894.76840870402327; Fri, 8 Dec 2023 10:40:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBfka-0006CM-3T; Fri, 08 Dec 2023 13:39:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBfkT-00069b-Hv for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:54 -0500 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBfkQ-0008TH-5a for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:53 -0500 Received: by mail-pg1-x530.google.com with SMTP id 41be03b00d2f7-5c66418decaso1700083a12.3 for ; Fri, 08 Dec 2023 10:38:49 -0800 (PST) Received: from grind.. ([152.234.124.8]) by smtp.gmail.com with ESMTPSA id sk13-20020a17090b2dcd00b002864c14063fsm2190709pjb.20.2023.12.08.10.38.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 10:38:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702060728; x=1702665528; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g99zgwaBh2/HEzbH/4woDHxTvwBcpq3eb1Kqmu2F8XQ=; b=Nahd8Y0vsFfDlKXgC5y6y84nz2PFH0JD+Mx0GAMWWNCg9c725hHJLq5uRV+UadduIU HumzL3RhQYtgKc+r4mM08JYCSNwY8tp1SuqbEq3omTqKUydq9p1FGrRxezOwupg7uLeh wIwXBN+0g5zQBsZoakNHy9hz7KsjBQrpXTa+XNOIbGW1OaOnRYMOiAvvg2WvPe0jSllv sQ+f3UMWjqRIFTrAHicpkfubK00KRZ5vKco7G52Z2/SwxNzuCnnUmDjgtOKDjjGo3cGS Ha9S7R0EhrEm/2kcSky3Jeapez+thYBfaRVW4ksjOsoX55puQapqtNR0XJ4R5FJBbpZg vVeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702060728; x=1702665528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g99zgwaBh2/HEzbH/4woDHxTvwBcpq3eb1Kqmu2F8XQ=; b=dfXshQgNKWxKn0fl6fC4Wi8CzfmqWzCV05zAw9rfNtc41p8pq3mk1MBXe068xJIjL9 1g12Z+MDo2MaMvFDoi49p1xKePzmgmCR3ubD75LLEEo2pkh0HlmSpmb6wfF1vmuqsdPO esKjBgtqRj2vJH46Z2690Amhpsd5uizeiMZoO9GNWP9KR9WvnYFeZKY3L1Qf44QlmbIe 9POuCI0KEhP3sn90Fd71qDspa7vNPa6GyV3BFWrL4BfBNkBGwF9dBcwY14lpa84CjPVN k6KPfuV1Yll6dpH3E/K1Na9sjLfhOe3D0IXkIybUSGJUhe4myq0mxc0GPAfJsWP/uts5 vkWA== X-Gm-Message-State: AOJu0Yy/5cIet/iMidOXhih6vb7v4hftHtnCusbpPwWWFzyvaJSqTaPx LmmGYfsJUU8CchFCMBeixJ553iblSBNKCFNViWY= X-Google-Smtp-Source: AGHT+IEOtFRdMbkRYMtVlhsVujzhus6SMj+2Uc5PWHpp0Q9c9GMZ7d6AygFqhl+P6SStzc3fYiniUA== X-Received: by 2002:a17:90b:890:b0:286:6cc0:b90b with SMTP id bj16-20020a17090b089000b002866cc0b90bmr432384pjb.66.1702060728312; Fri, 08 Dec 2023 10:38:48 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 2/5] target/riscv/kvm: change KVM_REG_RISCV_FP_D to u64 Date: Fri, 8 Dec 2023 15:38:32 -0300 Message-ID: <20231208183835.2411523-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208183835.2411523-1-dbarboza@ventanamicro.com> References: <20231208183835.2411523-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=dbarboza@ventanamicro.com; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1702060801945100001 Content-Type: text/plain; charset="utf-8" KVM_REG_RISCV_FP_D regs are always u64 size. Using kvm_riscv_reg_id() in RISCV_FP_D_REG() ends up encoding the wrong size if we're running with TARGET_RISCV32. Create a new helper that returns a KVM ID with u64 size and use it with RISCV_FP_D_REG(). Reported-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 9bfbc4ac98..34ed82ebe5 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -77,6 +77,11 @@ static uint64_t kvm_riscv_reg_id_u32(uint64_t type, uint= 64_t idx) return KVM_REG_RISCV | KVM_REG_SIZE_U32 | type | idx; } =20 +static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint64_t idx) +{ + return KVM_REG_RISCV | KVM_REG_SIZE_U64 | type | idx; +} + #define RISCV_CORE_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_COR= E, \ KVM_REG_RISCV_CORE_REG(name)) =20 @@ -88,7 +93,7 @@ static uint64_t kvm_riscv_reg_id_u32(uint64_t type, uint6= 4_t idx) =20 #define RISCV_FP_F_REG(idx) kvm_riscv_reg_id_u32(KVM_REG_RISCV_FP_F, idx) =20 -#define RISCV_FP_D_REG(env, idx) kvm_riscv_reg_id(env, KVM_REG_RISCV_FP_D= , idx) +#define RISCV_FP_D_REG(idx) kvm_riscv_reg_id_u64(KVM_REG_RISCV_FP_D, idx) =20 #define KVM_RISCV_GET_CSR(cs, env, csr, reg) \ do { \ @@ -579,7 +584,7 @@ static int kvm_riscv_get_regs_fp(CPUState *cs) if (riscv_has_ext(env, RVD)) { uint64_t reg; for (i =3D 0; i < 32; i++) { - ret =3D kvm_get_one_reg(cs, RISCV_FP_D_REG(env, i), ®); + ret =3D kvm_get_one_reg(cs, RISCV_FP_D_REG(i), ®); if (ret) { return ret; } @@ -613,7 +618,7 @@ static int kvm_riscv_put_regs_fp(CPUState *cs) uint64_t reg; for (i =3D 0; i < 32; i++) { reg =3D env->fpr[i]; - ret =3D kvm_set_one_reg(cs, RISCV_FP_D_REG(env, i), ®); + ret =3D kvm_set_one_reg(cs, RISCV_FP_D_REG(i), ®); if (ret) { return ret; } --=20 2.41.0 From nobody Wed Nov 27 00:23:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1702060801; cv=none; d=zohomail.com; s=zohoarc; b=kvwQ3Mdy6HTXhmBE7ubAtPh3VOgVJUvLQ5gh4nC4PjNALibLJciDugoc+nXm8xu2eARAi1+kyq0tEVuKI0byCpspQ/e8Y2AcMKOXcxYnCgRsLQgxYc9cKA9+a1DJ9sSG6aKJ+umbizAk87lbgPurkqjYV4FXOs7Yu+nyehnbYVg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1702060801; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=hPwJtAXApDrIUg5rSZaBlMF2+8X83cxrveamFWPFeEQ=; b=NbHjsV0hbdRijU4SVLZMR29EC6IK7KAifex9LbnptJGCOED+PGbLcmo8NCIsqDsZIhrBHUH9ZTknMTd85inTUZokRHdt3BXp5cqbUsN3E3Egzsqz4y9TUoMKY6VActYZyRmBdrXqJi7zVUeC3LWaRXuI++VelDZa1m/yEj0sjEQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170206080173124.527313037533077; Fri, 8 Dec 2023 10:40:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBfka-0006Ca-NX; Fri, 08 Dec 2023 13:39:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBfkX-0006Aj-DN for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:57 -0500 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBfkT-0008Tv-Lx for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:38:57 -0500 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-5c66988c2eeso1815498a12.1 for ; Fri, 08 Dec 2023 10:38:53 -0800 (PST) Received: from grind.. ([152.234.124.8]) by smtp.gmail.com with ESMTPSA id sk13-20020a17090b2dcd00b002864c14063fsm2190709pjb.20.2023.12.08.10.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 10:38:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702060731; x=1702665531; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hPwJtAXApDrIUg5rSZaBlMF2+8X83cxrveamFWPFeEQ=; b=mw/skWcyjU2QHDhW+Zu5I9HXjcAmQIa183ljs4arSANOc4bBZ6LH2RjPgxgj7Ukzjp HSWiXIFZCpSV280EgpPjhKXpDU0GNGkqykhCs14ripw8IOh5aJb1G/wfzhTvGCITqo4V IKT5RC9zJlQDaDoe7L35YAEAZPxa9DG6uH8uuV6iVVzund13RKAmxrq1QJQ0Utlp3r+v fIPZzzVC0hh3WJtxXrFwH239HIVL7T6Ky1btQrQPttJhV7/kmHGp8TnBUH6/5QiJTzWJ uGGxk7DpcqiG29/mNGoXhZ3BTy2kcSdCFgy8fINQBlEQserHZjsryhJ/LQ9v1NQsTNhO 0lTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702060731; x=1702665531; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hPwJtAXApDrIUg5rSZaBlMF2+8X83cxrveamFWPFeEQ=; b=s11pRcckIP+ApbJVUV4J0rSu7HW0YkycWQCBDrOosUn74Axx5mujWSjSVT2+gRnYGO EUnN0Dd3YLU98hbNYDBhepGH62w9kccUwgpIS+ZCnFsNw1ln0BopojqS/ojMAlQs0vR2 A2uBgzB6pg35Jwp2Yyp1NUjg9xgSnI6o00L/HWSsacYdYiK9181GG2amXqZVUF6+PSD5 kbsFe3UVDwbrTkD7BsS3r6lnqme1lWVxRmoX40QNexm8+zwBYqGYV9/wWqh0Lp23vLdO nO9ERp8nunQquQCmdeRPGfrbd8oEpBs9QZyFDDgGmGOsL1OCGXWzoU3D4Iji77Q1AQx6 5r4w== X-Gm-Message-State: AOJu0YyWaiRvruPV/pzoA8THUqhzFW+qiqFysSdkDgbGD9Mr31+CNA2O CVPzii/g4AoJwc+unZkg/Q8SFOUbCoaFCwqZJMg= X-Google-Smtp-Source: AGHT+IFrq3IvKskYKVKmZb7oUKn9GHMutoAffayi/XAS1SC4NHCKeQKfaVtSVkDaMn8Ir3Sm9ko/4A== X-Received: by 2002:a17:90a:3049:b0:286:6cd8:ef12 with SMTP id q9-20020a17090a304900b002866cd8ef12mr1714425pjl.42.1702060731515; Fri, 08 Dec 2023 10:38:51 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 3/5] target/riscv/kvm: change timer regs size to u64 Date: Fri, 8 Dec 2023 15:38:33 -0300 Message-ID: <20231208183835.2411523-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208183835.2411523-1-dbarboza@ventanamicro.com> References: <20231208183835.2411523-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=dbarboza@ventanamicro.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1702060803816100006 Content-Type: text/plain; charset="utf-8" KVM_REG_RISCV_TIMER regs are always u64 according to the KVM API, but at this moment we'll return u32 regs if we're running a RISCV32 target. Use the kvm_riscv_reg_id_u64() helper in RISCV_TIMER_REG() to fix it. Reported-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 34ed82ebe5..476e5d4b3d 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -88,7 +88,7 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint6= 4_t idx) #define RISCV_CSR_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR,= \ KVM_REG_RISCV_CSR_REG(name)) =20 -#define RISCV_TIMER_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_TI= MER, \ +#define RISCV_TIMER_REG(name) kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \ KVM_REG_RISCV_TIMER_REG(name)) =20 #define RISCV_FP_F_REG(idx) kvm_riscv_reg_id_u32(KVM_REG_RISCV_FP_F, idx) @@ -111,17 +111,17 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, u= int64_t idx) } \ } while (0) =20 -#define KVM_RISCV_GET_TIMER(cs, env, name, reg) \ +#define KVM_RISCV_GET_TIMER(cs, name, reg) \ do { \ - int ret =3D kvm_get_one_reg(cs, RISCV_TIMER_REG(env, name), ®);= \ + int ret =3D kvm_get_one_reg(cs, RISCV_TIMER_REG(name), ®); \ if (ret) { \ abort(); \ } \ } while (0) =20 -#define KVM_RISCV_SET_TIMER(cs, env, name, reg) \ +#define KVM_RISCV_SET_TIMER(cs, name, reg) \ do { \ - int ret =3D kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), ®);= \ + int ret =3D kvm_set_one_reg(cs, RISCV_TIMER_REG(name), ®); \ if (ret) { \ abort(); \ } \ @@ -649,10 +649,10 @@ static void kvm_riscv_get_regs_timer(CPUState *cs) return; } =20 - KVM_RISCV_GET_TIMER(cs, env, time, env->kvm_timer_time); - KVM_RISCV_GET_TIMER(cs, env, compare, env->kvm_timer_compare); - KVM_RISCV_GET_TIMER(cs, env, state, env->kvm_timer_state); - KVM_RISCV_GET_TIMER(cs, env, frequency, env->kvm_timer_frequency); + KVM_RISCV_GET_TIMER(cs, time, env->kvm_timer_time); + KVM_RISCV_GET_TIMER(cs, compare, env->kvm_timer_compare); + KVM_RISCV_GET_TIMER(cs, state, env->kvm_timer_state); + KVM_RISCV_GET_TIMER(cs, frequency, env->kvm_timer_frequency); =20 env->kvm_timer_dirty =3D true; } @@ -666,8 +666,8 @@ static void kvm_riscv_put_regs_timer(CPUState *cs) return; } =20 - KVM_RISCV_SET_TIMER(cs, env, time, env->kvm_timer_time); - KVM_RISCV_SET_TIMER(cs, env, compare, env->kvm_timer_compare); + KVM_RISCV_SET_TIMER(cs, time, env->kvm_timer_time); + KVM_RISCV_SET_TIMER(cs, compare, env->kvm_timer_compare); =20 /* * To set register of RISCV_TIMER_REG(state) will occur a error from K= VM @@ -676,7 +676,7 @@ static void kvm_riscv_put_regs_timer(CPUState *cs) * TODO If KVM changes, adapt here. */ if (env->kvm_timer_state) { - KVM_RISCV_SET_TIMER(cs, env, state, env->kvm_timer_state); + KVM_RISCV_SET_TIMER(cs, state, env->kvm_timer_state); } =20 /* @@ -685,7 +685,7 @@ static void kvm_riscv_put_regs_timer(CPUState *cs) * during the migration. */ if (migration_is_running(migrate_get_current()->state)) { - KVM_RISCV_GET_TIMER(cs, env, frequency, reg); + KVM_RISCV_GET_TIMER(cs, frequency, reg); if (reg !=3D env->kvm_timer_frequency) { error_report("Dst Hosts timer frequency !=3D Src Hosts"); } --=20 2.41.0 From nobody Wed Nov 27 00:23:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([152.234.124.8]) by smtp.gmail.com with ESMTPSA id sk13-20020a17090b2dcd00b002864c14063fsm2190709pjb.20.2023.12.08.10.38.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 10:38:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702060735; x=1702665535; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NDUfXfcWCozOr3YgPfrQcgZ6dHfOfa/IJlJz1rUOmVs=; b=Lh4uGZHE7CCxi8LRDEOsVbSVjUKk0U79gztgTYBR1/vIdCAuoPfmQxENj04fiRAN/8 ErL8m4tqtGUwie7daQqO+KAtCG3whu0mDRSxOvV7Vkz5HS1vUfgV7XJGUH8l1zjeBHIY LggUnV2oKU87EYeBxKOb2RDYSvBgvUvOr8b08wxRsbxkJBTyq4CuhZVUmxvwLcGxmiRs N2vR3705uawMkH4kg3quZuZl95RaDm0EtU288+2XDpPe6BBfkE07jGF84vSgHlvZYatx mv8Nxg+lS310CdqotRvSR0/9RTS7DGBQ02NeblzpKC6eWEM0Sy2j/fKNiOziJPAwgjkV RuJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702060735; x=1702665535; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NDUfXfcWCozOr3YgPfrQcgZ6dHfOfa/IJlJz1rUOmVs=; b=TdURLj2V8d01337+URNdmSCGLI6t83fXl2Bs+6XX2wEByYoNZhFmdN/eIaImM/+xCb tGKjNuUPiZ+A8tGYoPFVkX+IGRtVnTw48qavGQPLcWb2kYEPRHvATp3tlmTqrv4tfyvA AE0ZjbQqCN7zuZn8l+zxxYK0/H+jJ1oH6SqplPYlP0ICidijSVX+yXg9FMfGCaINjyKA UyPNVRonfzyZogJT9JQQrMrmukABW9olhSYVD9YsUiWa+BUcyzJ6RHID6EFY4mbPuUx+ Trwds2OE1vLlalh3tKryt4icPX+vokBxVY7nN7/sEx9AghJc06MGfoIWqbzGvA59P1MW Z7Ag== X-Gm-Message-State: AOJu0YyRudI7crgZIDsYqQtba4C+tgf6W2uyVgkn2AxKutOhOwW2QBgI JJoJR/81dAWttMjzokX4tmyRgVNl6N3JYrdiOQc= X-Google-Smtp-Source: AGHT+IF5vNV7Ckzv3fFEibjYzWgBzqp+D4YZC+h1rf/ORom4P6rwIkG+3vr2+xs783PpYkpqrTZtOQ== X-Received: by 2002:a17:90a:3482:b0:286:6cc1:8670 with SMTP id p2-20020a17090a348200b002866cc18670mr446596pjb.85.1702060735222; Fri, 08 Dec 2023 10:38:55 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 4/5] target/riscv/kvm: add RISCV_CONFIG_REG() Date: Fri, 8 Dec 2023 15:38:34 -0300 Message-ID: <20231208183835.2411523-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208183835.2411523-1-dbarboza@ventanamicro.com> References: <20231208183835.2411523-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=dbarboza@ventanamicro.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1702060822349100001 Content-Type: text/plain; charset="utf-8" Create a RISCV_CONFIG_REG() macro, similar to what other regs use, to hide away some of the boilerplate. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 476e5d4b3d..11797338ec 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -88,6 +88,10 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint= 64_t idx) #define RISCV_CSR_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR,= \ KVM_REG_RISCV_CSR_REG(name)) =20 +#define RISCV_CONFIG_REG(env, name) \ + kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, \ + KVM_REG_RISCV_CONFIG_REG(name)) + #define RISCV_TIMER_REG(name) kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \ KVM_REG_RISCV_TIMER_REG(name)) =20 @@ -756,24 +760,21 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu) struct kvm_one_reg reg; int ret; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mvendorid)); + reg.id =3D RISCV_CONFIG_REG(env, mvendorid); reg.addr =3D (uint64_t)&cpu->cfg.mvendorid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { error_report("Unable to retrieve mvendorid from host, error %d", r= et); } =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(marchid)); + reg.id =3D RISCV_CONFIG_REG(env, marchid); reg.addr =3D (uint64_t)&cpu->cfg.marchid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { error_report("Unable to retrieve marchid from host, error %d", ret= ); } =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mimpid)); + reg.id =3D RISCV_CONFIG_REG(env, mimpid); reg.addr =3D (uint64_t)&cpu->cfg.mimpid; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { @@ -788,8 +789,7 @@ static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu, struct kvm_one_reg reg; int ret; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(isa)); + reg.id =3D RISCV_CONFIG_REG(env, isa); reg.addr =3D (uint64_t)&env->misa_ext_mask; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); =20 @@ -1094,8 +1094,7 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CP= UState *cs) uint64_t id; int ret; =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mvendorid)); + id =3D RISCV_CONFIG_REG(env, mvendorid); /* * cfg.mvendorid is an uint32 but a target_ulong will * be written. Assign it to a target_ulong var to avoid @@ -1107,15 +1106,13 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, = CPUState *cs) return ret; } =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(marchid)); + id =3D RISCV_CONFIG_REG(env, marchid); ret =3D kvm_set_one_reg(cs, id, &cpu->cfg.marchid); if (ret !=3D 0) { return ret; } =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - KVM_REG_RISCV_CONFIG_REG(mimpid)); + id =3D RISCV_CONFIG_REG(env, mimpid); ret =3D kvm_set_one_reg(cs, id, &cpu->cfg.mimpid); =20 return ret; --=20 2.41.0 From nobody Wed Nov 27 00:23:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1702060805; cv=none; d=zohomail.com; s=zohoarc; b=jIdt78aHfol3yFaBBZ+CJf3SKaAlalnJGRE9Hsyi1n5SxXS7SpRpDhC2qvisX59BSLt+3y8LtZKRWO+PXp01GV5wvL/fNm0tWXI2W2DexYKTbCBM9CoOpuMbtm8qdZguGuBN9MYLzP1TY/70rsdX9z9OPEUo/m950wHlnA1paTo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1702060805; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3JyIYvn4p8JdAgrQKCIVuzNkyuz3/M0LL3H7xDfwCk8=; b=Vt9Hf9AIh4L5Ua/d+Nh4tyDMyM9WiLRYukUnE6NMXY3WQTKmpoFieIZ4+yYdqfJMP0n0d11HBUsoWQNXPqrd1d/3dFWPRx8EN047oN4VcwBzKvoLWTWTBLW1rx1l7o/dbAqZmb9jkHU708BY7SPSVSrG6i1cPwOnixAxiqmEHSk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170206080581364.96621361340135; Fri, 8 Dec 2023 10:40:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rBfke-0006EF-MJ; Fri, 08 Dec 2023 13:39:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rBfkd-0006Di-Ao for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:39:03 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rBfka-0008Uz-6s for qemu-devel@nongnu.org; Fri, 08 Dec 2023 13:39:03 -0500 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1cfb30ce241so21583725ad.0 for ; Fri, 08 Dec 2023 10:38:59 -0800 (PST) Received: from grind.. ([152.234.124.8]) by smtp.gmail.com with ESMTPSA id sk13-20020a17090b2dcd00b002864c14063fsm2190709pjb.20.2023.12.08.10.38.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 10:38:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702060738; x=1702665538; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3JyIYvn4p8JdAgrQKCIVuzNkyuz3/M0LL3H7xDfwCk8=; b=U+xDpXGU3Pb+Egbo9hW+mjrjro29lG1OAkefTXeEMkNmSmR/QLfzw+4FAWr/B7Ij8X s5l9tYes5jQ+N4apvL2/5at52FQGNp8a4d9GCP+spE8CvolZRljoIyU3M6eD3VdRJg+2 Q3oDPMK4+4K//Nic3ReRV6uAmOYOElE4Z08ivaWi5wRhEus3Hy52bHnWAl5cmsK05Vg/ bosa9HZX+qiTLbEz6FgupQLw0F30AcPSWCAVz3WVG0p4GbpTd8LXatHe61ScrmO+KIXW Gic/oXrLOl4R3mXPMFaj5qPSeKmkcCV9RcCSOPwUA+umowvpwXX0wtSRa0IyhXb5DKSA By9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702060738; x=1702665538; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3JyIYvn4p8JdAgrQKCIVuzNkyuz3/M0LL3H7xDfwCk8=; b=d8ocjEMCp0wbcsGxWa5ydZcAGtdtXMAxecedzF0xiD0HfzftFM8xOQJKcOA2TxSJAk yHVkUtimRY0jWjfIkMtlqEtK4AAMakqbS1ryv9gbL1Xe20OEyIF9f0qHkwn6JlGi2XkR FYjBifEm3ogVvOcqE6qiVcd1zKZPEXdylo0pZBj1VeX7QhqONL9gKsYYZapiCPpM8mLM WhbUQLQJX+QdlOcCU2wy8kA+7cK3TTG58p2JuXNJKRNmHxk1LlUXGNNf128bnjnr1zBL 0nPmIo2KIx4+6h1beGNqdvhg2OC0Cd6ABUJu10BHUZ//SGWQNVJRPXa4/rPgIf9XzIWu y0Ow== X-Gm-Message-State: AOJu0YwR0aV4q16F0wtxxgIkpJEnON9shLWeb+2Dev9CdkmCR283bStn x8z2g9hYZUSAc6UZ/6WrOpZoVhMDffQJ31e5on4= X-Google-Smtp-Source: AGHT+IEyMRi3iIzHH3aoWnmsNGAjG2AFYPHP64TxiSSDk+a/qxINo8w2yNZRA8N1wVL1BbhHS6Uy3w== X-Received: by 2002:a17:90b:3591:b0:286:f040:3a13 with SMTP id mm17-20020a17090b359100b00286f0403a13mr500454pjb.19.1702060738424; Fri, 08 Dec 2023 10:38:58 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 5/5] target/riscv/kvm: rename riscv_reg_id() to riscv_reg_id_ulong() Date: Fri, 8 Dec 2023 15:38:35 -0300 Message-ID: <20231208183835.2411523-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208183835.2411523-1-dbarboza@ventanamicro.com> References: <20231208183835.2411523-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1702060807932100016 Content-Type: text/plain; charset="utf-8" kvm_riscv_reg_id() returns an id encoded with an ulong size, i.e. an u32 size when running TARGET_RISCV32 and u64 when running TARGET_RISCV64. Rename it to kvm_riscv_reg_id_ulong() to enhance code readability. It'll be in line with the existing kvm_riscv_reg_id_() helpers. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 40 ++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 11797338ec..62a1e51f0a 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -54,7 +54,7 @@ void riscv_kvm_aplic_request(void *opaque, int irq, int l= evel) =20 static bool cap_has_mp_state; =20 -static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type, +static uint64_t kvm_riscv_reg_id_ulong(CPURISCVState *env, uint64_t type, uint64_t idx) { uint64_t id =3D KVM_REG_RISCV | type | idx; @@ -82,15 +82,17 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uin= t64_t idx) return KVM_REG_RISCV | KVM_REG_SIZE_U64 | type | idx; } =20 -#define RISCV_CORE_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_COR= E, \ - KVM_REG_RISCV_CORE_REG(name)) +#define RISCV_CORE_REG(env, name) \ + kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CORE, \ + KVM_REG_RISCV_CORE_REG(name)) =20 -#define RISCV_CSR_REG(env, name) kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR,= \ - KVM_REG_RISCV_CSR_REG(name)) +#define RISCV_CSR_REG(env, name) \ + kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CSR, \ + KVM_REG_RISCV_CSR_REG(name)) =20 #define RISCV_CONFIG_REG(env, name) \ - kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, \ - KVM_REG_RISCV_CONFIG_REG(name)) + kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG, \ + KVM_REG_RISCV_CONFIG_REG(name)) =20 #define RISCV_TIMER_REG(name) kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \ KVM_REG_RISCV_TIMER_REG(name)) @@ -216,8 +218,8 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu= , CPUState *cs) =20 /* If we're here we're going to disable the MISA bit */ reg =3D 0; - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_ISA_EXT, - misa_cfg->kvm_reg_id); + id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_ISA_EXT, + misa_cfg->kvm_reg_id); ret =3D kvm_set_one_reg(cs, id, ®); if (ret !=3D 0) { /* @@ -378,8 +380,8 @@ static void kvm_riscv_update_cpu_cfg_isa_ext(RISCVCPU *= cpu, CPUState *cs) continue; } =20 - id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_ISA_EXT, - multi_ext_cfg->kvm_reg_id); + id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_ISA_EXT, + multi_ext_cfg->kvm_reg_id); reg =3D kvm_cpu_cfg_get(cpu, multi_ext_cfg); ret =3D kvm_set_one_reg(cs, id, ®); if (ret !=3D 0) { @@ -509,7 +511,7 @@ static int kvm_riscv_get_regs_core(CPUState *cs) env->pc =3D reg; =20 for (i =3D 1; i < 32; i++) { - uint64_t id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CORE, i); + uint64_t id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CORE, i); ret =3D kvm_get_one_reg(cs, id, ®); if (ret) { return ret; @@ -534,7 +536,7 @@ static int kvm_riscv_put_regs_core(CPUState *cs) } =20 for (i =3D 1; i < 32; i++) { - uint64_t id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CORE, i); + uint64_t id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CORE, i); reg =3D env->gpr[i]; ret =3D kvm_set_one_reg(cs, id, ®); if (ret) { @@ -810,8 +812,8 @@ static void kvm_riscv_read_cbomz_blksize(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu, struct kvm_one_reg reg; int ret; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, - cbomz_cfg->kvm_reg_id); + reg.id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CONFIG, + cbomz_cfg->kvm_reg_id); reg.addr =3D (uint64_t)kvmconfig_get_cfg_addr(cpu, cbomz_cfg); ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { @@ -832,8 +834,8 @@ static void kvm_riscv_read_multiext_legacy(RISCVCPU *cp= u, KVMCPUConfig *multi_ext_cfg =3D &kvm_multi_ext_cfgs[i]; struct kvm_one_reg reg; =20 - reg.id =3D kvm_riscv_reg_id(env, KVM_REG_RISCV_ISA_EXT, - multi_ext_cfg->kvm_reg_id); + reg.id =3D kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_ISA_EXT, + multi_ext_cfg->kvm_reg_id); reg.addr =3D (uint64_t)&val; ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); if (ret !=3D 0) { @@ -925,8 +927,8 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, = KVMScratchCPU *kvmcpu) =20 for (i =3D 0; i < ARRAY_SIZE(kvm_multi_ext_cfgs); i++) { multi_ext_cfg =3D &kvm_multi_ext_cfgs[i]; - reg_id =3D kvm_riscv_reg_id(&cpu->env, KVM_REG_RISCV_ISA_EXT, - multi_ext_cfg->kvm_reg_id); + reg_id =3D kvm_riscv_reg_id_ulong(&cpu->env, KVM_REG_RISCV_ISA_EXT, + multi_ext_cfg->kvm_reg_id); reg_search =3D bsearch(®_id, reglist->reg, reglist->n, sizeof(uint64_t), uint64_cmp); if (!reg_search) { --=20 2.41.0