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Fri, 08 Dec 2023 03:35:38 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 1/6] sysemu/cpu-timers: Have icount_configure() return a boolean Date: Fri, 8 Dec 2023 12:35:23 +0100 Message-ID: <20231208113529.74067-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=philmd@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035487863100001 Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have icount_configure() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 10 ++++++++-- accel/tcg/icount-common.c | 16 +++++++++------- stubs/icount.c | 4 +++- system/vl.c | 3 +-- 4 files changed, 21 insertions(+), 12 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index 2e786fe7fb..b70dc7692d 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -50,8 +50,14 @@ int64_t icount_get(void); */ int64_t icount_to_ns(int64_t icount); =20 -/* configure the icount options, including "shift" */ -void icount_configure(QemuOpts *opts, Error **errp); +/** + * icount_configure: configure the icount options, including "shift" + * @opts: Options to parse + * @errp: pointer to a NULL-initialized error object + * + * Return: true on success, else false setting @errp with error + */ +bool icount_configure(QemuOpts *opts, Error **errp); =20 /* used by tcg vcpu thread to calc icount budget */ int64_t icount_round(int64_t count); diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index ec57192be8..dc69d6a4c6 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -419,7 +419,7 @@ void icount_account_warp_timer(void) icount_warp_rt(); } =20 -void icount_configure(QemuOpts *opts, Error **errp) +bool icount_configure(QemuOpts *opts, Error **errp) { const char *option =3D qemu_opt_get(opts, "shift"); bool sleep =3D qemu_opt_get_bool(opts, "sleep", true); @@ -429,27 +429,28 @@ void icount_configure(QemuOpts *opts, Error **errp) if (!option) { if (qemu_opt_get(opts, "align") !=3D NULL) { error_setg(errp, "Please specify shift option when using align= "); + return false; } - return; + return true; } =20 if (align && !sleep) { error_setg(errp, "align=3Don and sleep=3Doff are incompatible"); - return; + return false; } =20 if (strcmp(option, "auto") !=3D 0) { if (qemu_strtol(option, NULL, 0, &time_shift) < 0 || time_shift < 0 || time_shift > MAX_ICOUNT_SHIFT) { error_setg(errp, "icount: Invalid shift value"); - return; + return false; } } else if (icount_align_option) { error_setg(errp, "shift=3Dauto and align=3Don are incompatible"); - return; + return false; } else if (!icount_sleep) { error_setg(errp, "shift=3Dauto and sleep=3Doff are incompatible"); - return; + return false; } =20 icount_sleep =3D sleep; @@ -463,7 +464,7 @@ void icount_configure(QemuOpts *opts, Error **errp) if (time_shift >=3D 0) { timers_state.icount_time_shift =3D time_shift; icount_enable_precise(); - return; + return true; } =20 icount_enable_adaptive(); @@ -491,6 +492,7 @@ void icount_configure(QemuOpts *opts, Error **errp) timer_mod(timers_state.icount_vm_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + NANOSECONDS_PER_SECOND / 10); + return true; } =20 void icount_notify_exit(void) diff --git a/stubs/icount.c b/stubs/icount.c index 6df8c2bf7d..85c381a0ea 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -10,10 +10,12 @@ void icount_update(CPUState *cpu) { abort(); } -void icount_configure(QemuOpts *opts, Error **errp) +bool icount_configure(QemuOpts *opts, Error **errp) { /* signal error */ error_setg(errp, "cannot configure icount, TCG support not available"); + + return false; } int64_t icount_get_raw(void) { diff --git a/system/vl.c b/system/vl.c index 2bcd9efb9a..17234012d4 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2270,8 +2270,7 @@ static void user_register_global_props(void) =20 static int do_configure_icount(void *opaque, QemuOpts *opts, Error **errp) { - icount_configure(opts, errp); - return 0; + return !icount_configure(opts, errp); } =20 static int accelerator_set_property(void *opaque, --=20 2.41.0 From nobody Wed Nov 27 00:35:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1702035398; cv=none; d=zohomail.com; s=zohoarc; b=BV9YGNtVYc5mk9Dr0MWDSOvxrQtFKQQ93z/4iq+yAjtoJDUuessncimRewCADhmWh4MYKOUwIUqN3KBm2m7wReZUms+BVDr2rV4Y/EI3qUsb4SRNdbkXxBp/A6UoieGK+ahBZkpYQ/RkZETOPTCMG0LQCJvmHqCXYQlBx5Ml174= ARC-Message-Signature: i=1; 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Fri, 08 Dec 2023 03:35:43 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 2/6] system/vl: Evaluate icount after accelerator options are parsed Date: Fri, 8 Dec 2023 12:35:24 +0100 Message-ID: <20231208113529.74067-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035399920100001 We need to parse the accelerators first, to be able to check whether TCG is enabled or not. Then we can parse the -icount option. This allows removing the icount_configure() stub. Fixes: 7f8b6126e7 ("vl: move icount configuration earlier") Reported-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- stubs/icount.c | 8 -------- system/vl.c | 16 +++++++++------- 2 files changed, 9 insertions(+), 15 deletions(-) diff --git a/stubs/icount.c b/stubs/icount.c index 85c381a0ea..014ae5d8e4 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -1,5 +1,4 @@ #include "qemu/osdep.h" -#include "qapi/error.h" #include "sysemu/cpu-timers.h" =20 /* icount - Instruction Counter API */ @@ -10,13 +9,6 @@ void icount_update(CPUState *cpu) { abort(); } -bool icount_configure(QemuOpts *opts, Error **errp) -{ - /* signal error */ - error_setg(errp, "cannot configure icount, TCG support not available"); - - return false; -} int64_t icount_get_raw(void) { abort(); diff --git a/system/vl.c b/system/vl.c index 17234012d4..af809331bb 100644 --- a/system/vl.c +++ b/system/vl.c @@ -2270,6 +2270,13 @@ static void user_register_global_props(void) =20 static int do_configure_icount(void *opaque, QemuOpts *opts, Error **errp) { + if (!tcg_enabled()) { + error_setg(errp, "cannot configure icount, TCG support not availab= le"); + error_append_hint(errp, "-icount is not allowed with" + " hardware virtualization\n"); + return 1; + } + return !icount_configure(opts, errp); } =20 @@ -2339,9 +2346,6 @@ static void configure_accelerators(const char *progna= me) { bool init_failed =3D false; =20 - qemu_opts_foreach(qemu_find_opts("icount"), - do_configure_icount, NULL, &error_fatal); - if (QTAILQ_EMPTY(&qemu_accel_opts.head)) { char **accel_list, **tmp; =20 @@ -2401,10 +2405,8 @@ static void configure_accelerators(const char *progn= ame) error_report("falling back to %s", current_accel_name()); } =20 - if (icount_enabled() && !tcg_enabled()) { - error_report("-icount is not allowed with hardware virtualization"= ); - exit(1); - } + qemu_opts_foreach(qemu_find_opts("icount"), + do_configure_icount, NULL, &error_fatal); } =20 static void qemu_validate_options(const QDict *machine_opts) --=20 2.41.0 From nobody Wed Nov 27 00:35:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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Fri, 08 Dec 2023 03:35:50 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 3/6] sysemu/cpu-timers: Introduce ICountMode enumerator Date: Fri, 8 Dec 2023 12:35:25 +0100 Message-ID: <20231208113529.74067-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035489977100005 Rather than having to lookup for what the 0, 1, 2, ... icount values are, use a enum definition. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 20 +++++++++++++------- accel/tcg/icount-common.c | 16 +++++++--------- stubs/icount.c | 2 +- system/cpu-timers.c | 2 +- target/arm/helper.c | 3 ++- 5 files changed, 24 insertions(+), 19 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index b70dc7692d..3f05f29b10 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -17,18 +17,24 @@ void cpu_timers_init(void); =20 /* icount - Instruction Counter API */ =20 -/* - * icount enablement state: +/** + * ICountMode: icount enablement state: * - * 0 =3D Disabled - Do not count executed instructions. - * 1 =3D Enabled - Fixed conversion of insn to ns via "shift" option - * 2 =3D Enabled - Runtime adaptive algorithm to compute shift + * @ICOUNT_DISABLED: Disabled - Do not count executed instructions. + * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" o= ption + * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shi= ft */ +typedef enum { + ICOUNT_DISABLED =3D 0, + ICOUNT_PRECISE, + ICOUNT_ADAPTATIVE, +} ICountMode; + #ifdef CONFIG_TCG -extern int use_icount; +extern ICountMode use_icount; #define icount_enabled() (use_icount) #else -#define icount_enabled() 0 +#define icount_enabled() ICOUNT_DISABLED #endif =20 /* diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index dc69d6a4c6..f0f8fc7f1c 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -49,21 +49,19 @@ static bool icount_sleep =3D true; /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ #define MAX_ICOUNT_SHIFT 10 =20 -/* - * 0 =3D Do not count executed instructions. - * 1 =3D Fixed conversion of insn to ns via "shift" option - * 2 =3D Runtime adaptive algorithm to compute shift - */ -int use_icount; +/* Do not count executed instructions */ +ICountMode use_icount =3D ICOUNT_DISABLED; =20 static void icount_enable_precise(void) { - use_icount =3D 1; + /* Fixed conversion of insn to ns via "shift" option */ + use_icount =3D ICOUNT_PRECISE; } =20 static void icount_enable_adaptive(void) { - use_icount =3D 2; + /* Runtime adaptive algorithm to compute shift */ + use_icount =3D ICOUNT_ADAPTATIVE; } =20 /* @@ -256,7 +254,7 @@ static void icount_warp_rt(void) int64_t warp_delta; =20 warp_delta =3D clock - timers_state.vm_clock_warp_start; - if (icount_enabled() =3D=3D 2) { + if (icount_enabled() =3D=3D ICOUNT_ADAPTATIVE) { /* * In adaptive mode, do not let QEMU_CLOCK_VIRTUAL run too far * ahead of real time (it might already be ahead so careful not diff --git a/stubs/icount.c b/stubs/icount.c index 014ae5d8e4..7055c13725 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -3,7 +3,7 @@ =20 /* icount - Instruction Counter API */ =20 -int use_icount; +ICountMode use_icount =3D ICOUNT_DISABLED; =20 void icount_update(CPUState *cpu) { diff --git a/system/cpu-timers.c b/system/cpu-timers.c index 7452d97b67..6befb82e48 100644 --- a/system/cpu-timers.c +++ b/system/cpu-timers.c @@ -154,7 +154,7 @@ static bool adjust_timers_state_needed(void *opaque) =20 static bool icount_shift_state_needed(void *opaque) { - return icount_enabled() =3D=3D 2; + return icount_enabled() =3D=3D ICOUNT_ADAPTATIVE; } =20 /* diff --git a/target/arm/helper.c b/target/arm/helper.c index 2746d3fdac..adb0960bba 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -934,7 +934,8 @@ static int64_t cycles_ns_per(uint64_t cycles) =20 static bool instructions_supported(CPUARMState *env) { - return icount_enabled() =3D=3D 1; /* Precise instruction counting */ + /* Precise instruction counting */ + return icount_enabled() =3D=3D ICOUNT_PRECISE; } =20 static uint64_t instructions_get_count(CPUARMState *env) --=20 2.41.0 From nobody Wed Nov 27 00:35:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1702035494; cv=none; d=zohomail.com; s=zohoarc; b=XnxJWPjs5A+Q1DQXvQdjpxMtjfl0a5BzpXGc3jO/Zg0XAdaK9lrBgzCiwxrgbvzYmMIP+liOIGy8ubpCwXauoxTFvyww3xw6SMoLBBIowljL2WGFAGAeUf3F5QpBLqppCCC0j5qlilMFlTme/k73I7C2aP/X8u8F/KxWoSXZ7No= ARC-Message-Signature: i=1; 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Fri, 08 Dec 2023 03:35:56 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 4/6] target/arm: Ensure icount is enabled when emulating INST_RETIRED Date: Fri, 8 Dec 2023 12:35:26 +0100 Message-ID: <20231208113529.74067-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035496289100003 pmu_init() register its event checking the pm_event::supported() handler. For INST_RETIRED, the event is only registered and the bit enabled in the PMU Common Event Identification register when icount is enabled as ICOUNT_PRECISE. PMU events are TCG-only, hardware accelerators handle them directly. Unfortunately we register the events in non-TCG builds, leading to linking error such: ld: Undefined symbols: _icount_to_ns, referenced from: _instructions_ns_per in target_arm_helper.c.o clang: error: linker command failed with exit code 1 (use -v to see invoc= ation) As a kludge, give a hint to the compiler by asserting the pm_event::get_count() and pm_event::ns_per_count() handler will only be called under this icount mode. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- As discussed in https://lore.kernel.org/qemu-devel/CAFEAcA-HVf8vWLzmdStEo2NrSKQdZV612rBjiaj= -gLW4vXyvpA@mail.gmail.com/ better would be to restrict the PMU events to TCG, but this is out of the scope of this series. --- target/arm/helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index adb0960bba..333fd5f4bf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -940,11 +940,13 @@ static bool instructions_supported(CPUARMState *env) =20 static uint64_t instructions_get_count(CPUARMState *env) { + assert(icount_enabled() =3D=3D ICOUNT_PRECISE); return (uint64_t)icount_get_raw(); } =20 static int64_t instructions_ns_per(uint64_t icount) { + assert(icount_enabled() =3D=3D ICOUNT_PRECISE); return icount_to_ns((int64_t)icount); } #endif --=20 2.41.0 From nobody Wed Nov 27 00:35:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 08 Dec 2023 03:36:02 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 5/6] util/async: Only call icount_notify_exit() if icount is enabled Date: Fri, 8 Dec 2023 12:35:27 +0100 Message-ID: <20231208113529.74067-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035448896100001 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- accel/tcg/icount-common.c | 4 +++- stubs/icount.c | 2 +- util/async.c | 16 +++++++++------- 3 files changed, 13 insertions(+), 9 deletions(-) diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c index f0f8fc7f1c..a4a747d1dc 100644 --- a/accel/tcg/icount-common.c +++ b/accel/tcg/icount-common.c @@ -495,7 +495,9 @@ bool icount_configure(QemuOpts *opts, Error **errp) =20 void icount_notify_exit(void) { - if (icount_enabled() && current_cpu) { + assert(icount_enabled()); + + if (current_cpu) { qemu_cpu_kick(current_cpu); qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } diff --git a/stubs/icount.c b/stubs/icount.c index 7055c13725..b060b03a73 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -37,7 +37,7 @@ void icount_account_warp_timer(void) { abort(); } - void icount_notify_exit(void) { + abort(); } diff --git a/util/async.c b/util/async.c index 8f90ddc304..9007642c27 100644 --- a/util/async.c +++ b/util/async.c @@ -94,13 +94,15 @@ static void aio_bh_enqueue(QEMUBH *bh, unsigned new_fla= gs) } =20 aio_notify(ctx); - /* - * Workaround for record/replay. - * vCPU execution should be suspended when new BH is set. - * This is needed to avoid guest timeouts caused - * by the long cycles of the execution. - */ - icount_notify_exit(); + if (unlikely(icount_enabled())) { + /* + * Workaround for record/replay. + * vCPU execution should be suspended when new BH is set. + * This is needed to avoid guest timeouts caused + * by the long cycles of the execution. + */ + icount_notify_exit(); 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Fri, 08 Dec 2023 03:36:08 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Peter Maydell , qemu-block@nongnu.org, Pavel Dovgalyuk , Fam Zheng , Richard Henderson , qemu-arm@nongnu.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 6/6] sysemu/replay: Restrict icount to system emulation Date: Fri, 8 Dec 2023 12:35:28 +0100 Message-ID: <20231208113529.74067-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208113529.74067-1-philmd@linaro.org> References: <20231208113529.74067-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1702035441048100002 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/sysemu/cpu-timers.h | 2 +- include/sysemu/replay.h | 11 ++++++++--- stubs/icount.c | 19 ------------------- 3 files changed, 9 insertions(+), 23 deletions(-) diff --git a/include/sysemu/cpu-timers.h b/include/sysemu/cpu-timers.h index 3f05f29b10..d86738a378 100644 --- a/include/sysemu/cpu-timers.h +++ b/include/sysemu/cpu-timers.h @@ -30,7 +30,7 @@ typedef enum { ICOUNT_ADAPTATIVE, } ICountMode; =20 -#ifdef CONFIG_TCG +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) extern ICountMode use_icount; #define icount_enabled() (use_icount) #else diff --git a/include/sysemu/replay.h b/include/sysemu/replay.h index 08aae5869f..8102fa54f0 100644 --- a/include/sysemu/replay.h +++ b/include/sysemu/replay.h @@ -1,6 +1,3 @@ -#ifndef SYSEMU_REPLAY_H -#define SYSEMU_REPLAY_H - /* * QEMU replay (system interface) * @@ -11,6 +8,12 @@ * See the COPYING file in the top-level directory. * */ +#ifndef SYSEMU_REPLAY_H +#define SYSEMU_REPLAY_H + +#ifdef CONFIG_USER_ONLY +#error Cannot include this header from user emulation +#endif =20 #include "exec/replay-core.h" #include "qapi/qapi-types-misc.h" @@ -79,12 +82,14 @@ int64_t replay_save_clock(ReplayClockKind kind, int64_t= clock, int64_t replay_read_clock(ReplayClockKind kind, int64_t raw_icount); /*! Saves or reads the clock depending on the current replay mode. */ #define REPLAY_CLOCK(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode =3D=3D REPLAY_MODE_PLAY = \ ? replay_read_clock((clock), icount_get_raw()) \ : replay_mode =3D=3D REPLAY_MODE_RECORD = \ ? replay_save_clock((clock), (value), icount_get_raw()) \ : (value)) #define REPLAY_CLOCK_LOCKED(clock, value) \ + !icount_enabled() ? (value) : \ (replay_mode =3D=3D REPLAY_MODE_PLAY = \ ? replay_read_clock((clock), icount_get_raw_locked()) \ : replay_mode =3D=3D REPLAY_MODE_RECORD = \ diff --git a/stubs/icount.c b/stubs/icount.c index b060b03a73..9a29084ecc 100644 --- a/stubs/icount.c +++ b/stubs/icount.c @@ -5,30 +5,11 @@ =20 ICountMode use_icount =3D ICOUNT_DISABLED; =20 -void icount_update(CPUState *cpu) -{ - abort(); -} int64_t icount_get_raw(void) { abort(); return 0; } -int64_t icount_get(void) -{ - abort(); - return 0; -} -int64_t icount_to_ns(int64_t icount) -{ - abort(); - return 0; -} -int64_t icount_round(int64_t count) -{ - abort(); - return 0; -} void icount_start_warp_timer(void) { abort(); --=20 2.41.0