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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 1/1] target/arm: Disable SME if SVE is disabled
Date: Mon, 4 Dec 2023 14:33:22 +0000
Message-Id: <20231204143322.837136-2-peter.maydell@linaro.org>
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There is no architectural requirement that SME implies SVE, but
our implementation currently assumes it. (FEAT_SME_FA64 does
imply SVE.) So if you try to run a CPU with eg "-cpu max,sve=3Doff"
you quickly run into an assert when the guest tries to write to
SMCR_EL1:
#6 0x00007ffff4b38e96 in __GI___assert_fail
(assertion=3D0x5555566e69cb "sm", file=3D0x5555566e5b24 "../../target/a=
rm/helper.c", line=3D6865, function=3D0x5555566e82f0 <__PRETTY_FUNCTION__.3=
1> "sve_vqm1_for_el_sm") at ./assert/assert.c:101
#7 0x0000555555ee33aa in sve_vqm1_for_el_sm (env=3D0x555557d291f0, el=3D2,=
sm=3Dfalse) at ../../target/arm/helper.c:6865
#8 0x0000555555ee3407 in sve_vqm1_for_el (env=3D0x555557d291f0, el=3D2) at=
../../target/arm/helper.c:6871
#9 0x0000555555ee3724 in smcr_write (env=3D0x555557d291f0, ri=3D0x555557da=
23b0, value=3D2147483663) at ../../target/arm/helper.c:6995
#10 0x0000555555fd1dba in helper_set_cp_reg64 (env=3D0x555557d291f0, rip=3D=
0x555557da23b0, value=3D2147483663) at ../../target/arm/tcg/op_helper.c:839
#11 0x00007fff60056781 in code_gen_buffer ()
Avoid this unsupported and slightly odd combination by
disabling SME when SVE is not present.
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2005
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231127173318.674758-1-peter.maydell@linaro.org
---
target/arm/cpu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 25e9d2ae7b8..efb22a87f9e 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1743,6 +1743,16 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **=
errp)
return;
}
=20
+ /*
+ * FEAT_SME is not architecturally dependent on FEAT_SVE (unless
+ * FEAT_SME_FA64 is present). However our implementation currently
+ * assumes it, so if the user asked for sve=3Doff then turn off SM=
E also.
+ * (KVM doesn't currently support SME at all.)
+ */
+ if (cpu_isar_feature(aa64_sme, cpu) && !cpu_isar_feature(aa64_sve,=
cpu)) {
+ object_property_set_bool(OBJECT(cpu), "sme", false, &error_abo=
rt);
+ }
+
arm_cpu_sme_finalize(cpu, &local_err);
if (local_err !=3D NULL) {
error_propagate(errp, local_err);
--=20
2.34.1