From nobody Wed Nov 27 04:45:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1701354981; cv=none; d=zohomail.com; s=zohoarc; b=B+4PEXvmkDtW51xpbVVcW5YfF9vnoiKAMCSw5WQgC4j4fztalo2OjoFU45ffYGUZXBCF6Zx6P/QuoEfZ0ENXg51a9ky5f0U5u9KOqp7xo8y1VzzzNzzwC8ZGKh4H/g3PPBTL0SZwDkjZYcky2cM8idUnAk37Nk8mvs9BJyBCXz8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1701354981; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=isIZewBlWhHlPIRd4AOCKWvDW7hj+Xa7GjguZrlH764=; b=dllhMrou2tkXkFP/poPPkj2/wImpn6TCMuh7L90yTxW0u60TE+ogjwJGvfTf2Enzy2MgFO3RVlL/AzJDjZAqwitjdLAIZpDeGNk35pUG64CibwgCgfGoqpLRzY6hDiMuNx+S/L0EBJlqr2lw0+omDvDopE0CCRUfVw0l4Sannb4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1701354981272453.81869373386894; Thu, 30 Nov 2023 06:36:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r8i7S-0006uD-GO; Thu, 30 Nov 2023 09:34:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i7G-00068Z-6I; Thu, 30 Nov 2023 09:34:10 -0500 Received: from mgamail.intel.com ([192.55.52.43]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i7A-0001Un-Ub; Thu, 30 Nov 2023 09:34:07 -0500 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:34:00 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:33:50 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354844; x=1732890844; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ojKaeiijveA4rQSsZpp2eyLul8UTXwtywNBoYac3pw0=; b=KffefMi63af5nmZYTDhlpSDBuIGsay1Zvuzoft0mO3rkUpO+P2Ys70Cr kyXYZ6+zISYNsrdxGsGuHIginbLoa8u/9/mbbckVZ7Ccd/ZeO8uEBHmBI RBYchHff4EpAUQn3v8v70ypfXtNy3OVEst+BgPM2SguywgzTYEGsAolIi S1FJBRRXXPNdp+zVrI0mI+c41sC1RjHg/ll8a6/EnRvWDwEY/BgLFLxSG ng33F7gTc79udonbrZ/mNJKXA1c3+V+rKYB8iUZ5G3nyCcePC1QrdeN2v oEKlTd0Ak3MQ5USTLxvhy8m+qfM5Rnd6h9HUDnwP99gKvObk5Gy/oTrGl Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479532120" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479532120" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942730060" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942730060" From: Zhao Liu To: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 22/41] hw/cpu/cluster: Convert cpu-cluster from general device to topology device Date: Thu, 30 Nov 2023 22:41:44 +0800 Message-Id: <20231130144203.2307629-23-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.55.52.43; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1701354983215000014 Content-Type: text/plain; charset="utf-8" From: Zhao Liu Convert cpu-cluster to topology device then user could create cluster level topology from cli and later the cpu-clusters could be added into topology tree. In addition, mark the cpu-cluster as DEVICE_CATEGORY_CPU_DEF category to indicate it belongs to the basic CPU definition and should be created from cli before board initialization. Signed-off-by: Zhao Liu --- hw/cpu/cluster.c | 11 +++++++++-- include/hw/cpu/cluster.h | 7 +++++-- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index 8a666c27d151..adf0ef23e8d4 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -86,15 +86,21 @@ static void cpu_cluster_realize(DeviceState *dev, Error= **errp) if (cc->tcg_clu_ops->collect_cpus) { cc->tcg_clu_ops->collect_cpus(cluster, errp); } + + cc->parent_realize(dev, errp); } =20 static void cpu_cluster_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); + CPUTopoClass *tc =3D CPU_TOPO_CLASS(klass); CPUClusterClass *cc =3D CPU_CLUSTER_CLASS(klass); =20 + set_bit(DEVICE_CATEGORY_CPU_DEF, dc->categories); device_class_set_props(dc, cpu_cluster_properties); - dc->realize =3D cpu_cluster_realize; + device_class_set_parent_realize(dc, cpu_cluster_realize, + &cc->parent_realize); + tc->level =3D CPU_TOPO_CLUSTER; =20 #ifdef CONFIG_TCG cc->tcg_clu_ops =3D &common_cluster_tcg_ops; @@ -103,8 +109,9 @@ static void cpu_cluster_class_init(ObjectClass *klass, = void *data) =20 static const TypeInfo cpu_cluster_type_info =3D { .name =3D TYPE_CPU_CLUSTER, - .parent =3D TYPE_DEVICE, + .parent =3D TYPE_CPU_TOPO, .instance_size =3D sizeof(CPUCluster), + .class_size =3D sizeof(CPUClusterClass), .class_init =3D cpu_cluster_class_init, }; =20 diff --git a/include/hw/cpu/cluster.h b/include/hw/cpu/cluster.h index b3185e2f2566..888993c36da4 100644 --- a/include/hw/cpu/cluster.h +++ b/include/hw/cpu/cluster.h @@ -20,6 +20,7 @@ #ifndef HW_CPU_CLUSTER_H #define HW_CPU_CLUSTER_H =20 +#include "hw/core/cpu-topo.h" #include "hw/qdev-core.h" #include "qom/object.h" =20 @@ -84,11 +85,13 @@ struct TCGClusterOps { =20 struct CPUClusterClass { /*< private >*/ - DeviceClass parent_class; + CPUTopoClass parent_class; =20 /*< public >*/ /* when TCG is not available, this pointer is NULL */ const struct TCGClusterOps *tcg_clu_ops; + + DeviceRealize parent_realize; }; =20 /** @@ -100,7 +103,7 @@ struct CPUClusterClass { */ struct CPUCluster { /*< private >*/ - DeviceState parent_obj; + CPUTopoState parent_obj; =20 /*< public >*/ uint32_t cluster_id; --=20 2.34.1