From nobody Wed Nov 27 04:31:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1701354779; cv=none; d=zohomail.com; s=zohoarc; b=S2BAG1vtfzS2QC5M0k8P4hhuyDj7JZTlzzPDlwvKj+lzL2Te7QwiDIpLjagVV5JnX4Rw9JB4ayYe7+LYNR+32ndj8Q+2E6Mkz165vbK0iSgx5//WsYnG34aHsGPt8cGbtRRY4Pqlmx7VFezglvaN0tAhfGzEJScucf464QCB9FI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1701354779; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8fHZmOwnvs/K8ZQ2CmExFFPXoErkUG0bXhl59nNixrE=; b=LcDTA+Yf3vJo08+UY/IsbnUDBmmV3k41oRemKKuTylr8NGKGegdB+9DB7z7E6X2d6scC20Mc4E3/rQplMOcKU94XRA2e+tloWZ+7JYq2iKIuWIiYqt50ziAKz9U7tVUymMtbYamF8NoGLhI72zRc89o1qjAp5CWfMqL2q+Fnt10= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1701354779847320.2607103927046; Thu, 30 Nov 2023 06:32:59 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r8i5t-00033b-Mi; Thu, 30 Nov 2023 09:32:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i5q-0002t0-2c; Thu, 30 Nov 2023 09:32:42 -0500 Received: from mgamail.intel.com ([192.55.52.43]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i5o-0001BS-4M; Thu, 30 Nov 2023 09:32:41 -0500 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:32:26 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:32:17 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354760; x=1732890760; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=giqm05kbC3tYOPrffoLra7vHI+bWgR59/qNt+YCSQ+8=; b=g02N2G6gMNbxuYTy/MpXvk/tCF1JtxcYvoqJjbqmKbsgNmt688e6H3nX 2fG5uXcRFQU9Rz50eLiXvJMFq98b1y0AcSRLfWyodbOACXXzWGir5EpX+ R9RqjNTy1TvtBxghMfQgkPqV3y9L3uX3PA1kITasQ3oc00KOsWhDUx/0q ug0cRclDm/C2DCWz6SEJTpGaenvklSoexfiB9zRUbiAo4tht7sLBlo94z BuiYla+2W+nzDhapsAYeW+OZc8fH5iaJab2RV42tBwOXjmOmCk1aFdzv7 GKoxFfYWknklgboGXWdDa+IziI2o18qG4mfwFYhcToQW+C/1a5sSgcpA+ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479531659" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479531659" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942729853" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942729853" From: Zhao Liu To: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 12/41] hw/core/topo: Add helpers to traverse the CPU topology tree Date: Thu, 30 Nov 2023 22:41:34 +0800 Message-Id: <20231130144203.2307629-13-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.55.52.43; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1701354780444000003 Content-Type: text/plain; charset="utf-8" From: Zhao Liu The topology devices will be organized as a topology tree. Each topology device may have many topology children with lower topology level. Add the helpers to traverse the CPU topology tree. Signed-off-by: Zhao Liu --- hw/core/cpu-topo.c | 41 ++++++++++++++++++++++++++++++++++++++ include/hw/core/cpu-topo.h | 13 ++++++++++++ 2 files changed, 54 insertions(+) diff --git a/hw/core/cpu-topo.c b/hw/core/cpu-topo.c index cba2dc747e74..687a4cc566ec 100644 --- a/hw/core/cpu-topo.c +++ b/hw/core/cpu-topo.c @@ -318,3 +318,44 @@ static void cpu_topo_register_types(void) } =20 type_init(cpu_topo_register_types) + +static int do_cpu_topo_child_foreach(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque, + bool recurse) +{ + CPUTopoState *child; + int ret =3D TOPO_FOREACH_CONTINUE; + + QTAILQ_FOREACH(child, &topo->children, sibling) { + if (!levels || (levels && test_bit(CPU_TOPO_LEVEL(child), levels))= ) { + ret =3D fn(child, opaque); + if (ret =3D=3D TOPO_FOREACH_END || ret =3D=3D TOPO_FOREACH_ERR= ) { + break; + } else if (ret =3D=3D TOPO_FOREACH_SIBLING) { + continue; + } + } + + if (recurse) { + ret =3D do_cpu_topo_child_foreach(child, levels, fn, opaque, r= ecurse); + if (ret !=3D TOPO_FOREACH_CONTINUE) { + break; + } + } + } + return ret; +} + +int cpu_topo_child_foreach(CPUTopoState *topo, unsigned long *levels, + topo_fn fn, void *opaque) +{ + return do_cpu_topo_child_foreach(topo, levels, fn, opaque, false); +} + +int cpu_topo_child_foreach_recursive(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque) +{ + return do_cpu_topo_child_foreach(topo, levels, fn, opaque, true); +} diff --git a/include/hw/core/cpu-topo.h b/include/hw/core/cpu-topo.h index 1ffdb0be6d38..453bacbb558b 100644 --- a/include/hw/core/cpu-topo.h +++ b/include/hw/core/cpu-topo.h @@ -90,4 +90,17 @@ struct CPUTopoState { =20 #define CPU_TOPO_LEVEL(topo) (CPU_TOPO_GET_CLASS(topo)->level) =20 +#define TOPO_FOREACH_SIBLING 2 +#define TOPO_FOREACH_END 1 +#define TOPO_FOREACH_CONTINUE 0 +#define TOPO_FOREACH_ERR -1 + +typedef int (*topo_fn)(CPUTopoState *topo, void *opaque); + +int cpu_topo_child_foreach(CPUTopoState *topo, unsigned long *levels, + topo_fn fn, void *opaque); +int cpu_topo_child_foreach_recursive(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque); + #endif /* CPU_TOPO_H */ --=20 2.34.1