From nobody Wed Nov 27 04:40:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1701354980; cv=none; d=zohomail.com; s=zohoarc; b=WfghJQ2DSbDIuFgkfB/DpXAJWARZj08WW4oJYh8UGwKZBEOx7G5FOcsjD9sOJu3SIlX/C0kjSU2HD/P8wp7Gd8/qtwdHcPfRKU8TiEp0l2F3ENSnHYsQcxTN9/QgSs98HU8194J+eJsgzO1SPW3AP/5WFK7MPWVOE2t0UFWac2s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1701354980; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=egKEKzuYkZhiitXdPHNW6UEtM16vlgAvbgxAKTOu1yo=; b=an5y47Mc/VS3dGC0PVElZgN0urZTeEcrhkdD2SkkS1K6NID+j+l2zojRrh+iN1JNSwLFli1sLFCD/QKA+sjv4KOIRuTiIsVN/QReHwCTvjIgtDDaCA+P5Uh2TsqmG9prh4ETRyRpowoqUl/W0AwnNmXOyoLZSELnTziM3bSi9T4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1701354980742649.7511129875186; Thu, 30 Nov 2023 06:36:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r8i5d-0002JO-QT; Thu, 30 Nov 2023 09:32:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i5c-0002Ce-MQ; Thu, 30 Nov 2023 09:32:28 -0500 Received: from mgamail.intel.com ([192.55.52.43]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r8i5Z-00018C-R6; Thu, 30 Nov 2023 09:32:28 -0500 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:31:58 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:31:48 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354745; x=1732890745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zcorAWDLgR7QueFdQsmIMfIxo58a5rqxmGG3Y6CdsHI=; b=BHQusIU/dLjU7NIEFO13j/KoSWNdsI89J3t8B9uBenczJR1PmTV8FBLm E+ahwlmHKBlzwa/iZqQxhUBjic7ds+AAPrO9R5H+q7O77VBGHJjTmswfd BTEbjWhbo3q3CqVZbQ4XINjGAu8BO549AFEZlGI3g6yCFb/bx6VvpMmUG cXpnY2RuaT07IlBdECwHVDfU+VbKPQGxfth0hudjh4wLdyASHe9LXoswi QJc1MBj7MaPiD/Oq6G7ODk4xQLtt73mMyalO6wxMisttEb8xw4F/xnPU6 6+8cg7H5cXSIcLhjUFbW2W1vKgDlbk2VKCyytVbSo8u6zagME+9U3J5ZQ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479531490" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479531490" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942729745" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942729745" From: Zhao Liu To: Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 09/41] hw/core/topo: Support topology index for topology device Date: Thu, 30 Nov 2023 22:41:31 +0800 Message-Id: <20231130144203.2307629-10-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.55.52.43; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1701354981215000003 Content-Type: text/plain; charset="utf-8" From: Zhao Liu Topology index is used to identify the topology child under the same parent topology device. This field corresponds to the topology sub index (e.g., socket-id/ core-id/thread-id) used for addressing. Signed-off-by: Zhao Liu --- hw/core/cpu-topo.c | 77 ++++++++++++++++++++++++++++++++++++++ include/hw/core/cpu-topo.h | 6 +++ 2 files changed, 83 insertions(+) diff --git a/hw/core/cpu-topo.c b/hw/core/cpu-topo.c index 4428b979a5dc..3e0c183388d8 100644 --- a/hw/core/cpu-topo.c +++ b/hw/core/cpu-topo.c @@ -50,6 +50,66 @@ static const char *cpu_topo_level_to_string(CPUTopoLevel= level) return NULL; } =20 +static void cpu_topo_refresh_free_child_index(CPUTopoState *topo) +{ + CPUTopoState *child; + + /* + * Fast way: Assume that the index grows sequentially and that there + * are no "index hole" in the previous children. + * + * The previous check on num_children ensures that free_child_index + 1 + * does not hit the max_children limit. + */ + if (topo->free_child_index + 1 =3D=3D topo->num_children) { + topo->free_child_index++; + return; + } + + /* Slow way: Search the "index hole". The index hole must be found. */ + for (int index =3D 0; index < topo->num_children; index++) { + bool existed =3D false; + + QTAILQ_FOREACH(child, &topo->children, sibling) { + if (child->index =3D=3D index) { + existed =3D true; + break; + } + } + + if (!existed) { + topo->free_child_index =3D index; + return; + } + } +} + +static void cpu_topo_validate_index(CPUTopoState *topo, Error **errp) +{ + CPUTopoState *parent =3D topo->parent, *child; + + if (topo->index < 0) { + error_setg(errp, "Invalid topology index (%d).", + topo->index); + return; + } + + if (parent->max_children && topo->index >=3D parent->max_children) { + error_setg(errp, "Invalid topology index (%d): " + "The maximum index is %d.", + topo->index, parent->max_children); + return; + } + + QTAILQ_FOREACH(child, &topo->children, sibling) { + if (child->index =3D=3D topo->index) { + error_setg(errp, "Duplicate topology index (%d)", + topo->index); + return; + } + } +} + static void cpu_topo_build_hierarchy(CPUTopoState *topo, Error **errp) { CPUTopoState *parent =3D topo->parent; @@ -80,7 +140,18 @@ static void cpu_topo_build_hierarchy(CPUTopoState *topo= , Error **errp) } =20 parent->num_children++; + if (topo->index =3D=3D UNASSIGNED_TOPO_INDEX) { + topo->index =3D parent->free_child_index; + } else if (topo->index !=3D parent->free_child_index) { + /* The index has been set, then we need to validate it. */ + cpu_topo_validate_index(topo, errp); + if (*errp) { + return; + } + } + QTAILQ_INSERT_TAIL(&parent->children, topo, sibling); + cpu_topo_refresh_free_child_index(parent); } =20 static void cpu_topo_set_parent(CPUTopoState *topo, Error **errp) @@ -135,6 +206,10 @@ static void cpu_topo_destroy_hierarchy(CPUTopoState *t= opo) QTAILQ_REMOVE(&parent->children, topo, sibling); parent->num_children--; =20 + if (topo->index < parent->free_child_index) { + parent->free_child_index =3D topo->index; + } + if (!parent->num_children) { parent->child_level =3D CPU_TOPO_UNKNOWN; } @@ -180,6 +255,8 @@ static void cpu_topo_instance_init(Object *obj) CPUTopoState *topo =3D CPU_TOPO(obj); QTAILQ_INIT(&topo->children); =20 + topo->index =3D UNASSIGNED_TOPO_INDEX; + topo->free_child_index =3D 0; topo->child_level =3D CPU_TOPO_UNKNOWN; } =20 diff --git a/include/hw/core/cpu-topo.h b/include/hw/core/cpu-topo.h index ebcbdd854da5..c0dfff9dc63b 100644 --- a/include/hw/core/cpu-topo.h +++ b/include/hw/core/cpu-topo.h @@ -24,6 +24,8 @@ #include "hw/qdev-core.h" #include "qemu/queue.h" =20 +#define UNASSIGNED_TOPO_INDEX -1 + typedef enum CPUTopoLevel { CPU_TOPO_UNKNOWN, CPU_TOPO_THREAD, @@ -53,6 +55,8 @@ struct CPUTopoClass { =20 /** * CPUTopoState: + * @index: Topology index within parent's topology queue. + * @free_child_index: Cached free index to be specified for next child. * @num_children: Number of topology children under this topology device. * @max_children: Maximum number of children allowed to be inserted under * this topology device. @@ -66,6 +70,8 @@ struct CPUTopoState { DeviceState parent_obj; =20 /*< public >*/ + int index; + int free_child_index; int num_children; int max_children; CPUTopoLevel child_level; --=20 2.34.1