From nobody Wed Nov 27 04:54:42 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1701105143; cv=none; d=zohomail.com; s=zohoarc; b=N4wO/E3IRDxil/h0b4xwl8G5i1VUrSsm4c1FP1MSvkiODi048dsVyfeqLjrZE1Ks9w6ADgDRZ5pduiRg1kReyfBoSWjWhXsBVt98eA2t1qzWnTAzpLbsck8ZXHe10VxPg9rqTkT1T5veyvIkMCTwZAb8aHxPI3xTcFz4IRqHiaI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1701105143; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=uLt/J0Ekf4tgAJYBqplW3Dr2IyBfScT1SQCm++J6lI4=; b=Q/4XW3AvlO94eJ2ugWfsFXnpciiHYTIPdLvgvXdRgN3mzxVOQpOGCdLH73DAMk/+zkZgO7lF5ptAS8CII7UZgrwfHJaiKOnAiBzLhtDdzMZbbaHZ0p6pH/iEbTb7czQfLH5suBnVylYj97EZhckn1m3L/wnBRUwtEiZz1qRXDeI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1701105143985475.9431151184348; Mon, 27 Nov 2023 09:12:23 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r7f6A-0007UG-8H; Mon, 27 Nov 2023 12:08:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r7f5z-0007QH-2n for qemu-devel@nongnu.org; Mon, 27 Nov 2023 12:08:31 -0500 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r7f5v-0004cZ-On for qemu-devel@nongnu.org; Mon, 27 Nov 2023 12:08:30 -0500 Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-40b2ddab817so31258545e9.3 for ; Mon, 27 Nov 2023 09:08:27 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id fl8-20020a05600c0b8800b004030e8ff964sm15353216wmb.34.2023.11.27.09.08.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 09:08:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701104906; x=1701709706; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=uLt/J0Ekf4tgAJYBqplW3Dr2IyBfScT1SQCm++J6lI4=; b=FWPtGN+pb4zP0LpUcu8m9G2ih80Y30110LIvXt1ywNq2v8M50KIIyXrfh6megmc8hg 7qanZfa8GhC08CVD5f3H7Vh6l8WlfbRLxyxBc2HZSQ0Qcu1kbF+KLjLfP6NB/4e1+bFS xEV3qA5S6lSEbo98cRb6qgFez6kBVudI7W83bGl8BAV35yEGAnkTt+QKFhRLKOjz8DlY bxfSvyLkzkTKPI/WiCui7vSXCU2x1an8Y2+o+XPzZPue2G3VpR+8yNO9iXXCAer8IwTV ccYPaxM8b3tAjrIVPoD0+Fs48+36gJGBmu9tn7tI5F9bZcltRGn7dn2kA7sczWRyrsaw /9uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701104906; x=1701709706; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uLt/J0Ekf4tgAJYBqplW3Dr2IyBfScT1SQCm++J6lI4=; b=XUJW1V0E0pJSbk+cOKbH6rnhQc757eNmnEo3hHAp5M9Jk8os74gqPYjWarTSG2lFdc T+y7iwsGAiAJzEW8RUYWRVQZmRCuQBjflk2NCHPsE63beW2nRuh41g3w8hh1rKjt1cHY RXUcPTzDXQi0XTq69uhfdHAYx4tdbogCs5NqpscAGnBe2JCNSNdAaJxabr6mogvuVyRV c+G4r923IwkDqNJm9ptTdilE92R5YmhXQATkoTyi1xd7i6TubiceJb/Km1nBBLb0dDbJ AVeFdjhr2GJ16jx+d1LIG6PAFxXtMMJ0rSOlP7VeUBdbSsl4mKTpdj8MMLJcO1whVdvS JN1Q== X-Gm-Message-State: AOJu0YxxI0a1jGfnzpsSBgmNK4/uRZ4mOu/ZxQr9y9A+zOsmMlgbn+ZN ZYBPE7h6HeoUX9jdfHijRF3BP3ySYH1ADUPzVBs= X-Google-Smtp-Source: AGHT+IHcgrmjIEXdC5J2hQ3icXSPQEWbEWIR1hli3JpXcwoXiq0pqKfGHUTun0s4NmCQtPCFXLbXgA== X-Received: by 2002:a05:600c:3ca0:b0:40a:48af:4820 with SMTP id bg32-20020a05600c3ca000b0040a48af4820mr5690786wmb.30.1701104906387; Mon, 27 Nov 2023 09:08:26 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/13] target/arm: Handle overflow in calculation of next timer tick Date: Mon, 27 Nov 2023 17:08:12 +0000 Message-Id: <20231127170823.589863-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127170823.589863-1-peter.maydell@linaro.org> References: <20231127170823.589863-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1701105145491000001 In commit edac4d8a168 back in 2015 when we added support for the virtual timer offset CNTVOFF_EL2, we didn't correctly update the timer-recalculation code that figures out when the timer interrupt is next going to change state. We got it wrong in two ways: * for the 0->1 transition, we didn't notice that gt->cval + offset can overflow a uint64_t * for the 1->0 transition, we didn't notice that the transition might now happen before the count rolls over, if offset > count In the former case, we end up trying to set the next interrupt for a time in the past, which results in QEMU hanging as the timer fires continuously. In the latter case, we would fail to update the interrupt status when we are supposed to. Fix the calculations in both cases. The test case is Alex Benn=C3=A9e's from the bug report, and tests the 0->1 transition overflow case. Fixes: edac4d8a168 ("target-arm: Add CNTVOFF_EL2") Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/60 Signed-off-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20231120173506.3729884-1-peter.maydell@linaro.org Reviewed-by: Peter Maydell --- target/arm/helper.c | 25 ++++++++++-- tests/tcg/aarch64/system/vtimer.c | 48 +++++++++++++++++++++++ tests/tcg/aarch64/Makefile.softmmu-target | 7 +++- 3 files changed, 75 insertions(+), 5 deletions(-) create mode 100644 tests/tcg/aarch64/system/vtimer.c diff --git a/target/arm/helper.c b/target/arm/helper.c index ff1970981ee..2746d3fdac8 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2646,11 +2646,28 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeri= dx) gt->ctl =3D deposit32(gt->ctl, 2, 1, istatus); =20 if (istatus) { - /* Next transition is when count rolls back over to zero */ - nexttick =3D UINT64_MAX; + /* + * Next transition is when (count - offset) rolls back over to= 0. + * If offset > count then this is when count =3D=3D offset; + * if offset <=3D count then this is when count =3D=3D offset = + 2^64 + * For the latter case we set nexttick to an "as far in future + * as possible" value and let the code below handle it. + */ + if (offset > count) { + nexttick =3D offset; + } else { + nexttick =3D UINT64_MAX; + } } else { - /* Next transition is when we hit cval */ - nexttick =3D gt->cval + offset; + /* + * Next transition is when (count - offset) =3D=3D cval, i.e. + * when count =3D=3D (cval + offset). + * If that would overflow, then again we set up the next inter= rupt + * for "as far in the future as possible" for the code below. + */ + if (uadd64_overflow(gt->cval, offset, &nexttick)) { + nexttick =3D UINT64_MAX; + } } /* * Note that the desired next expiry time might be beyond the diff --git a/tests/tcg/aarch64/system/vtimer.c b/tests/tcg/aarch64/system/v= timer.c new file mode 100644 index 00000000000..42f2f7796c7 --- /dev/null +++ b/tests/tcg/aarch64/system/vtimer.c @@ -0,0 +1,48 @@ +/* + * Simple Virtual Timer Test + * + * Copyright (c) 2020 Linaro Ltd + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include +#include + +/* grabbed from Linux */ +#define __stringify_1(x...) #x +#define __stringify(x...) __stringify_1(x) + +#define read_sysreg(r) ({ \ + uint64_t __val; \ + asm volatile("mrs %0, " __stringify(r) : "=3Dr" (__val)); \ + __val; \ +}) + +#define write_sysreg(r, v) do { \ + uint64_t __val =3D (uint64_t)(v); \ + asm volatile("msr " __stringify(r) ", %x0" \ + : : "rZ" (__val)); \ +} while (0) + +int main(void) +{ + int i; + + ml_printf("VTimer Test\n"); + + write_sysreg(cntvoff_el2, 1); + write_sysreg(cntv_cval_el0, -1); + write_sysreg(cntv_ctl_el0, 1); + + ml_printf("cntvoff_el2=3D%lx\n", read_sysreg(cntvoff_el2)); + ml_printf("cntv_cval_el0=3D%lx\n", read_sysreg(cntv_cval_el0)); + ml_printf("cntv_ctl_el0=3D%lx\n", read_sysreg(cntv_ctl_el0)); + + /* Now read cval a few times */ + for (i =3D 0; i < 10; i++) { + ml_printf("%d: cntv_cval_el0=3D%lx\n", i, read_sysreg(cntv_cval_el= 0)); + } + + return 0; +} diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/= Makefile.softmmu-target index 77c5018e02a..4b03ef602ea 100644 --- a/tests/tcg/aarch64/Makefile.softmmu-target +++ b/tests/tcg/aarch64/Makefile.softmmu-target @@ -45,7 +45,8 @@ TESTS+=3Dmemory-sve =20 # Running QEMU_BASE_MACHINE=3D-M virt -cpu max -display none -QEMU_OPTS+=3D$(QEMU_BASE_MACHINE) -semihosting-config enable=3Don,target= =3Dnative,chardev=3Doutput -kernel +QEMU_BASE_ARGS=3D-semihosting-config enable=3Don,target=3Dnative,chardev= =3Doutput +QEMU_OPTS+=3D$(QEMU_BASE_MACHINE) $(QEMU_BASE_ARGS) -kernel =20 # console test is manual only QEMU_SEMIHOST=3D-serial none -chardev stdio,mux=3Don,id=3Dstdio0 -semihost= ing-config enable=3Don,chardev=3Dstdio0 -mon chardev=3Dstdio0,mode=3Dreadli= ne @@ -56,6 +57,10 @@ run-semiconsole: semiconsole run-plugin-semiconsole-with-%: semiconsole $(call skip-test, $<, "MANUAL ONLY") =20 +# vtimer test needs EL2 +QEMU_EL2_MACHINE=3D-machine virt,virtualization=3Don,gic-version=3D2 -cpu = cortex-a57 -smp 4 +run-vtimer: QEMU_OPTS=3D$(QEMU_EL2_MACHINE) $(QEMU_BASE_ARGS) -kernel + # Simple Record/Replay Test .PHONY: memory-record run-memory-record: memory-record memory --=20 2.34.1