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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1700853787063100003 PCIQXLDevice::vram_size seems to be some shadow of VGACommonState::vram_size. Just use the latter. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- RFC: I don't understand this field otherwise. --- hw/display/qxl.h | 1 - hw/display/qxl.c | 17 ++++++++--------- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/hw/display/qxl.h b/hw/display/qxl.h index fdac14edad..47463bd485 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -102,7 +102,6 @@ struct PCIQXLDevice { uint16_t max_outputs; =20 /* vram pci bar */ - uint64_t vram_size; MemoryRegion vram_bar; uint64_t vram32_size; MemoryRegion vram32_bar; diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 7bb00d68f5..0e1c4efc0c 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2067,20 +2067,19 @@ static void qxl_init_ramsize(PCIQXLDevice *qxl) =20 /* vram (surfaces, 64bit, bar 4+5) */ if (qxl->vram_size_mb !=3D -1) { - qxl->vram_size =3D (uint64_t)qxl->vram_size_mb * MiB; + qxl->vga.vram_size =3D (uint64_t)qxl->vram_size_mb * MiB; } - if (qxl->vram_size < qxl->vram32_size) { - qxl->vram_size =3D qxl->vram32_size; + if (qxl->vga.vram_size < qxl->vram32_size) { + qxl->vga.vram_size =3D qxl->vram32_size; } =20 if (qxl->revision =3D=3D 1) { qxl->vram32_size =3D 4096; - qxl->vram_size =3D 4096; + qxl->vga.vram_size =3D 4096; } qxl->vgamem_size =3D pow2ceil(qxl->vgamem_size); qxl->vga.vram_size =3D pow2ceil(qxl->vga.vram_size); qxl->vram32_size =3D pow2ceil(qxl->vram32_size); - qxl->vram_size =3D pow2ceil(qxl->vram_size); } =20 static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) @@ -2135,7 +2134,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Err= or **errp) =20 qxl->guest_surfaces.cmds =3D g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces= ); memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram", - qxl->vram_size, &error_fatal); + qxl->vga.vram_size, &error_fatal); memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32", &qxl->vram_bar, 0, qxl->vram32_size); =20 @@ -2159,7 +2158,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Err= or **errp) pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX, PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram32_bar); =20 - if (qxl->vram32_size < qxl->vram_size) { + if (qxl->vram32_size < qxl->vga.vram_size) { /* * Make the 64bit vram bar show up only in case it is * configured to be larger than the 32bit vram bar. @@ -2177,8 +2176,8 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Err= or **errp) dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n", qxl->vram32_size / MiB); dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n", - qxl->vram_size / MiB, - qxl->vram32_size < qxl->vram_size ? "[region 4]" : "[unmapped]"= ); + qxl->vga.vram_size / MiB, + qxl->vram32_size < qxl->vga.vram_size ? "[region 4]" : "[unmapp= ed]"); =20 qxl->ssd.qxl.base.sif =3D &qxl_interface.base; if (qemu_spice_add_display_interface(&qxl->ssd.qxl, qxl->vga.con) !=3D= 0) { --=20 2.41.0