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([2804:7f0:bdcd:fb00:6501:2693:db52:c621]) by smtp.gmail.com with ESMTPSA id u4-20020a17090282c400b001bb1f0605b2sm1662638plz.214.2023.11.23.10.51.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Nov 2023 10:51:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1700765498; x=1701370298; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ruiTI99kRyklGs/0AQ4FQ49sw2zrr1cnj0+s1Urj/nw=; b=ZnCnPPDWniQCF3qe0/lBSMoX+DybA06xe9XFPrj/8QiuJHdk1/o2rIufO5CCPg+QZn gZXKLc4Zh5jJP4s2OMT9fKLESnb6J97wJSAlk8d3TkBnfUycH8JTWK+MxaECSOC9a9iF Im3qEXVimxdM6mcbC6hsHT24Vs9RgOzmlS8dr3jxu5SuYJm9av7lkgPiwM1CpLHLJEq2 KHok5Ttxr/kYoglQWrvqt4j3AFu8I2ywwIBIYbgykZjiottWqcjCTm7+rn+IGtHaFEpu M2tTwSkB3UeDkGDptH1roInq01cVWIUaJudlVyMwjn9rpekReGRQaDyc7kTSJWzaCT3E AZvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700765498; x=1701370298; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ruiTI99kRyklGs/0AQ4FQ49sw2zrr1cnj0+s1Urj/nw=; b=gZZjOKDIJrO0U1SzvOHj2erKY+99B9KTHa9NmqK7LbmiG9+orVc6fVOw8u2DgokpGD oBAV2KOfk+fxWhj1MITI8ZeHHqVZetK6QPcE3d9Xp8Mt9e+WQG2fn8zNzq0M3dj/p6FC jd1Tcr4NIADODSCzFZYf5gcdPROs1TQlBY5oyfGzs+NKrBFv72QoMAl44DehjFsI4tIa KhBBzvJEMCqTKgpAkBHl7+GJIwYV8pl/C7fDRXd1KIPG/lwGPItDNZg5PJFwa/DgNKa5 Rnpw3GWxbhQbAZptgGrgrXJfl8NVruXfAawTAc9pL9hipq9XwbzUP3gZGemZc/PSwxrM o6TA== X-Gm-Message-State: AOJu0Yz387mlq2EqF5VODnezhhkKmlJ002L4g/+KR9FN38Tkx8qaG8Q/ r47zy0bBbAxh7FC8ruzl0IxxJVJDd2BGuWqzvOU= X-Google-Smtp-Source: AGHT+IEO/RYmqV7Jy5PTjl/kwBCwT/n733LSv/IDChWWpxJUOFAZ+qvPWztrUVeYzXbORB6SNA1DCQ== X-Received: by 2002:a17:902:c407:b0:1cf:8ebd:4eae with SMTP id k7-20020a170902c40700b001cf8ebd4eaemr323177plk.69.1700765497767; Thu, 23 Nov 2023 10:51:37 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH for-9.0 v11 03/18] target/riscv/tcg: update priv_ver on user_set extensions Date: Thu, 23 Nov 2023 15:51:07 -0300 Message-ID: <20231123185122.1100436-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231123185122.1100436-1-dbarboza@ventanamicro.com> References: <20231123185122.1100436-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1700765601584100006 Content-Type: text/plain; charset="utf-8" We'll add a new bare CPU type that won't have any default priv_ver. This means that the CPU will default to priv_ver =3D 0, i.e. 1.10.0. At the same we'll allow these CPUs to enable extensions at will, but then, if the extension has a priv_ver newer than 1.10, we'll end up disabling it. Users will then need to manually set priv_ver to something other than 1.10 to enable the extensions they want, which is not ideal. Change the setter() of extensions to allow user enabled extensions to bump the priv_ver of the CPU. This will make it convenient for users to enable extensions for CPUs that doesn't set a default priv_ver. This change does not affect any existing CPU: vendor CPUs does not allow extensions to be enabled, and generic CPUs are already set to priv_ver LATEST. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 7670120673..d279314624 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -114,6 +114,26 @@ static int cpu_cfg_ext_get_min_version(uint32_t ext_of= fset) g_assert_not_reached(); } =20 +static void cpu_validate_multi_ext_priv_ver(CPURISCVState *env, + uint32_t ext_offset) +{ + int ext_priv_ver; + + if (env->priv_ver =3D=3D PRIV_VERSION_LATEST) { + return; + } + + ext_priv_ver =3D cpu_cfg_ext_get_min_version(ext_offset); + + if (env->priv_ver < ext_priv_ver) { + /* + * Note: the 'priv_spec' command line option, if present, + * will take precedence over this priv_ver bump. + */ + env->priv_ver =3D ext_priv_ver; + } +} + static void cpu_cfg_ext_auto_update(RISCVCPU *cpu, uint32_t ext_offset, bool value) { @@ -757,6 +777,14 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor = *v, const char *name, return; } =20 + if (misa_bit =3D=3D RVH && env->priv_ver < PRIV_VERSION_1_12_0) { + /* + * Note: the 'priv_spec' command line option, if present, + * will take precedence over this priv_ver bump. + */ + env->priv_ver =3D PRIV_VERSION_1_12_0; + } + env->misa_ext |=3D misa_bit; env->misa_ext_mask |=3D misa_bit; } else { @@ -886,6 +914,10 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor= *v, const char *name, return; } =20 + if (value) { + cpu_validate_multi_ext_priv_ver(&cpu->env, multi_ext_cfg->offset); + } + isa_ext_update_enabled(cpu, multi_ext_cfg->offset, value); } =20 --=20 2.41.0