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Thu, 23 Nov 2023 10:36:38 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, kvm@vger.kernel.org, Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-9.0 14/16] target/arm/kvm: Have kvm_arm_handle_dabt_nisv take a ARMCPU argument Date: Thu, 23 Nov 2023 19:35:15 +0100 Message-ID: <20231123183518.64569-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231123183518.64569-1-philmd@linaro.org> References: <20231123183518.64569-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1700764702030100001 Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Gavin Shan --- target/arm/kvm.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 91773c767b..9f58a08710 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1304,17 +1304,16 @@ static void kvm_arm_vm_state_change(void *opaque, b= ool running, RunState state) =20 /** * kvm_arm_handle_dabt_nisv: - * @cs: CPUState + * @cpu: ARMCPU * @esr_iss: ISS encoding (limited) for the exception from Data Abort * ISV bit set to '0b0' -> no valid instruction syndrome * @fault_ipa: faulting address for the synchronous data abort * * Returns: 0 if the exception has been handled, < 0 otherwise */ -static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss, +static int kvm_arm_handle_dabt_nisv(ARMCPU *cpu, uint64_t esr_iss, uint64_t fault_ipa) { - ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; /* * Request KVM to inject the external data abort into the guest @@ -1330,7 +1329,7 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs, uin= t64_t esr_iss, */ events.exception.ext_dabt_pending =3D 1; /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */ - if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) { + if (!kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events)) { env->ext_dabt_raised =3D 1; return 0; } @@ -1422,6 +1421,7 @@ static bool kvm_arm_handle_debug(CPUState *cs, =20 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { + ARMCPU *cpu =3D ARM_CPU(cs); int ret =3D 0; =20 switch (run->exit_reason) { @@ -1432,7 +1432,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run= *run) break; case KVM_EXIT_ARM_NISV: /* External DABT with no valid iss to decode */ - ret =3D kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss, + ret =3D kvm_arm_handle_dabt_nisv(cpu, run->arm_nisv.esr_iss, run->arm_nisv.fault_ipa); break; default: --=20 2.41.0