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Tsirkin" , Peter Maydell , Andrew Jeffery , Daniel Henrique Barboza , Yoshinori Sato , "Edgar E. Iglesias" , Niek Linnenbank , Andrey Smirnov , Tyrone Ting , Jean-Christophe Dubois , Strahinja Jankovic , Harsh Prateek Bora , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Igor Mammedov , qemu-ppc@nongnu.org, Hao Wu , Marcel Apfelbaum , Beniamino Galvani , Richard Henderson , Nicholas Piggin Subject: [PATCH-for-9.0 v2 6/8] hw: Simplify uses of qdev_prop_set_bit(dev, 'start-powered-off') Date: Thu, 23 Nov 2023 15:38:10 +0100 Message-ID: <20231123143813.42632-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231123143813.42632-1-philmd@linaro.org> References: <20231123143813.42632-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1700750422544100005 Simplify few qdev_prop_set_bit("start-powered-off") and re-indent. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell --- hw/arm/allwinner-h3.c | 3 +-- hw/arm/allwinner-r40.c | 3 +-- hw/arm/bcm2836.c | 4 ++-- hw/arm/fsl-imx6.c | 4 +--- hw/arm/fsl-imx7.c | 12 +++++------- 5 files changed, 10 insertions(+), 16 deletions(-) diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index f05afddf7e..593244464a 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -251,8 +251,7 @@ static void allwinner_h3_realize(DeviceState *dev, Erro= r **errp) * Disable secondary CPUs. Guest EL3 firmware will start * them via CPU reset control registers. */ - qdev_prop_set_bit(DEVICE(&s->cpus[i]), "start-powered-off", - i > 0); + qdev_prop_set_bit(DEVICE(&s->cpus[i]), "start-powered-off", i > 0); =20 /* All exception levels required */ qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el3", true); diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index a0d367c60d..202a158fb8 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -304,8 +304,7 @@ static void allwinner_r40_realize(DeviceState *dev, Err= or **errp) * Disable secondary CPUs. Guest EL3 firmware will start * them via CPU reset control registers. */ - qdev_prop_set_bit(DEVICE(&s->cpus[i]), "start-powered-off", - i > 0); + qdev_prop_set_bit(DEVICE(&s->cpus[i]), "start-powered-off", i > 0); =20 /* All exception levels required */ qdev_prop_set_bit(DEVICE(&s->cpus[i]), "has_el3", true); diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 1fdc3be6bb..03e6eb2fb2 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -99,9 +99,9 @@ static void bcm2835_realize(DeviceState *dev, Error **err= p) =20 /* Connect irq/fiq outputs from the interrupt controller. */ sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0, - qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_IRQ)); + qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_I= RQ)); sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, - qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ)); + qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_F= IQ)); } =20 static void bcm2836_realize(DeviceState *dev, Error **errp) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 17c399a37e..b7f1738a89 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -127,9 +127,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **= errp) } =20 /* All CPU but CPU 0 start in power off mode */ - if (i) { - qdev_prop_set_bit(DEVICE(&s->cpu[i]), "start-powered-off", tru= e); - } + qdev_prop_set_bit(DEVICE(&s->cpu[i]), "start-powered-off", i > 0); =20 if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) { return; diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 3138ffeb08..451801f7e8 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -187,13 +187,11 @@ static void fsl_imx7_realize(DeviceState *dev, Error = **errp) &error_abort); } =20 - if (i) { - /* - * Secondary CPUs start in powered-down state (and can be - * powered up via the SRC system reset controller) - */ - qdev_prop_set_bit(DEVICE(o), "start-powered-off", true); - } + /* + * Secondary CPUs start in powered-down state (and can be + * powered up via the SRC system reset controller) + */ + qdev_prop_set_bit(DEVICE(o), "start-powered-off", i > 0); =20 qdev_realize(DEVICE(o), NULL, &error_abort); } --=20 2.41.0