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[60.240.124.93]) by smtp.gmail.com with ESMTPSA id e4-20020a170902d38400b001cc1dff5b86sm1009070pld.244.2023.11.23.02.30.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Nov 2023 02:30:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1700735437; x=1701340237; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GLN3173ytZytDQJzXh3TbGBGR8cSN5dnqSH5vQSBFXg=; b=kymaj8p82qivzfdpZcUddLzzqvaVGc97tmTa+YZa+VBY0IdEag5SM9Or55TR8CZmc9 +1riFSfkpm9l92KlWOm5SSlLfh5hUSh/31mOaRSaBhdaAuDu+9yFGP4jwtv2FX7n6xba 5AMJX8CPGmSiq1bm1AjpaohrZ8DOigUjQd5+q6gGcX2nqNcTaKCbZ9U4tZmqX6hmcxfB XIafxeXSE0I/kWyMZL7dWFAqzCgI8UqWYoknkAQe21jXPu477rW8lfbX6us5n3WefYmo SZqhYAIi14MFfcNlC8PbTnEQjp/XYPvfMSiA6cR5kVhGHNgC7aC0o58geAHT07Nxprt1 Sdrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700735437; x=1701340237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GLN3173ytZytDQJzXh3TbGBGR8cSN5dnqSH5vQSBFXg=; b=JzlHZdGXWK6K4E1neldXigRBDMN1wVPBA71s/j/TTN07/+hoyvRbfSTLHYsPPhXD0I iGbk2CDlWQ3gZW4eJdSvuFDwuvcw48VMrdLmaVw9WBTohLHeLC+H94ooWfN5iA3LfqeW RZEIqi8M27rcm4CQ7X3SNsF40LCxjjIqFZN5KAlMLNV2A/39pb+PIEvrDr60DfpdlaB1 YxsG7lw6UPmS6ey0uBQMWtGJEawiGTy13G41LdE8/U34CrwLLX8sAZ/pn+HUcQFVlnQ7 WPYldRC9YVHgKjl4Hq4UzLuT7p2MTJ584H0I5e7ZcWewtRSPRfLfEGVuFX3PeDTAQB8m 1gEg== X-Gm-Message-State: AOJu0Yw63E2gcKza2YRzOanM6BqUPRcjJ/+ad6v9Jfr7b30zHZu136nV GJiVDpl34F7rAb9S5HCyAlzDG3jK8oA= X-Google-Smtp-Source: AGHT+IFsnUGWEdsR98/abcHI52xHLIsOVq0zDI9MWOUrkbg+YeT1nwFJbXiNCDPLsrYJ5np0xn4RRw== X-Received: by 2002:a17:902:9044:b0:1cc:29ed:96ae with SMTP id w4-20020a170902904400b001cc29ed96aemr4911816plz.41.1700735436998; Thu, 23 Nov 2023 02:30:36 -0800 (PST) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , qemu-devel@nongnu.org Subject: [PATCH 3/7] target/ppc: Fix move-to timebase SPR access permissions Date: Thu, 23 Nov 2023 20:30:14 +1000 Message-ID: <20231123103018.172383-4-npiggin@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231123103018.172383-1-npiggin@gmail.com> References: <20231123103018.172383-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=npiggin@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1700735580205100001 Content-Type: text/plain; charset="utf-8" The move-to timebase registers TBU and TBL can not be read, and they can not be written in supervisor mode on hypervisor-capable CPUs. Signed-off-by: Nicholas Piggin --- target/ppc/helper_regs.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 6f190ab13b..f1493ddca0 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -468,18 +468,33 @@ void register_generic_sprs(PowerPCCPU *cpu) &spr_read_tbl, SPR_NOACCESS, &spr_read_tbl, SPR_NOACCESS, 0x00000000); - spr_register(env, SPR_WR_TBL, "TBL", - &spr_read_tbl, SPR_NOACCESS, - &spr_read_tbl, &spr_write_tbl, - 0x00000000); spr_register(env, SPR_TBU, "TBU", &spr_read_tbu, SPR_NOACCESS, &spr_read_tbu, SPR_NOACCESS, 0x00000000); - spr_register(env, SPR_WR_TBU, "TBU", - &spr_read_tbu, SPR_NOACCESS, - &spr_read_tbu, &spr_write_tbu, - 0x00000000); +#ifndef CONFIG_USER_ONLY + if (env->has_hv_mode) { + spr_register_hv(env, SPR_WR_TBL, "TBL", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, &spr_write_tbl, + 0x00000000); + spr_register_hv(env, SPR_WR_TBU, "TBU", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, &spr_write_tbu, + 0x00000000); + } else { + spr_register(env, SPR_WR_TBL, "TBL", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, &spr_write_tbl, + 0x00000000); + spr_register(env, SPR_WR_TBU, "TBU", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, &spr_write_tbu, + 0x00000000); + } +#endif } =20 void register_non_embedded_sprs(CPUPPCState *env) --=20 2.42.0