From nobody Wed Nov 27 04:54:38 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=syntacore.com ARC-Seal: i=1; a=rsa-sha256; t=1700482116; cv=none; d=zohomail.com; s=zohoarc; b=BuEL1rLEG7GFYUTue7Wz0A1KG9/Iog45UzZRyG0ymbxl0n5Sa7lL+cz4hiJvqnV9Q0U8hrp5Pkoq6tTZnk5NYInkNSleoLJBo1OXbECzkmHMhn6kQHV566VYimiwGmibKVVh6xv8yDEENPKwC5So3R1zhASz2SuFe60akRnId24= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1700482116; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WYPOfCv1L3H90LB4jZVlsUVoHv2MYYSum6jrNzaBbj0=; b=WVDC1howZMoNacdbklIFYnrE+kE5d8cPmqgcEQhRd4PvvvDjO8IgdxJjVaZ5VdHHyg7y6gJXmVN19mSDa4riebHegyi3+U+KwzrSwB8m4rODTAjqL6Q64omLHcshBAZ2wZNIRDRTXpqCxwYxYozSnwzLnJ0hh83AD2hQjtwXoA4= ARC-Authentication-Results: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mta-04; t=1700481982; bh=WYPOfCv1L3H90LB4jZVlsUVoHv2MYYSum6jrNzaBbj0=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=RBT7k5y0wPPwXpotvzOb9IbPU6O79t4geMqPCYdifNVQCnH+5fWCY3UZWsQZNEidB lh8iMsN/HQcrW4J3ytHgmI1xuWhAA9wTE3/k/DE0yl9kOHZ1gz1gP6N+t3iy5llRN4 fmbxEzAFY11nCjHQ5a35CG+8XHbWPVaxgxoBVQaIdRD6yO9N92SCTk0fKj5qzyPdqS wN+anYu5c5mFUpJv8vW37y0WGWN67bwEAwqrzbWOrnIAGP9Y3DwFOsKgj6tYG7hg0l 6VDYz44na9tGZOXShGDFZ+1yjSTU7owpNn1ZA8V+XfiCJbBQvOKPC03X7ozQkkLbt1 Qn4sK5NkuzL/w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mta-03; t=1700481982; bh=WYPOfCv1L3H90LB4jZVlsUVoHv2MYYSum6jrNzaBbj0=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=g2ynY5EEftayrhgTSJykFPfMTxiH5vqp0+E17n3J8+/7UK0kb8rJeKbpkhm4Obg39 8ZcOEjnCM3HhF0z5zmxB3TrZHWUPNQKKYxHSwPH58gEcC61NyuKTyxSJowoU5PzYwD U89Dgg4zhBV5yFKYCvIlBVs7Gnk8USyf4RxKRGPykckVXfl3xSurK8xkOCdFk8CSZA cI9WT+Tg1gWRX+62itnpJolvfH/Ha67lOLDe/DleOy/3mBjTK9SgVZwGfdF9UCSTw7 jqAlkp5yEt2c7ovY86InaQrzVw6vdKJVWd0s1bb/2mNHVGafQeUUqIDrspMspWIa7v NCS963z9RBRxg== From: Ivan Klokov To: CC: , , , , , , , Ivan Klokov Subject: [PATCH 1/2] target/riscv/cpu_helper.c: Invalid exception on MMU translation stage Date: Mon, 20 Nov 2023 15:06:08 +0300 Message-ID: <20231120120609.37960-2-ivan.klokov@syntacore.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231120120609.37960-1-ivan.klokov@syntacore.com> References: <20231120120609.37960-1-ivan.klokov@syntacore.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: T-Exch-05.corp.yadro.com (172.17.10.109) To S-Exch-01.corp.yadro.com (10.78.5.241) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: permerror client-ip=89.207.88.248; envelope-from=ivan.klokov@syntacore.com; helo=mta-04.yadro.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_PERMERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @syntacore.com) (identity @syntacore.com) X-ZM-MESSAGEID: 1700482118320100003 Content-Type: text/plain; charset="utf-8" According to RISCV priveleged spec sect. 5.3.2 Virtual Address Translation = Process access-fault exceptions may raise only after PMA/PMP check. Current impleme= ntation generates an acces-fault for mbare mode even if there were no PMA/PMP error= s. This patch removes the erroneous MMU mode check and generates an access-fau= lt exception based on the pmp_violation flag only. Signed-off-by: Ivan Klokov Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu_helper.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index b7af69de53..9ff0952e46 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1143,47 +1143,31 @@ static void raise_mmu_exception(CPURISCVState *env,= target_ulong address, bool two_stage_indirect) { CPUState *cs =3D env_cpu(env); - int page_fault_exceptions, vm; - uint64_t stap_mode; - - if (riscv_cpu_mxl(env) =3D=3D MXL_RV32) { - stap_mode =3D SATP32_MODE; - } else { - stap_mode =3D SATP64_MODE; - } - - if (first_stage) { - vm =3D get_field(env->satp, stap_mode); - } else { - vm =3D get_field(env->hgatp, stap_mode); - } - - page_fault_exceptions =3D vm !=3D VM_1_10_MBARE && !pmp_violation; =20 switch (access_type) { case MMU_INST_FETCH: if (env->virt_enabled && !first_stage) { cs->exception_index =3D RISCV_EXCP_INST_GUEST_PAGE_FAULT; } else { - cs->exception_index =3D page_fault_exceptions ? - RISCV_EXCP_INST_PAGE_FAULT : RISCV_EXCP_INST_ACCESS_FAULT; + cs->exception_index =3D pmp_violation ? + RISCV_EXCP_INST_ACCESS_FAULT : RISCV_EXCP_INST_PAGE_FAULT; } break; case MMU_DATA_LOAD: if (two_stage && !first_stage) { cs->exception_index =3D RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT; } else { - cs->exception_index =3D page_fault_exceptions ? - RISCV_EXCP_LOAD_PAGE_FAULT : RISCV_EXCP_LOAD_ACCESS_FAULT; + cs->exception_index =3D pmp_violation ? + RISCV_EXCP_LOAD_ACCESS_FAULT : RISCV_EXCP_LOAD_PAGE_FAULT; } break; case MMU_DATA_STORE: if (two_stage && !first_stage) { cs->exception_index =3D RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAUL= T; } else { - cs->exception_index =3D page_fault_exceptions ? - RISCV_EXCP_STORE_PAGE_FAULT : - RISCV_EXCP_STORE_AMO_ACCESS_FAULT; + cs->exception_index =3D pmp_violation ? + RISCV_EXCP_STORE_AMO_ACCESS_FAULT : + RISCV_EXCP_STORE_PAGE_FAULT; } break; default: --=20 2.34.1 From nobody Wed Nov 27 04:54:38 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=syntacore.com ARC-Seal: i=1; a=rsa-sha256; t=1700482056; cv=none; d=zohomail.com; s=zohoarc; b=hDRusXyC5P3yXu3cFFJeB4KwbpWvzaR58Hn3SQb6X83fOPcPlzjCda8orRki/UeLn4HCju4/RF4wOIZGi2+utvRqklLehsBNhd+sjiGd6A7Yg6edbvn6g9WKPKRCKOXAgLEA9CxeH9LLNdjRaGQ41n8ALhquGDzrRkQ740FYWPc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1700482056; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SXSNj1W7Kz+aSldUPo1hOHeLKsnFtMZxHNHcTs0zYJ4=; b=OB02K3zkYFXi4UZOWTEifnSHmP1PgowmMQ3wvZGWSzs89UpjSABPAaA/emTab/dXonQOi1zuetVQJ/TMs6k+TAZJpm9rECHpFf4tXnbsWMygZePh8asA84uiAONdGULFe8bQi/Q/e9uQ7KgMI0g2n28jiaLFYCJMWeeZd8hDWZs= ARC-Authentication-Results: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mta-04; t=1700481984; bh=SXSNj1W7Kz+aSldUPo1hOHeLKsnFtMZxHNHcTs0zYJ4=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=EMuVZWgfL8+IDTeK2LhmAiNV0Q4vRRAOXJ2f26AySZVm+ak98XH44KK/Qrm+3AlZl 04Zx5bFQXI5Ge6sa6gekAJooHlQ7j1JgE5qSok4uBhBq1MruPZmVRiulq9rYc+Uhvw uUpYoAUMezwYgD0crlkMiCw2jjd0b7kBCgsEnldoLJ6uMRyqu3SypthLZm3+FAfDWp 7yD32mv5nJ6kR/FtZCSI1wrALj8N3SqiRjsO1K+xXPP94VG7fjYWgB6vNlLlzymvXF x9npiqtngysunASwxMsbDY5QGgWlURTlHsy+By59BW9WwEEoapwUXrazKh1cveKJmf Ao++G8jOt+8wg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mta-03; t=1700481984; bh=SXSNj1W7Kz+aSldUPo1hOHeLKsnFtMZxHNHcTs0zYJ4=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=r4G72BasqC83k2h+9Hv25MwotdVrGXQ8y7Ae/3cMwF4ZCEHl46xiO9cxWHCiqPL6O cEUd6gQOTYPZV8SM8gTq/woLaNBRYdrNxfPqnpQPpBXc73bt5BmghxgtIWwmjYWouw LsGUteXtK8eoU1ZMTdygif/iPxyDJ5IAE07CxVR1ZzbKUmIce09XmxufqE2MPdSJFJ CJsLS88iJfFyAx16II8eqPK77nPiypqAeDx0nW3W1diUpH05lV8ffTs+N9FZIuze/6 qV8U+q+jHqxnfmeePkYlnoW+NmUnXcpE61C9q8CJVgk3XeJ55FgB8lNXwZJwmhv6SJ bR+LhslCAZxGg== From: Ivan Klokov To: CC: , , , , , , , Ivan Klokov Subject: [PATCH 2/2] target/riscv/cpu_helper.c: Fix mxr bit behavior Date: Mon, 20 Nov 2023 15:06:09 +0300 Message-ID: <20231120120609.37960-3-ivan.klokov@syntacore.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231120120609.37960-1-ivan.klokov@syntacore.com> References: <20231120120609.37960-1-ivan.klokov@syntacore.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: T-Exch-05.corp.yadro.com (172.17.10.109) To S-Exch-01.corp.yadro.com (10.78.5.241) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: permerror client-ip=89.207.88.248; envelope-from=ivan.klokov@syntacore.com; helo=mta-04.yadro.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_PERMERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @syntacore.com) (identity @syntacore.com) X-ZM-MESSAGEID: 1700482057967100003 Content-Type: text/plain; charset="utf-8" According to RISCV Specification sect 9.5 on two stage translation when V=3D1 the vsstatus(mstatus in QEMU's terms) field MXR, which makes execute-only pages readable, only overrides VS-stage page protection. Setting MXR at HS-level(mstatus_hs), however, overrides both VS-stage and G-stage execute-only permissions. The hypervisor extension changes the behavior of MXR\MPV\MPRV bits. Due to RISCV Specification sect. 9.4.1 when MPRV=3D1, explicit memory accesses are translated and protected, and endianness is applied, as though the current virtualization mode were set to MPV and the current nominal privilege mode were set to MPP. vsstatus.MXR makes readable those pages marked executable at the VS translation stage. Signed-off-by: Ivan Klokov Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu_helper.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 9ff0952e46..e7e23b34f4 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1032,13 +1032,29 @@ restart: prot |=3D PAGE_WRITE; } if (pte & PTE_X) { - bool mxr; + bool mxr =3D false; =20 - if (first_stage =3D=3D true) { + /* + * Use mstatus for first stage or for the second stage without + * virt_enabled (MPRV+MPV) + */ + if (first_stage || !env->virt_enabled) { mxr =3D get_field(env->mstatus, MSTATUS_MXR); - } else { - mxr =3D get_field(env->vsstatus, MSTATUS_MXR); } + + /* MPRV+MPV case, check VSSTATUS */ + if (first_stage && two_stage && !env->virt_enabled) { + mxr |=3D get_field(env->vsstatus, MSTATUS_MXR); + } + + /* + * Setting MXR at HS-level overrides both VS-stage and G-stage + * execute-only permissions + */ + if (env->virt_enabled) { + mxr |=3D get_field(env->mstatus_hs, MSTATUS_MXR); + } + if (mxr) { prot |=3D PAGE_READ; } --=20 2.34.1