From nobody Wed Nov 27 06:39:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1700206907; cv=none; d=zohomail.com; s=zohoarc; b=AJaD7FW6Kc5fwmXJMBAhGICt3iQZaQkbFAewczaC5BqUMa5keQ6/OYBWVijNl5YT4TLZsNqxZWU3YHQx/HfxGWpNJN1Q7ktk+YnA8jpiVCnsIwlKL7Am3zqZ3WJaAMFxYEAw8OjYlXYJ6jnQmCWgeUE6+w/msUe9vPgwSmVy6AM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1700206907; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EAIO2fbISH/NskwOGbgDbbHukZR6AvFoQRPrEJVsXyU=; b=R3atQ6JY7uzbdmgycWjEbFWwtzQ83x3RkpSLgtqi/YGmzNea/MvOANXdPMx1nRfkWNbtS0COtpchCQLhDDe9wsvje5IB6/T7zRei4DndODD13JMaJrZVN6nnx97awKG2FSCeABSuScgNgW8GNHuvCe4L9TRngOJ04J5moDmHgcw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1700206907605254.73593804095844; Thu, 16 Nov 2023 23:41:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r3tSo-0005ff-KG; Fri, 17 Nov 2023 02:40:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3tSk-0005N6-22 for qemu-devel@nongnu.org; Fri, 17 Nov 2023 02:40:27 -0500 Received: from mgamail.intel.com ([134.134.136.65]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3tSf-00083O-5N for qemu-devel@nongnu.org; Fri, 17 Nov 2023 02:40:24 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2023 23:40:01 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmsmga002.fm.intel.com with ESMTP; 16 Nov 2023 23:39:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700206821; x=1731742821; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZCZhkypGU+3VddxCAIiK9RH8BO2TfZ8eenzjOGDUVyE=; b=kiTDlxy/zzA/AKaTkodPlWamdZqPeDKCTiII5Qd20NuOcVO9TTv/CtB0 xq7N6tN4yU/xPaXgHTwf+fR+mkz6wFmtxv9JFpcTwwCteZJ1UCnt53uyw 27P0xCW9J+kz0vNmSPe9lv6V7AZUZ1eoHRQ5EQXwXjfthuzII7SVd9UF4 B6fq1oQNf/c4zhHViVqi3aOVPeqZHrNOrOWY3v4t/5a8ckqhYBCRwIyfT KUNGCySv9ZZ1FSE2I/jR9TcOIFK1fyeSOX771Aj9BBQoZBYZHoQfww9mK 2SsyXIy8r/FXyxWpeGe2/pYOzhGmuEkgRqLOKC0qnIced8TCWtYgT3bQy A==; X-IronPort-AV: E=McAfee;i="6600,9927,10896"; a="395180379" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="395180379" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10896"; a="883042781" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="883042781" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Babu Moger , Yongwei Ma , Zhao Liu Subject: [PATCH v6 10/16] i386/cpu: Introduce cluster-id to X86CPU Date: Fri, 17 Nov 2023 15:51:00 +0800 Message-Id: <20231117075106.432499-11-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231117075106.432499-1-zhao1.liu@linux.intel.com> References: <20231117075106.432499-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=134.134.136.65; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.117, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1700206908490100006 Content-Type: text/plain; charset="utf-8" From: Zhuocheng Ding Introduce cluster-id other than module-id to be consistent with CpuInstanceProperties.cluster-id, and this avoids the confusion of parameter names when hotplugging. Following the legacy smp check rules, also add the cluster_id validity into x86_cpu_pre_plug(). Signed-off-by: Zhuocheng Ding Co-developed-by: Zhao Liu Signed-off-by: Zhao Liu Tested-by: Babu Moger Tested-by: Yongwei Ma Acked-by: Michael S. Tsirkin --- Changes since v5: * Update the comment when check cluster-id. Since current QEMU is v8.2, the cluster-id support should at least start from v8.3. Changes since v3: * Use the imperative in the commit message. (Babu) --- hw/i386/x86.c | 33 +++++++++++++++++++++++++-------- target/i386/cpu.c | 2 ++ target/i386/cpu.h | 1 + 3 files changed, 28 insertions(+), 8 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 3e2fabf3d5bd..20308d11c985 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -325,6 +325,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, cpu->die_id =3D 0; } =20 + /* + * cluster-id was optional in QEMU 8.3 and older, so keep it optio= nal + * if there's only one cluster per die. + */ + if (cpu->cluster_id < 0 && ms->smp.clusters =3D=3D 1) { + cpu->cluster_id =3D 0; + } + if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); return; @@ -341,6 +349,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, cpu->die_id, ms->smp.dies - 1); return; } + if (cpu->cluster_id < 0) { + error_setg(errp, "CPU cluster-id is not set"); + return; + } else if (cpu->cluster_id > ms->smp.clusters - 1) { + error_setg(errp, "Invalid CPU cluster-id: %u must be in range = 0:%u", + cpu->cluster_id, ms->smp.clusters - 1); + return; + } if (cpu->core_id < 0) { error_setg(errp, "CPU core-id is not set"); return; @@ -360,16 +376,9 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, =20 topo_ids.pkg_id =3D cpu->socket_id; topo_ids.die_id =3D cpu->die_id; + topo_ids.module_id =3D cpu->cluster_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; - - /* - * TODO: This is the temporary initialization for topo_ids.module_= id to - * avoid "maybe-uninitialized" compilation errors. Will remove when - * X86CPU supports cluster_id. - */ - topo_ids.module_id =3D 0; - cpu->apic_id =3D x86_apicid_from_topo_ids(&topo_info, &topo_ids); } =20 @@ -414,6 +423,14 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, } cpu->die_id =3D topo_ids.die_id; =20 + if (cpu->cluster_id !=3D -1 && cpu->cluster_id !=3D topo_ids.module_id= ) { + error_setg(errp, "property cluster-id: %u doesn't match set apic-i= d:" + " 0x%x (cluster-id: %u)", cpu->cluster_id, cpu->apic_id, + topo_ids.module_id); + return; + } + cpu->cluster_id =3D topo_ids.module_id; + if (cpu->core_id !=3D -1 && cpu->core_id !=3D topo_ids.core_id) { error_setg(errp, "property core-id: %u doesn't match set apic-id:" " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0fcdd6f5f349..84f305130a6f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7908,12 +7908,14 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_UINT32("apic-id", X86CPU, apic_id, 0), DEFINE_PROP_INT32("thread-id", X86CPU, thread_id, 0), DEFINE_PROP_INT32("core-id", X86CPU, core_id, 0), + DEFINE_PROP_INT32("cluster-id", X86CPU, cluster_id, 0), DEFINE_PROP_INT32("die-id", X86CPU, die_id, 0), DEFINE_PROP_INT32("socket-id", X86CPU, socket_id, 0), #else DEFINE_PROP_UINT32("apic-id", X86CPU, apic_id, UNASSIGNED_APIC_ID), DEFINE_PROP_INT32("thread-id", X86CPU, thread_id, -1), DEFINE_PROP_INT32("core-id", X86CPU, core_id, -1), + DEFINE_PROP_INT32("cluster-id", X86CPU, cluster_id, -1), DEFINE_PROP_INT32("die-id", X86CPU, die_id, -1), DEFINE_PROP_INT32("socket-id", X86CPU, socket_id, -1), #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 95cbbb1de906..6a6356e34e62 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2057,6 +2057,7 @@ struct ArchCPU { int32_t node_id; /* NUMA node this CPU belongs to */ int32_t socket_id; int32_t die_id; + int32_t cluster_id; int32_t core_id; int32_t thread_id; =20 --=20 2.34.1