From nobody Wed Nov 27 06:49:05 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1700206899; cv=none; d=zohomail.com; s=zohoarc; b=QAj4E0Igv4+wLhDFe0nYy06q744Fs5RXrVhDjm8GTe/4UoUdEddcu4OIPU8UzqfAeuB9Jv5xBQ+zRVrbYbXVJzjQhvWRZ3WaWQ91oRKJMneKzXLNPuOSPumZ06sA4i4qoc6uVyQWdyXAamAYIRoULNeQ2p09z0HV0C3jcIaBUjw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1700206899; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=9Rr+kC8R+hEBb+7MlMhzKdkYW8L8Wc7hQAvAeo9fkz4=; b=ZBLZmogKyh2JHwm2hoXcS71UBHATjOwn5BdDsUuKF5O4VkGgetUqHe1MDSo3FAOFuLwIpPPrD7vujpPpnlIBz5vQLsO3v7nSlxfiJgAYQMjR93JdOZ0+JJ+XiyiCDu3x9Q1Zd0RstDV/LPgKKqh+NYXWNM8FXs4fmryQ1Wce8HE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170020689990984.87662908616187; Thu, 16 Nov 2023 23:41:39 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r3tSe-00058g-IW; Fri, 17 Nov 2023 02:40:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3tSe-00058W-0F for qemu-devel@nongnu.org; Fri, 17 Nov 2023 02:40:20 -0500 Received: from mgamail.intel.com ([134.134.136.65]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3tSZ-0008K1-DV for qemu-devel@nongnu.org; Fri, 17 Nov 2023 02:40:19 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2023 23:39:57 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmsmga002.fm.intel.com with ESMTP; 16 Nov 2023 23:39:53 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700206815; x=1731742815; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=a+74DxT3dREJBY9EaraqrrwqvMhEGimb8T6AvCRGFqw=; b=PcTbWJQ4UGIsbQHKZyqW+IhTqRuvN28NwfSUV+rfO3ZPPZL2Ef4MGKSy UrS9HOBlnBQz9jGDHpCrp+YVu6CCogR20q72eaGvYivdgIg4LPvSVZZtC QZ93zrPipXcd1bh4q2AfwQ+0Tr6V2pYOlm9zd+lPCoDxrfNkG+SqCbnbd tH4z9Y00Ep2xVxcYRCs8U388U+haHLlYRJ5AraQRZFn1qSNqD86IhYU+L ZkG/765P5IFOxw1+WHkv2Ltca47XQoOltbELJVo3HFiKUJvkvXnPt/yFo fDIWpRHxU6Kltn2aEV11mafXndPB+TSvNtRKqlr0ttPuHgKgglQcQ2+eP g==; X-IronPort-AV: E=McAfee;i="6600,9927,10896"; a="395180369" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="395180369" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10896"; a="883042761" X-IronPort-AV: E=Sophos;i="6.04,206,1695711600"; d="scan'208";a="883042761" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Babu Moger , Yongwei Ma , Zhao Liu Subject: [PATCH v6 09/16] i386: Support module_id in X86CPUTopoIDs Date: Fri, 17 Nov 2023 15:50:59 +0800 Message-Id: <20231117075106.432499-10-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231117075106.432499-1-zhao1.liu@linux.intel.com> References: <20231117075106.432499-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=134.134.136.65; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.117, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1700206900442100001 Content-Type: text/plain; charset="utf-8" From: Zhuocheng Ding Add module_id member in X86CPUTopoIDs. module_id can be parsed from APIC ID, so also update APIC ID parsing rule to support module level. With this support, the conversions with module level between X86CPUTopoIDs, X86CPUTopoInfo and APIC ID are completed. module_id can be also generated from cpu topology, and before i386 supports "clusters" in smp, the default "clusters per die" is only 1, thus the module_id generated in this way is 0, so that it will not conflict with the module_id generated by APIC ID. Signed-off-by: Zhuocheng Ding Co-developed-by: Zhao Liu Signed-off-by: Zhao Liu Tested-by: Babu Moger Tested-by: Yongwei Ma Acked-by: Michael S. Tsirkin --- Changes since v1: * Merge the patch "i386: Update APIC ID parsing rule to support module level" into this one. (Yanan) * Move the apicid_module_width() and apicid_module_offset() support into the previous modules_per_die related patch. (Yanan) --- hw/i386/x86.c | 28 +++++++++++++++++++++------- include/hw/i386/topology.h | 17 +++++++++++++---- 2 files changed, 34 insertions(+), 11 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 8503d30a133a..3e2fabf3d5bd 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -311,11 +311,11 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, =20 /* * If APIC ID is not set, - * set it based on socket/die/core/thread properties. + * set it based on socket/die/cluster/core/thread properties. */ if (cpu->apic_id =3D=3D UNASSIGNED_APIC_ID) { - int max_socket =3D (ms->smp.max_cpus - 1) / - smp_threads / smp_cores / ms->smp.dies; + int max_socket =3D (ms->smp.max_cpus - 1) / smp_threads / smp_core= s / + ms->smp.clusters / ms->smp.dies; =20 /* * die-id was optional in QEMU 4.0 and older, so keep it optional @@ -362,17 +362,27 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, topo_ids.die_id =3D cpu->die_id; topo_ids.core_id =3D cpu->core_id; topo_ids.smt_id =3D cpu->thread_id; + + /* + * TODO: This is the temporary initialization for topo_ids.module_= id to + * avoid "maybe-uninitialized" compilation errors. Will remove when + * X86CPU supports cluster_id. + */ + topo_ids.module_id =3D 0; + cpu->apic_id =3D x86_apicid_from_topo_ids(&topo_info, &topo_ids); } =20 cpu_slot =3D x86_find_cpu_slot(MACHINE(x86ms), cpu->apic_id, &idx); if (!cpu_slot) { x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + error_setg(errp, - "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" - " APIC ID %" PRIu32 ", valid index range 0:%d", - topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.s= mt_id, - cpu->apic_id, ms->possible_cpus->len - 1); + "Invalid CPU [socket: %u, die: %u, module: %u, core: %u, threa= d: %u]" + " with APIC ID %" PRIu32 ", valid index range 0:%d", + topo_ids.pkg_id, topo_ids.die_id, topo_ids.module_id, + topo_ids.core_id, topo_ids.smt_id, cpu->apic_id, + ms->possible_cpus->len - 1); return; } =20 @@ -493,6 +503,10 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(Machine= State *ms) ms->possible_cpus->cpus[i].props.has_die_id =3D true; ms->possible_cpus->cpus[i].props.die_id =3D topo_ids.die_id; } + if (ms->smp.clusters > 1) { + ms->possible_cpus->cpus[i].props.has_cluster_id =3D true; + ms->possible_cpus->cpus[i].props.cluster_id =3D topo_ids.modul= e_id; + } ms->possible_cpus->cpus[i].props.has_core_id =3D true; ms->possible_cpus->cpus[i].props.core_id =3D topo_ids.core_id; ms->possible_cpus->cpus[i].props.has_thread_id =3D true; diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 517e51768c13..ed1f3d6c1d5e 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -50,6 +50,7 @@ typedef uint32_t apic_id_t; typedef struct X86CPUTopoIDs { unsigned pkg_id; unsigned die_id; + unsigned module_id; unsigned core_id; unsigned smt_id; } X86CPUTopoIDs; @@ -127,6 +128,7 @@ static inline apic_id_t x86_apicid_from_topo_ids(X86CPU= TopoInfo *topo_info, { return (topo_ids->pkg_id << apicid_pkg_offset(topo_info)) | (topo_ids->die_id << apicid_die_offset(topo_info)) | + (topo_ids->module_id << apicid_module_offset(topo_info)) | (topo_ids->core_id << apicid_core_offset(topo_info)) | topo_ids->smt_id; } @@ -140,12 +142,16 @@ static inline void x86_topo_ids_from_idx(X86CPUTopoIn= fo *topo_info, X86CPUTopoIDs *topo_ids) { unsigned nr_dies =3D topo_info->dies_per_pkg; - unsigned nr_cores =3D topo_info->cores_per_module * - topo_info->modules_per_die; + unsigned nr_modules =3D topo_info->modules_per_die; + unsigned nr_cores =3D topo_info->cores_per_module; unsigned nr_threads =3D topo_info->threads_per_core; =20 - topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_cores * nr_threads); - topo_ids->die_id =3D cpu_index / (nr_cores * nr_threads) % nr_dies; + topo_ids->pkg_id =3D cpu_index / (nr_dies * nr_modules * + nr_cores * nr_threads); + topo_ids->die_id =3D cpu_index / (nr_modules * nr_cores * + nr_threads) % nr_dies; + topo_ids->module_id =3D cpu_index / (nr_cores * nr_threads) % + nr_modules; topo_ids->core_id =3D cpu_index / nr_threads % nr_cores; topo_ids->smt_id =3D cpu_index % nr_threads; } @@ -163,6 +169,9 @@ static inline void x86_topo_ids_from_apicid(apic_id_t a= picid, topo_ids->core_id =3D (apicid >> apicid_core_offset(topo_info)) & ~(0xFFFFFFFFUL << apicid_core_width(topo_info)); + topo_ids->module_id =3D + (apicid >> apicid_module_offset(topo_info)) & + ~(0xFFFFFFFFUL << apicid_module_width(topo_info)); topo_ids->die_id =3D (apicid >> apicid_die_offset(topo_info)) & ~(0xFFFFFFFFUL << apicid_die_width(topo_info)); --=20 2.34.1