From nobody Wed Nov 27 08:49:51 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1700033231; cv=none; d=zohomail.com; s=zohoarc; b=KD0ZcEDajE8SHT4O9IWI0uZxGhUEyxl6+TEU9bozWObk3gSkZTvwczHR46+ACt5FSI9At5tuwSh8H0gqC6PuTQzy8Wg8dcQHC+tlXHa1TgOFEkZdY9bPB5WpBALC9u8BEI7/lXwI+P9JbjNFPK6dbCevPaPMcXWif1sky1ym0uI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1700033231; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=XBjijvWX4LlGa1HVRTUrmAO3Y/7E0HqZoTx8BLyZVbs=; b=MGDL+yylRuM2lO0H2q3rfTC5ylxQOUfI6spJgyT76Mqvj3d0tI2uKEWLPkl+BXClFo3nEvBTYo/EnKfb+R72TLAjsEZbcP11civ2PrRqPz9yfS1CDu6O+piUFHSMHRTPi752tzEuRaG06dEp2d4UbQXEWoDy1psk8iianFYzfQE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1700033231162407.2836605926252; Tue, 14 Nov 2023 23:27:11 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r3AGC-0002Ps-9N; Wed, 15 Nov 2023 02:24:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3AGA-0002LO-Na for qemu-devel@nongnu.org; Wed, 15 Nov 2023 02:24:26 -0500 Received: from mgamail.intel.com ([192.55.52.115]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r3AG8-0007Df-60 for qemu-devel@nongnu.org; Wed, 15 Nov 2023 02:24:26 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2023 23:24:23 -0800 Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orsmga003.jf.intel.com with ESMTP; 14 Nov 2023 23:24:16 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700033064; x=1731569064; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=klfzRXQXY4gU48ZNC2oRdXZ/A2KblsfGhFWWh4dKX9U=; b=lbxuZjPwivOwAXFQyQ3k3QfByYwQjOhmLrKsJxwkqaXm0fBLFAqmKpTq BAd1wwjXmHwcShw/kxfCA+1QuLlbINi3KYqL2+LBq3FWaVFXhaI1qR1dV 1LXOodGrR0aP8hE2dEe2Qs4XX5yh87aynbLQoUrrH/rJSyHX6V/z3LhXs OHIMhi2uQthdXnplcFC+UWjzjMh0yPwLqLyi1+Ch1HNKQTj7U36m+cUsa 9OwmS0A1DiGvmF7ngZDADrxfai+NFu3EDdwMZg9WHWLf/fOxe6eFJYcw/ EdINP16dQ6jTuTgrJFQyqoBTueSiPJ0cQOGBTQ/d3SbyuZ89Bu1snNxBP Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="390623755" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="390623755" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="714800609" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="714800609" From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Cornelia Huck , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v3 70/70] docs: Add TDX documentation Date: Wed, 15 Nov 2023 02:15:19 -0500 Message-Id: <20231115071519.2864957-71-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231115071519.2864957-1-xiaoyao.li@intel.com> References: <20231115071519.2864957-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.115; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.999, HK_RANDOM_FROM=0.999, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1700033231526100001 Content-Type: text/plain; charset="utf-8" Add docs/system/i386/tdx.rst for TDX support, and add tdx in confidential-guest-support.rst Signed-off-by: Xiaoyao Li --- Changes since v1: - Add prerequisite of private gmem; - update example command to launch TD; Changes since RFC v4: - add the restriction that kernel-irqchip must be split --- docs/system/confidential-guest-support.rst | 1 + docs/system/i386/tdx.rst | 113 +++++++++++++++++++++ docs/system/target-i386.rst | 1 + 3 files changed, 115 insertions(+) create mode 100644 docs/system/i386/tdx.rst diff --git a/docs/system/confidential-guest-support.rst b/docs/system/confi= dential-guest-support.rst index 0c490dbda2b7..66129fbab64c 100644 --- a/docs/system/confidential-guest-support.rst +++ b/docs/system/confidential-guest-support.rst @@ -38,6 +38,7 @@ Supported mechanisms Currently supported confidential guest mechanisms are: =20 * AMD Secure Encrypted Virtualization (SEV) (see :doc:`i386/amd-memory-enc= ryption`) +* Intel Trust Domain Extension (TDX) (see :doc:`i386/tdx`) * POWER Protected Execution Facility (PEF) (see :ref:`power-papr-protected= -execution-facility-pef`) * s390x Protected Virtualization (PV) (see :doc:`s390x/protvirt`) =20 diff --git a/docs/system/i386/tdx.rst b/docs/system/i386/tdx.rst new file mode 100644 index 000000000000..1872e4f5a8be --- /dev/null +++ b/docs/system/i386/tdx.rst @@ -0,0 +1,113 @@ +Intel Trusted Domain eXtension (TDX) +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Intel Trusted Domain eXtensions (TDX) refers to an Intel technology that e= xtends +Virtual Machine Extensions (VMX) and Multi-Key Total Memory Encryption (MK= TME) +with a new kind of virtual machine guest called a Trust Domain (TD). A TD = runs +in a CPU mode that is designed to protect the confidentiality of its memory +contents and its CPU state from any other software, including the hosting +Virtual Machine Monitor (VMM), unless explicitly shared by the TD itself. + +Prerequisites +------------- + +To run TD, the physical machine needs to have TDX module loaded and initia= lized +while KVM hypervisor has TDX support and has TDX enabled. If those require= ments +are met, the ``KVM_CAP_VM_TYPES`` will report the support of ``KVM_X86_TDX= _VM``. + +Trust Domain Virtual Firmware (TDVF) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Trust Domain Virtual Firmware (TDVF) is required to provide TD services to= boot +TD Guest OS. TDVF needs to be copied to guest private memory and measured = before +a TD boots. + +The VM scope ``MEMORY_ENCRYPT_OP`` ioctl provides command ``KVM_TDX_INIT_M= EM_REGION`` +to copy the TDVF image to TD's private memory space. + +Since TDX doesn't support readonly memslot, TDVF cannot be mapped as pflash +device and it actually works as RAM. "-bios" option is chosen to load TDVF. + +OVMF is the opensource firmware that implements the TDVF support. Thus the +command line to specify and load TDVF is ``-bios OVMF.fd`` + +KVM private gmem +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +TD's memory (RAM) needs to be able to be transformed between private and s= hared. +And its BIOS (OVMF/TDVF) needs to be mapped as private. Thus QEMU needs to +allocate private gmem for them via KVM's IOCTL (KVM_CREATE_GUEST_MEMFD), w= hich +requires KVM is newer enough that reports KVM_CAP_GUEST_MEMFD. + +Feature Control +--------------- + +Unlike non-TDX VM, the CPU features (enumerated by CPU or MSR) of a TD is = not +under full control of VMM. VMM can only configure part of features of a TD= on +``KVM_TDX_INIT_VM`` command of VM scope ``MEMORY_ENCRYPT_OP`` ioctl. + +The configurable features have three types: + +- Attributes: + - PKS (bit 30) controls whether Supervisor Protection Keys is exposed to= TD, + which determines related CPUID bit and CR4 bit; + - PERFMON (bit 63) controls whether PMU is exposed to TD. + +- XSAVE related features (XFAM): + XFAM is a 64b mask, which has the same format as XCR0 or IA32_XSS MSR. It + determines the set of extended features available for use by the guest T= D. + +- CPUID features: + Only some bits of some CPUID leaves are directly configurable by VMM. + +What features can be configured is reported via TDX capabilities. + +TDX capabilities +~~~~~~~~~~~~~~~~ + +The VM scope ``MEMORY_ENCRYPT_OP`` ioctl provides command ``KVM_TDX_CAPABI= LITIES`` +to get the TDX capabilities from KVM. It returns a data structure of +``struct kvm_tdx_capabilites``, which tells the supported configuration of +attributes, XFAM and CPUIDs. + +Launching a TD (TDX VM) +----------------------- + +To launch a TDX guest, below are new added and required: + +.. parsed-literal:: + + |qemu_system_x86| \\ + -object tdx-guest,id=3Dtdx0 \\ + -machine ...,kernel-irqchip=3Dsplit,confidential-guest-support=3Dt= dx0 \\ + -bios OVMF.fd \\ + +Debugging +--------- + +Bit 0 of TD attributes, is DEBUG bit, which decides if the TD runs in off-= TD +debug mode. When in off-TD debug mode, TD's VCPU state and private memory = are +accessible via given SEAMCALLs. This requires KVM to expose APIs to invoke= those +SEAMCALLs and resonponding QEMU change. + +It's targeted as future work. + +restrictions +------------ + + - kernel-irqchip must be split; + + - No readonly support for private memory; + + - No SMM support: SMM support requires manipulating the guset register st= ates + which is not allowed; + +Live Migration +-------------- + +TODO + +References +---------- + +- `TDX Homepage `__ diff --git a/docs/system/target-i386.rst b/docs/system/target-i386.rst index 1b8a1f248abb..4d58cdbc4e06 100644 --- a/docs/system/target-i386.rst +++ b/docs/system/target-i386.rst @@ -29,6 +29,7 @@ Architectural features i386/kvm-pv i386/sgx i386/amd-memory-encryption + i386/tdx =20 OS requirements ~~~~~~~~~~~~~~~ --=20 2.34.1