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bh=Q4eTiLCEOv9w25aK8fnhBq4hC/5pssEztOwbkb9SzsE=; b=ZV2+gIMweHeKxHqxABIKVG3hHL/qUllNZnTPow3jY7rug5OINy0eUcO+SkMlEe/hQGE9Ug Ux45Drc5pdaWD4kbfsuiENbOEYBXA1uSVYhb4QzhR8PDfTE0AJTxg8FOE0JfOvKxkvuavI t+7EY0HWzTn23enFGYwO6G++ABV0zCo= X-MC-Unique: xnut3d3kP0ykENvqyO8VKw-1 From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, imammedo@redhat.com, philmd@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liwei1518@gmail.com, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, shorne@gmail.com, npiggin@gmail.com, clg@kaod.org, ysato@users.sourceforge.jp, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v5 16/31] target/openrisc: Use generic cpu_list() Date: Wed, 15 Nov 2023 09:56:13 +1000 Message-ID: <20231114235628.534334-17-gshan@redhat.com> In-Reply-To: <20231114235628.534334-1-gshan@redhat.com> References: <20231114235628.534334-1-gshan@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Before it's applied: [gshan@gshan q]$ ./build/qemu-or1k -cpu ? Available CPUs: or1200 any After it's applied: [gshan@gshan q]$ ./build/qemu-or1k -cpu ? Available CPUs: any or1200 Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/openrisc/cpu.c | 42 ------------------------------------------ target/openrisc/cpu.h | 3 --- 2 files changed, 45 deletions(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index f7d53c592a..381ebe00d3 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -253,48 +253,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, v= oid *data) cc->tcg_ops =3D &openrisc_tcg_ops; } =20 -/* Sort alphabetically by type name, except for "any". */ -static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) -{ - ObjectClass *class_a =3D (ObjectClass *)a; - ObjectClass *class_b =3D (ObjectClass *)b; - const char *name_a, *name_b; - - name_a =3D object_class_get_name(class_a); - name_b =3D object_class_get_name(class_b); - if (strcmp(name_a, "any-" TYPE_OPENRISC_CPU) =3D=3D 0) { - return 1; - } else if (strcmp(name_b, "any-" TYPE_OPENRISC_CPU) =3D=3D 0) { - return -1; - } else { - return strcmp(name_a, name_b); - } -} - -static void openrisc_cpu_list_entry(gpointer data, gpointer user_data) -{ - ObjectClass *oc =3D data; - const char *typename; - char *name; - - typename =3D object_class_get_name(oc); - name =3D g_strndup(typename, - strlen(typename) - strlen("-" TYPE_OPENRISC_CPU)); - qemu_printf(" %s\n", name); - g_free(name); -} - -void cpu_openrisc_list(void) -{ - GSList *list; - - list =3D object_class_get_list(TYPE_OPENRISC_CPU, false); - list =3D g_slist_sort(list, openrisc_cpu_list_compare); - qemu_printf("Available CPUs:\n"); - g_slist_foreach(list, openrisc_cpu_list_entry, NULL); - g_slist_free(list); -} - #define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \ { \ .parent =3D TYPE_OPENRISC_CPU, \ diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index dedeb89f8e..b454014ddd 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -299,15 +299,12 @@ struct ArchCPU { CPUOpenRISCState env; }; =20 -void cpu_openrisc_list(void); void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg= ); int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); int print_insn_or1k(bfd_vma addr, disassemble_info *info); =20 -#define cpu_list cpu_openrisc_list - #ifndef CONFIG_USER_ONLY hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); =20 --=20 2.41.0