From nobody Wed Nov 27 09:58:58 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1699896849; cv=none; d=zohomail.com; s=zohoarc; b=HvgSPso+aF24GhRXL75OhnTqsVuhcAy3tpJLUpd4xvBcfZrq9diYUmgTrHooK41eeww4V17HHMFRHaJV852ubysRglVN7f5SwRaie+aZI2a/EVB+yYMObvq1uQcycUc5pb2h1lg/hz0fCaLcMVT5CzU0WcFCRriVcactDrrT8lM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1699896849; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=kKwJoYSEfi9kpha72LByVIQJbXETSVDWcN/f8oG001I=; b=nrwzrny8scDDRhTK2ZmBHzTHKQPKnam8AUEaje4pSqhvdHHJGqNYJz3kpldKHA7hN1099ZH2V3/JDW3Pour8XoalSxUUETgoBO2GR4Sa3IC6NaA112BgBDU+QC3H303eYNgzKeGuXgPwkmFPVX8eeoJPO/mOgIkKyKKtbUeJ4ps= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1699896849676521.7851655484784; Mon, 13 Nov 2023 09:34:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r2ao4-0001Y8-NT; Mon, 13 Nov 2023 12:33:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r2ao0-0001Vc-3L for qemu-devel@nongnu.org; Mon, 13 Nov 2023 12:33:01 -0500 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r2ann-0000vq-T4 for qemu-devel@nongnu.org; Mon, 13 Nov 2023 12:32:59 -0500 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1cc9b626a96so33523155ad.2 for ; Mon, 13 Nov 2023 09:32:46 -0800 (PST) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id e6-20020a170902d38600b001c731b62403sm4271910pld.218.2023.11.13.09.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 09:32:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699896766; x=1700501566; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kKwJoYSEfi9kpha72LByVIQJbXETSVDWcN/f8oG001I=; b=DDwEdzTANa0QabMDvB+BiPlkHqJTcTfae5m73K19KxN8/X7R9I8HWMG+qmoxD/jNUP 6sVQk8pg5/NUHWZTI8QeImFWnjAIte/6nT0WjspfGCt0lnGVozlrLOP/ISPYXTeuoDQf fY21YMlGcqqwp11RiIzuCav+4VstjaZMXF0nxDV0SOjPCW/nBBdLnvpQ4pEZDUy3zMWx Whc2OipAupZUdPHh0jgpzXcsjuea11BsPGZaY2h9SrNxet0FXl1elxWia+QQtjvMxPTE qNtlU0mC8y9BUMf2wAOkOy36Sgibs/lGTg/JHXYLxZu35xT191LvGQvA5tF+oqe3iHea y8nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699896766; x=1700501566; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kKwJoYSEfi9kpha72LByVIQJbXETSVDWcN/f8oG001I=; b=d/DM420Tw8l69r8xSrLCZS8qnkZdzlUsp6TYSxZiBk9I0iSgiMBrTvR9AUGLzQWdj7 m4angU/XFV+MUJpYAht7mP9pg/nRTuvcwVUP3tfr2p622oybOtX/CM+92EIhGQTHFHwG EmEGnaS/cTM3jdWYi3hPelwqMvab9P9jQHRtNthkiaVjwVOcBjq01KAFyCjRY1b+NJs6 e9jv77wedJkx2rjimc5+6g0eWGSRSXjvJCzkLWXV0/3Tmn7UciZS2vuIM3x7Zh9ABqez oUJmVZ24FbPLXuOGNA0+cmmVzJpzMKSZqa+9RH0upGltrToJElkF8vRfJWRAeWwR5Gwj qdVg== X-Gm-Message-State: AOJu0YzPtK9Rx1a7cCgQ/O4kkjfrj3xxMwJFxddd9VvffdZBkmZJ6YjL LlnjGUONrgWUNrFlIGEqusnMo+UltucXjX0yl9s= X-Google-Smtp-Source: AGHT+IHnPhlYlr0ptRG7WFG9lKZ0nZoKNaD2ZGUtjO1OdTIRl7l0aPQ+INRafgbw4k637EaX5SYmaA== X-Received: by 2002:a17:903:41c8:b0:1cc:5833:cf5e with SMTP id u8-20020a17090341c800b001cc5833cf5emr281108ple.27.1699896765906; Mon, 13 Nov 2023 09:32:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Helge Deller Subject: [PULL 09/12] hw/pci-host/astro: Fix boot for C3700 machine Date: Mon, 13 Nov 2023 09:32:34 -0800 Message-Id: <20231113173237.48233-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231113173237.48233-1-richard.henderson@linaro.org> References: <20231113173237.48233-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1699896849918100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller Apply the "32-bit PCI addressing on 40-bit Runway" as the default iommu transformation. This allows PCI devices to dma PDC memory. Signed-off-by: Helge Deller Acked-by: Richard Henderson Signed-off-by: Richard Henderson --- hw/pci-host/astro.c | 73 ++++++++++++++++++----------------------- hw/pci-host/meson.build | 2 +- 2 files changed, 33 insertions(+), 42 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index bd226581af..7d68ccee7e 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -32,6 +32,7 @@ #include "hw/pci-host/astro.h" #include "hw/hppa/hppa_hardware.h" #include "migration/vmstate.h" +#include "target/hppa/cpu.h" #include "trace.h" #include "qom/object.h" =20 @@ -268,22 +269,6 @@ static const MemoryRegionOps elroy_config_addr_ops =3D= { }; =20 =20 -/* - * A subroutine of astro_translate_iommu that builds an IOMMUTLBEntry usin= g the - * given translated address and mask. - */ -static bool make_iommu_tlbe(hwaddr addr, hwaddr taddr, hwaddr mask, - IOMMUTLBEntry *ret) -{ - hwaddr tce_mask =3D ~((1ull << 12) - 1); - ret->target_as =3D &address_space_memory; - ret->iova =3D addr & tce_mask; - ret->translated_addr =3D taddr & tce_mask; - ret->addr_mask =3D ~tce_mask; - ret->perm =3D IOMMU_RW; - return true; -} - /* Handle PCI-to-system address translation. */ static IOMMUTLBEntry astro_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, @@ -291,53 +276,59 @@ static IOMMUTLBEntry astro_translate_iommu(IOMMUMemor= yRegion *iommu, int iommu_idx) { AstroState *s =3D container_of(iommu, AstroState, iommu); - IOMMUTLBEntry ret =3D { - .target_as =3D &address_space_memory, - .iova =3D addr, - .translated_addr =3D 0, - .addr_mask =3D ~(hwaddr)0, - .perm =3D IOMMU_NONE, - }; - hwaddr pdir_ptr, index, a, ibase; + hwaddr pdir_ptr, index, ibase; hwaddr addr_mask =3D 0xfff; /* 4k translation */ uint64_t entry; =20 #define IOVP_SHIFT 12 /* equals PAGE_SHIFT */ #define PDIR_INDEX(iovp) ((iovp) >> IOVP_SHIFT) -#define IOVP_MASK PAGE_MASK #define SBA_PDIR_VALID_BIT 0x8000000000000000ULL =20 + addr &=3D ~addr_mask; + + /* + * Default translation: "32-bit PCI Addressing on 40-bit Runway". + * For addresses in the 32-bit memory address range ... and then + * language which not-coincidentally matches the PSW.W=3D0 mapping. + */ + if (addr <=3D UINT32_MAX) { + entry =3D hppa_abs_to_phys_pa2_w0(addr); + } else { + entry =3D addr; + } + /* "range enable" flag cleared? */ if ((s->tlb_ibase & 1) =3D=3D 0) { - make_iommu_tlbe(addr, addr, addr_mask, &ret); - return ret; + goto skip; } =20 - a =3D addr; ibase =3D s->tlb_ibase & ~1ULL; - if ((a & s->tlb_imask) !=3D ibase) { + if ((addr & s->tlb_imask) !=3D ibase) { /* do not translate this one! */ - make_iommu_tlbe(addr, addr, addr_mask, &ret); - return ret; + goto skip; } - index =3D PDIR_INDEX(a); + + index =3D PDIR_INDEX(addr); pdir_ptr =3D s->tlb_pdir_base + index * sizeof(entry); entry =3D ldq_le_phys(&address_space_memory, pdir_ptr); + if (!(entry & SBA_PDIR_VALID_BIT)) { /* I/O PDIR entry valid ? */ - g_assert_not_reached(); - goto failure; + /* failure */ + return (IOMMUTLBEntry) { .perm =3D IOMMU_NONE }; } + entry &=3D ~SBA_PDIR_VALID_BIT; entry >>=3D IOVP_SHIFT; entry <<=3D 12; - entry |=3D addr & 0xfff; - make_iommu_tlbe(addr, entry, addr_mask, &ret); - goto success; =20 - failure: - ret =3D (IOMMUTLBEntry) { .perm =3D IOMMU_NONE }; - success: - return ret; + skip: + return (IOMMUTLBEntry) { + .target_as =3D &address_space_memory, + .iova =3D addr, + .translated_addr =3D entry, + .addr_mask =3D addr_mask, + .perm =3D IOMMU_RW, + }; } =20 static AddressSpace *elroy_pcihost_set_iommu(PCIBus *bus, void *opaque, diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index de7bfb5a62..36d5ab756f 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -29,7 +29,7 @@ pci_ss.add(when: 'CONFIG_MV64361', if_true: files('mv6436= 1.c')) pci_ss.add(when: 'CONFIG_VERSATILE_PCI', if_true: files('versatile.c')) =20 # HPPA devices -pci_ss.add(when: 'CONFIG_ASTRO', if_true: files('astro.c')) +specific_ss.add(when: 'CONFIG_ASTRO', if_true: files('astro.c')) pci_ss.add(when: 'CONFIG_DINO', if_true: files('dino.c')) =20 system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss) --=20 2.34.1