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Thu, 09 Nov 2023 11:28:52 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Gavin Shan , Paolo Bonzini , Mark Cave-Ayland , Peter Maydell , Evgeny Iakovlev , qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH-for-8.2 v4 06/10] hw/char/pl011: Warn when using disabled transmitter Date: Thu, 9 Nov 2023 20:28:10 +0100 Message-ID: <20231109192814.95977-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231109192814.95977-1-philmd@linaro.org> References: <20231109192814.95977-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1699558343387100001 We shouldn't transmit characters when the full UART or its transmitter is disabled. However we don't want to break the possibly incomplete "my first bare metal assembly program"s, so we choose to simply display a warning when this occurs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- hw/char/pl011.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 30309337b1..9c43cb47bf 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -76,6 +76,10 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Cha= rdev *chr) #define LCR_FEN (1 << 4) #define LCR_BRK (1 << 0) =20 +/* Control Register, UARTCR */ +#define CR_TXE (1 << 8) +#define CR_UARTEN (1 << 0) + static const unsigned char pl011_id_arm[8] =3D { 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; static const unsigned char pl011_id_luminary[8] =3D @@ -151,7 +155,12 @@ static inline void pl011_reset_tx_fifo(PL011State *s) =20 static void pl011_write_txdata(PL011State *s, uint8_t data) { - /* ??? Check if transmitter is enabled. */ + if (!(s->cr & CR_UARTEN)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled UAR= T\n"); + } + if (!(s->cr & CR_TXE)) { + qemu_log_mask(LOG_GUEST_ERROR, "PL011 data written to disabled TX = UART\n"); + } =20 /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ --=20 2.41.0