From nobody Wed Nov 27 12:58:35 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1699380690; cv=none; d=zohomail.com; s=zohoarc; b=nVg/J7q6+yERBWEM/BB/8Z3WRQ5q3SnIRLy+xWozjaJMRvLLhVWAPTb+8GciAMNREuCV1RoOZboiPR0DvXEUv/1tfkWh8CFzrgOewEPyGeAEhk7geHndM4mLX7uQOEtR7X3QJJuonKxylzvSWwVLf1aTRW2H1t5CpUdnNQuDaQc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1699380690; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qUg/SG54upIHtQz6IlNDfZW8H+6HjCMvwHk2jyDUo0c=; b=gtyMvgsTEspFn561sUjjd5VFHfq2goMgNqtOY7sUEZTm/frQVm6TtSBWVYfU41+au0pAxJ83tFG9w/PBJga5My26A/q/C7lJFh+0rjL/k/QMs7b2RRKFcNpNGOTSbjEHxusCDiWtmIEWJH0w7btWfUAN/Zn3po+9ePG0OnkgQIk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1699380690714905.6842667579785; Tue, 7 Nov 2023 10:11:30 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r0QXB-0004We-68; Tue, 07 Nov 2023 13:10:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r0QX9-0004Td-MJ for qemu-devel@nongnu.org; Tue, 07 Nov 2023 13:10:39 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1r0QWu-0002ke-Po for qemu-devel@nongnu.org; Tue, 07 Nov 2023 13:10:39 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1cc5b6d6228so40268455ad.2 for ; Tue, 07 Nov 2023 10:10:24 -0800 (PST) Received: from DT.local (c-71-202-158-162.hsd1.ca.comcast.net. [71.202.158.162]) by smtp.gmail.com with ESMTPSA id az10-20020a170902a58a00b001cc615e6850sm131924plb.90.2023.11.07.10.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 10:10:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699380623; x=1699985423; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qUg/SG54upIHtQz6IlNDfZW8H+6HjCMvwHk2jyDUo0c=; b=hnxzGP9wcmKF4umBqfLSLST5qg/rmCbgkz42ONPPKQ7jGlwT4+uKOuZUQglLHscCpy PAUNZb2Xe39zpbKTmw5sX1tuE550rXESsElH4Se1Cnul5Nspm6kknJEIbU62TlyQ9PXg qeNhwqxF0QL9KxIBtGX3Z66C5uR3lRAUId1Bs7E1V3bw0JCMgGBH+UECbef8fDHRwuk4 uTXjGuj3i7A1PnGop/LoDG9Wo7PXD9DLEvKkTYqGR5ci5pVw/EjqJ6mwruhePvh5X9OB 1Ew5UnVNgZ3nIxN5dnjNZvc5Xw9MzaguH/oPuFWuwZTnStYQCHl/ScsobrKPdlTqqeSy N/Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699380623; x=1699985423; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qUg/SG54upIHtQz6IlNDfZW8H+6HjCMvwHk2jyDUo0c=; b=MEC64Sem39NjbILTC+z9UvPY2DXdaNuyEt9MvhKd++urASR9BfRe04b86sBN6U3JWD Y8ZvI9lpwUsFQn5kEhZshjPfssOo7zpO+lt32Q8wUsAjOKHJyzNOJT98mVStUXF+NCfv M7L/d8C6g8vgy0lnZAk7r5DObsRtRknWHGzVngyYWtB8XqbpGqXtqK6d60uMLYRV8U8v R5A0Ph8vB0pOzVm7+tn7ozji/5z97UIvnD/aQmMdqk3GDH5oZUlS9pxk/qwRQJVhQJoe c4W7XmL4veR+0X6K9T+jQAbTcdUPvYBSNif8UnzuTsbMvWXc1lcJpCxcYXVARsY3J4Om k/5Q== X-Gm-Message-State: AOJu0YyVtY0mvJeKAsKkkCP5Ed6kzNk8pQ4JDkkUBLE0MrnZb6/wDeAs ufoJbIU64psdsQBLyj+f3l88f3MQPNI= X-Google-Smtp-Source: AGHT+IHquAmXxcjrVWrbCx9nCMe2dbsGzG8XJwXYiCLO2ckHcrK2QKzgao7HwzetjQuOJ44GGFU3pg== X-Received: by 2002:a17:903:1210:b0:1c9:e4f2:a39d with SMTP id l16-20020a170903121000b001c9e4f2a39dmr34722916plh.49.1699380622885; Tue, 07 Nov 2023 10:10:22 -0800 (PST) From: nifan.cxl@gmail.com To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, ira.weiny@intel.com, dan.j.williams@intel.com, a.manzanares@samsung.com, dave@stgolabs.net, nmtadam.samsung@gmail.com, nifan@outlook.com, jim.harris@samsung.com, Fan Ni Subject: [PATCH v3 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response Date: Tue, 7 Nov 2023 10:07:11 -0800 Message-ID: <20231107180907.553451-8-nifan.cxl@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231107180907.553451-1-nifan.cxl@gmail.com> References: <20231107180907.553451-1-nifan.cxl@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=nifan.cxl@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1699380692176100003 Content-Type: text/plain; charset="utf-8" From: Fan Ni Per CXL spec 3.0, two mailbox commands are implemented: Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.8.9.3, and Release Dynamic Capacity (Opcode 4803h) 8.2.9.8.9.4. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 271 ++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 3 +- include/hw/cxl/cxl_device.h | 5 +- 3 files changed, 277 insertions(+), 2 deletions(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 56f4aa237a..9f788b03b6 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -83,6 +83,8 @@ enum { DCD_CONFIG =3D 0x48, #define GET_DC_CONFIG 0x0 #define GET_DYN_CAP_EXT_LIST 0x1 + #define ADD_DYN_CAP_RSP 0x2 + #define RELEASE_DYN_CAP 0x3 PHYSICAL_SWITCH =3D 0x51, #define IDENTIFY_SWITCH_DEVICE 0x0 #define GET_PHYSICAL_PORT_STATE 0x1 @@ -1356,6 +1358,269 @@ static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(cons= t struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } =20 +/* + * Check whether any bit between addr[nr, nr+size) is set, + * return true if any bit is set, otherwise return false + */ +static bool test_any_bits_set(const unsigned long *addr, int nr, int size) +{ + unsigned long res =3D find_next_bit(addr, size + nr, nr); + + return res < nr + size; +} + +CXLDCDRegion *cxl_find_dc_region(CXLType3Dev *ct3d, uint64_t dpa, uint64_t= len) +{ + CXLDCDRegion *region =3D &ct3d->dc.regions[0]; + int i; + + if (dpa < region->base || + dpa >=3D region->base + ct3d->dc.total_capacity) { + return NULL; + } + + /* + * CXL r3.0 section 9.13.3: Dynamic Capacity Device (DCD) + * + * Regions are used in increasing-DPA order, with Region 0 being used = for + * the lowest DPA of Dynamic Capacity and Region 7 for the highest DPA. + * So check from the last region to find where the dpa belongs. Extent= s that + * cross multiple regions are not allowed. + */ + for (i =3D ct3d->dc.num_regions - 1; i >=3D 0; i--) { + region =3D &ct3d->dc.regions[i]; + if (dpa >=3D region->base) { + /*Should we compare with decode_len or len of the region??*/ + if (dpa + len > region->base + + region->decode_len * CXL_CAPACITY_MULTIPLIER) + return NULL; + return region; + } + } + return NULL; +} + +static void cxl_insert_extent_to_extent_list(CXLDCDExtentList *list, + uint64_t dpa, + uint64_t len, + uint8_t *tag, + uint16_t shared_seq) +{ + CXLDCDExtent *extent; + + extent =3D g_new0(CXLDCDExtent, 1); + extent->start_dpa =3D dpa; + extent->len =3D len; + if (tag) { + memcpy(extent->tag, tag, 0x10); + } else { + memset(extent->tag, 0, 0x10); + } + extent->shared_seq =3D shared_seq; + + QTAILQ_INSERT_TAIL(list, extent, node); +} + +/* + * CXL r3.0 Table 8-129: Add Dynamic Capacity Response Input Payload + * CXL r3.0 Table 8-131: Release Dynamic Capacity Input Payload + */ +typedef struct updated_dc_extent_list_in_pl { + uint32_t num_entries_updated; + uint8_t rsvd[4]; + /* CXL r3.0 Table 8-130: Updated Extent List */ + struct { + uint64_t start_dpa; + uint64_t len; + uint8_t rsvd[8]; + } QEMU_PACKED updated_entries[]; +} QEMU_PACKED updated_dc_extent_list_in_pl; + +/* + * For the extents in the extent list to operate, check whether they are v= alid + * 1. The extent should be in the range of a valid DC region; + * 2. The extent should not cross multiple regions; + * 3. The start DPA and the length of the extent should align with the blo= ck + * size of the region; + * 4. The address range of multiple extents in the list should not overlap. + */ +static CXLRetCode cxl_detect_malformed_extent_list(CXLType3Dev *ct3d, + const updated_dc_extent_list_in_pl *in) +{ + uint64_t min_block_size =3D UINT64_MAX; + CXLDCDRegion *region =3D &ct3d->dc.regions[0]; + CXLDCDRegion *lastregion =3D &ct3d->dc.regions[ct3d->dc.num_regions - = 1]; + g_autofree unsigned long *blk_bitmap =3D NULL; + uint64_t dpa, len; + uint32_t i; + + for (i =3D 0; i < ct3d->dc.num_regions; i++) { + region =3D &ct3d->dc.regions[i]; + min_block_size =3D MIN(min_block_size, region->block_size); + } + + blk_bitmap =3D bitmap_new((lastregion->len + lastregion->base - + ct3d->dc.regions[0].base) / min_block_size); + + for (i =3D 0; i < in->num_entries_updated; i++) { + dpa =3D in->updated_entries[i].start_dpa; + len =3D in->updated_entries[i].len; + + region =3D cxl_find_dc_region(ct3d, dpa, len); + if (!region) { + return CXL_MBOX_INVALID_PA; + } + + dpa -=3D ct3d->dc.regions[0].base; + if (dpa % region->block_size || len % region->block_size) { + return CXL_MBOX_INVALID_EXTENT_LIST; + } + /* the dpa range already covered by some other extents in the list= */ + if (test_any_bits_set(blk_bitmap, dpa / min_block_size, + len / min_block_size)) { + return CXL_MBOX_INVALID_EXTENT_LIST; + } + bitmap_set(blk_bitmap, dpa / min_block_size, len / min_block_size); + } + + return CXL_MBOX_SUCCESS; +} + +/* + * CXL r3.0 section 8.2.9.8.9.3: Add Dynamic Capacity Response (opcode 480= 2h) + * + * Assume an extent is added only after the response is processed successf= ully + * TODO: for better extent list validation, a better solution would be + * maintaining a pending extent list and use it to verify the extent list = in + * the response. + */ +static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + updated_dc_extent_list_in_pl *in =3D (void *)payload_in; + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + CXLDCDExtentList *extent_list =3D &ct3d->dc.extents; + CXLDCDExtent *ent; + uint32_t i; + uint64_t dpa, len; + CXLRetCode ret; + + if (in->num_entries_updated =3D=3D 0) { + return CXL_MBOX_SUCCESS; + } + + ret =3D cxl_detect_malformed_extent_list(ct3d, in); + if (ret !=3D CXL_MBOX_SUCCESS) { + return ret; + } + + for (i =3D 0; i < in->num_entries_updated; i++) { + dpa =3D in->updated_entries[i].start_dpa; + len =3D in->updated_entries[i].len; + + /* + * Check if the DPA range of the to-be-added extent overlaps with + * existing extent list maintained by the device. + */ + QTAILQ_FOREACH(ent, extent_list, node) { + if (ent->start_dpa <=3D dpa && + dpa + len <=3D ent->start_dpa + ent->len) { + return CXL_MBOX_INVALID_PA; + /* Overlapping one end of the other */ + } else if ((dpa < ent->start_dpa + ent->len && + dpa + len > ent->start_dpa + ent->len) || + (dpa < ent->start_dpa && dpa + len > ent->start_dpa= )) { + return CXL_MBOX_INVALID_PA; + } + } + + /* + * TODO: add a pending extent list based on event log record and + * verify the input response + */ + + cxl_insert_extent_to_extent_list(extent_list, dpa, len, NULL, 0); + ct3d->dc.total_extent_count +=3D 1; + } + + return CXL_MBOX_SUCCESS; +} + +/* + * CXL r3.0 section 8.2.9.8.9.4: Release Dynamic Capacity (opcode 4803h) + */ +static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd, + uint8_t *payload_in, + size_t len_in, + uint8_t *payload_out, + size_t *len_out, + CXLCCI *cci) +{ + updated_dc_extent_list_in_pl *in =3D (void *)payload_in; + CXLType3Dev *ct3d =3D CXL_TYPE3(cci->d); + CXLDCDExtentList *extent_list =3D &ct3d->dc.extents; + CXLDCDExtent *ent; + uint32_t i; + uint64_t dpa, len; + CXLRetCode ret; + + if (in->num_entries_updated =3D=3D 0) { + return CXL_MBOX_INVALID_INPUT; + } + + ret =3D cxl_detect_malformed_extent_list(ct3d, in); + if (ret !=3D CXL_MBOX_SUCCESS) { + return ret; + } + + for (i =3D 0; i < in->num_entries_updated; i++) { + dpa =3D in->updated_entries[i].start_dpa; + len =3D in->updated_entries[i].len; + + QTAILQ_FOREACH(ent, extent_list, node) { + if (ent->start_dpa <=3D dpa && + dpa + len <=3D ent->start_dpa + ent->len) { + /* Remove any partial extents */ + uint64_t len1 =3D dpa - ent->start_dpa; + uint64_t len2 =3D ent->start_dpa + ent->len - dpa - len; + + if (len1) { + cxl_insert_extent_to_extent_list(extent_list, + ent->start_dpa, len1, + NULL, 0); + ct3d->dc.total_extent_count +=3D 1; + } + if (len2) { + cxl_insert_extent_to_extent_list(extent_list, dpa + le= n, + len2, NULL, 0); + ct3d->dc.total_extent_count +=3D 1; + } + break; + /*Currently we reject the attempt to remove a superset*/ + } else if ((dpa < ent->start_dpa + ent->len && + dpa + len > ent->start_dpa + ent->len) || + (dpa < ent->start_dpa && dpa + len > ent->start_dpa= )) { + return CXL_MBOX_INVALID_EXTENT_LIST; + } + } + + if (ent) { + QTAILQ_REMOVE(extent_list, ent, node); + g_free(ent); + ct3d->dc.total_extent_count -=3D 1; + } else { + /* Try to remove a non-existing extent */ + return CXL_MBOX_INVALID_PA; + } + } + + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_DATA_CHANGE (1 << 2) #define IMMEDIATE_POLICY_CHANGE (1 << 3) @@ -1406,6 +1671,12 @@ static const struct cxl_cmd cxl_cmd_set_dcd[256][256= ] =3D { [DCD_CONFIG][GET_DYN_CAP_EXT_LIST] =3D { "DCD_GET_DYNAMIC_CAPACITY_EXTENT_LIST", cmd_dcd_get_dyn_cap_ext_li= st, 8, 0 }, + [DCD_CONFIG][ADD_DYN_CAP_RSP] =3D { + "ADD_DCD_DYNAMIC_CAPACITY_RESPONSE", cmd_dcd_add_dyn_cap_rsp, + ~0, IMMEDIATE_DATA_CHANGE }, + [DCD_CONFIG][RELEASE_DYN_CAP] =3D { + "RELEASE_DCD_DYNAMIC_CAPACITY", cmd_dcd_release_dyn_cap, + ~0, IMMEDIATE_DATA_CHANGE }, }; =20 static const struct cxl_cmd cxl_cmd_set_sw[256][256] =3D { diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index c9d792a725..482329a499 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -789,7 +789,7 @@ static int cxl_create_dc_regions(CXLType3Dev *ct3d) int i; uint64_t region_base =3D 0; uint64_t region_len =3D 2 * GiB; - uint64_t decode_len =3D 8; /* 8*256MB */ + uint64_t decode_len =3D 2 * GiB; uint64_t blk_size =3D 2 * MiB; CXLDCDRegion *region; =20 @@ -803,6 +803,7 @@ static int cxl_create_dc_regions(CXLType3Dev *ct3d) for (i =3D 0; i < ct3d->dc.num_regions; i++) { region =3D &ct3d->dc.regions[i]; region->base =3D region_base; + /* NOTE: Should be divided by 256 * MiB before be returned to host= */ region->decode_len =3D decode_len; region->len =3D region_len; region->block_size =3D blk_size; diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 5738c6f434..b3d35fe000 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -130,7 +130,8 @@ typedef enum { CXL_MBOX_INCORRECT_PASSPHRASE =3D 0x14, CXL_MBOX_UNSUPPORTED_MAILBOX =3D 0x15, CXL_MBOX_INVALID_PAYLOAD_LENGTH =3D 0x16, - CXL_MBOX_MAX =3D 0x17 + CXL_MBOX_INVALID_EXTENT_LIST =3D 0x1E, /* cxl r3.0: Table 8-34*/ + CXL_MBOX_MAX =3D 0x1F } CXLRetCode; =20 typedef struct CXLCCI CXLCCI; @@ -548,4 +549,6 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d); =20 void cxl_set_poison_list_overflowed(CXLType3Dev *ct3d); =20 +CXLDCDRegion *cxl_find_dc_region(CXLType3Dev *ct3d, uint64_t dpa, uint64_t= len); + #endif --=20 2.42.0