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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::134; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x134.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1699215246780100001 Content-Type: text/plain; charset="utf-8" Tested-by: Mark Cave-Ayland Acked-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 2 - target/sparc/cc_helper.c | 190 +-------------------------------------- target/sparc/helper.c | 36 ++++++-- target/sparc/translate.c | 4 +- 4 files changed, 32 insertions(+), 200 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 9884bd416a..a7999eaab5 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -150,8 +150,6 @@ enum { enum { CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_FLAGS, /* all cc are back in cc_*_[NZCV] registers */ - CC_OP_TADDTV, /* modify all flags except V, CC_DST =3D res, CC_SRC = =3D src1 */ - CC_OP_TSUBTV, /* modify all flags except V, CC_DST =3D res, CC_SRC = =3D src1 */ CC_OP_NB, }; =20 diff --git a/target/sparc/cc_helper.c b/target/sparc/cc_helper.c index 20d451aa65..05f1479aea 100644 --- a/target/sparc/cc_helper.c +++ b/target/sparc/cc_helper.c @@ -21,198 +21,12 @@ #include "cpu.h" #include "exec/helper-proto.h" =20 -static inline uint32_t get_NZ_icc(int32_t dst) -{ - uint32_t ret =3D 0; - - if (dst =3D=3D 0) { - ret =3D PSR_ZERO; - } else if (dst < 0) { - ret =3D PSR_NEG; - } - return ret; -} - -#ifdef TARGET_SPARC64 -static inline uint32_t get_NZ_xcc(target_long dst) -{ - uint32_t ret =3D 0; - - if (!dst) { - ret =3D PSR_ZERO; - } else if (dst < 0) { - ret =3D PSR_NEG; - } - return ret; -} -#endif - -static inline uint32_t get_C_add_icc(uint32_t dst, uint32_t src1) -{ - uint32_t ret =3D 0; - - if (dst < src1) { - ret =3D PSR_CARRY; - } - return ret; -} - -#ifdef TARGET_SPARC64 -static inline uint32_t get_C_add_xcc(target_ulong dst, target_ulong src1) -{ - uint32_t ret =3D 0; - - if (dst < src1) { - ret =3D PSR_CARRY; - } - return ret; -} - -static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1, - target_ulong src2) -{ - uint32_t ret =3D 0; - - if (((src1 ^ src2 ^ -1) & (src1 ^ dst)) & (1ULL << 63)) { - ret =3D PSR_OVF; - } - return ret; -} - -static uint32_t compute_all_add_xcc(CPUSPARCState *env) -{ - uint32_t ret; - - ret =3D get_NZ_xcc(CC_DST); - ret |=3D get_C_add_xcc(CC_DST, CC_SRC); - ret |=3D get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2); - return ret; -} - -static uint32_t compute_C_add_xcc(CPUSPARCState *env) -{ - return get_C_add_xcc(CC_DST, CC_SRC); -} -#endif - -static uint32_t compute_C_add(CPUSPARCState *env) -{ - return get_C_add_icc(CC_DST, CC_SRC); -} - -static uint32_t compute_all_taddtv(CPUSPARCState *env) -{ - uint32_t ret; - - ret =3D get_NZ_icc(CC_DST); - ret |=3D get_C_add_icc(CC_DST, CC_SRC); - return ret; -} - -static inline uint32_t get_C_sub_icc(uint32_t src1, uint32_t src2) -{ - uint32_t ret =3D 0; - - if (src1 < src2) { - ret =3D PSR_CARRY; - } - return ret; -} - -#ifdef TARGET_SPARC64 -static inline uint32_t get_C_sub_xcc(target_ulong src1, target_ulong src2) -{ - uint32_t ret =3D 0; - - if (src1 < src2) { - ret =3D PSR_CARRY; - } - return ret; -} - -static inline uint32_t get_V_sub_xcc(target_ulong dst, target_ulong src1, - target_ulong src2) -{ - uint32_t ret =3D 0; - - if (((src1 ^ src2) & (src1 ^ dst)) & (1ULL << 63)) { - ret =3D PSR_OVF; - } - return ret; -} - -static uint32_t compute_all_sub_xcc(CPUSPARCState *env) -{ - uint32_t ret; - - ret =3D get_NZ_xcc(CC_DST); - ret |=3D get_C_sub_xcc(CC_SRC, CC_SRC2); - ret |=3D get_V_sub_xcc(CC_DST, CC_SRC, CC_SRC2); - return ret; -} - -static uint32_t compute_C_sub_xcc(CPUSPARCState *env) -{ - return get_C_sub_xcc(CC_SRC, CC_SRC2); -} -#endif - -static uint32_t compute_C_sub(CPUSPARCState *env) -{ - return get_C_sub_icc(CC_SRC, CC_SRC2); -} - -static uint32_t compute_all_tsubtv(CPUSPARCState *env) -{ - uint32_t ret; - - ret =3D get_NZ_icc(CC_DST); - ret |=3D get_C_sub_icc(CC_SRC, CC_SRC2); - return ret; -} - -typedef struct CCTable { - uint32_t (*compute_all)(CPUSPARCState *env); /* return all the flags */ - uint32_t (*compute_c)(CPUSPARCState *env); /* return the C flag */ -} CCTable; - -static const CCTable icc_table[CC_OP_NB] =3D { - /* CC_OP_DYNAMIC should never happen */ - [CC_OP_TADDTV] =3D { compute_all_taddtv, compute_C_add }, - [CC_OP_TSUBTV] =3D { compute_all_tsubtv, compute_C_sub }, -}; - -#ifdef TARGET_SPARC64 -static const CCTable xcc_table[CC_OP_NB] =3D { - /* CC_OP_DYNAMIC should never happen */ - [CC_OP_TADDTV] =3D { compute_all_add_xcc, compute_C_add_xcc }, - [CC_OP_TSUBTV] =3D { compute_all_sub_xcc, compute_C_sub_xcc }, -}; -#endif - void helper_compute_psr(CPUSPARCState *env) { if (CC_OP =3D=3D CC_OP_FLAGS) { return; } - - uint32_t icc =3D icc_table[CC_OP].compute_all(env); -#ifdef TARGET_SPARC64 - uint32_t xcc =3D xcc_table[CC_OP].compute_all(env); - - env->cc_N =3D deposit64(-(icc & PSR_NEG), 32, 32, -(xcc & PSR_NEG)); - env->cc_V =3D deposit64(-(icc & PSR_OVF), 32, 32, -(xcc & PSR_OVF)); - env->icc_C =3D (uint64_t)icc << (32 - PSR_CARRY_SHIFT); - env->xcc_C =3D (xcc >> PSR_CARRY_SHIFT) & 1; - env->xcc_Z =3D ~xcc & PSR_ZERO; -#else - env->cc_N =3D -(icc & PSR_NEG); - env->cc_V =3D -(icc & PSR_OVF); - env->icc_C =3D (icc >> PSR_CARRY_SHIFT) & 1; -#endif - env->icc_Z =3D ~icc & PSR_ZERO; - - CC_OP =3D CC_OP_FLAGS; + g_assert_not_reached(); } =20 uint32_t helper_compute_C_icc(CPUSPARCState *env) @@ -224,5 +38,5 @@ uint32_t helper_compute_C_icc(CPUSPARCState *env) return env->icc_C; #endif } - return icc_table[CC_OP].compute_c(env) >> PSR_CARRY_SHIFT; + g_assert_not_reached(); } diff --git a/target/sparc/helper.c b/target/sparc/helper.c index 53eec693dd..6117e99b55 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -156,7 +156,7 @@ uint64_t helper_udivx(CPUSPARCState *env, uint64_t a, u= int64_t b) target_ulong helper_taddcctv(CPUSPARCState *env, target_ulong src1, target_ulong src2) { - target_ulong dst; + target_ulong dst, v; =20 /* Tag overflow occurs if either input has bits 0 or 1 set. */ if ((src1 | src2) & 3) { @@ -166,13 +166,23 @@ target_ulong helper_taddcctv(CPUSPARCState *env, targ= et_ulong src1, dst =3D src1 + src2; =20 /* Tag overflow occurs if the addition overflows. */ - if (~(src1 ^ src2) & (src1 ^ dst) & (1u << 31)) { + v =3D ~(src1 ^ src2) & (src1 ^ dst); + if (v & (1u << 31)) { goto tag_overflow; } =20 /* Only modify the CC after any exceptions have been generated. */ - env->cc_src =3D src1; - env->cc_src2 =3D src2; + env->cc_V =3D v; + env->cc_N =3D dst; + env->icc_Z =3D dst; +#ifdef TARGET_SPARC64 + env->xcc_Z =3D dst; + env->icc_C =3D dst ^ src1 ^ src2; + env->xcc_C =3D dst < src1; +#else + env->icc_C =3D dst < src1; +#endif + return dst; =20 tag_overflow: @@ -182,7 +192,7 @@ target_ulong helper_taddcctv(CPUSPARCState *env, target= _ulong src1, target_ulong helper_tsubcctv(CPUSPARCState *env, target_ulong src1, target_ulong src2) { - target_ulong dst; + target_ulong dst, v; =20 /* Tag overflow occurs if either input has bits 0 or 1 set. */ if ((src1 | src2) & 3) { @@ -192,13 +202,23 @@ target_ulong helper_tsubcctv(CPUSPARCState *env, targ= et_ulong src1, dst =3D src1 - src2; =20 /* Tag overflow occurs if the subtraction overflows. */ - if ((src1 ^ src2) & (src1 ^ dst) & (1u << 31)) { + v =3D (src1 ^ src2) & (src1 ^ dst); + if (v & (1u << 31)) { goto tag_overflow; } =20 /* Only modify the CC after any exceptions have been generated. */ - env->cc_src =3D src1; - env->cc_src2 =3D src2; + env->cc_V =3D v; + env->cc_N =3D dst; + env->icc_Z =3D dst; +#ifdef TARGET_SPARC64 + env->xcc_Z =3D dst; + env->icc_C =3D dst ^ src1 ^ src2; + env->xcc_C =3D src1 < src2; +#else + env->icc_C =3D src1 < src2; +#endif + return dst; =20 tag_overflow: diff --git a/target/sparc/translate.c b/target/sparc/translate.c index d119ce4c94..7703166ebd 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -3598,8 +3598,8 @@ TRANS(SUB, ALL, do_arith, a, CC_OP_FLAGS, =20 TRANS(TADDcc, ALL, do_arith, a, CC_OP_FLAGS, NULL, NULL, gen_op_taddcc) TRANS(TSUBcc, ALL, do_arith, a, CC_OP_FLAGS, NULL, NULL, gen_op_tsubcc) -TRANS(TADDccTV, ALL, do_arith, a, CC_OP_TADDTV, NULL, NULL, gen_op_taddcct= v) -TRANS(TSUBccTV, ALL, do_arith, a, CC_OP_TSUBTV, NULL, NULL, gen_op_tsubcct= v) +TRANS(TADDccTV, ALL, do_arith, a, CC_OP_FLAGS, NULL, NULL, gen_op_taddcctv) +TRANS(TSUBccTV, ALL, do_arith, a, CC_OP_FLAGS, NULL, NULL, gen_op_tsubcctv) =20 TRANS(AND, ALL, do_logic, a, tcg_gen_and_tl, tcg_gen_andi_tl) TRANS(XOR, ALL, do_logic, a, tcg_gen_xor_tl, tcg_gen_xori_tl) --=20 2.34.1