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([179.193.10.161]) by smtp.gmail.com with ESMTPSA id ce10-20020a05690c098a00b0059b24bd4f2asm259523ywb.57.2023.11.02.15.44.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 15:44:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698965095; x=1699569895; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UgRWfBwtayel4L85jalnEfEZ38BIg1pZr2LRgGnFOd0=; b=Ts1DmK96R9/fzEkvcNe4FCWRh2qelFGJpelB5PZTkEKKynOCojUR64jr6iF6HUTTeI 3E1BFE+Iv2y8YfKBNRX6LJizLvB6wDlvPyeLqmGmok/kSUL4y7nEONPIq2U2hfpOscaR Bm3fQZ4UoVIyQQ9Nt/NIYZLSbb9N4Fc5b19nyLtlGox2y9vPpDlhx+RXRVnQ37gMXaWB 2ZSjHpsDgNf/m/Vv381v1NKv57T/BHYT8wlZlKSYbHVbmtk59leAOX3QjCt1GGZJvaO9 +Dng5FoP3OYB5N3K18saLBfiz521uwxgKVlmJJWwiBDWmUUJjZW/mr9S51/Mq5ZTGVt3 m/Mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698965095; x=1699569895; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UgRWfBwtayel4L85jalnEfEZ38BIg1pZr2LRgGnFOd0=; b=qwRm9x7muTXbcgUQ6QKDwuUAPyP9hA+Kp4iTSs/YwCX37MiBUjXEg2hM2lfAVzkAgd nwWsxRoxQj/kI5qtrt//q/W8fOuGCTHc6kjyfwUTB8+Ax6O05jKYjb+QPlV5vMczj1pF 7SFlSf7+iYohMgN+HxR9l1ScuOj4vBpQmDFDB11ElT9IkWFhsQ5UizGVsl9z+gzaWwpb lsX7qLTrQaU3pNyaK29ZBHET5Wvai0U+mqVt5TAC1aVY/qMRW0st1v5yVuNYn7UAP/ZQ KY3ab0lOB53zbBlNY8B4RQXFCbWeBm3m/gV42zYG5ZRug0eVcG66AAHhCGpwA+34Wsm6 C8xA== X-Gm-Message-State: AOJu0YwXG5zcb1R9XY1ntw2uJGHLkMUiT8Aw2NQrdZPoXP28HxRcpVus s8GCzvffjHmW/8/6aNnh+/NTJV89yb43aHRbdKI= X-Google-Smtp-Source: AGHT+IFX6GxYJH9QBvazUTjmFHogeDaJDBUREZ5C/s32SbnTMThsVN9BsZyV7X0YMRhntG8ZEL3eww== X-Received: by 2002:a05:690c:86:b0:5a7:ba53:6544 with SMTP id be6-20020a05690c008600b005a7ba536544mr1314006ywb.12.1698965095301; Thu, 02 Nov 2023 15:44:55 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v9 02/19] target/riscv/tcg: do not use "!generic" CPU checks Date: Thu, 2 Nov 2023 19:44:28 -0300 Message-ID: <20231102224445.527355-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231102224445.527355-1-dbarboza@ventanamicro.com> References: <20231102224445.527355-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::112d; envelope-from=dbarboza@ventanamicro.com; helo=mail-yw1-x112d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698965150500100011 Content-Type: text/plain; charset="utf-8" Our current logic in get/setters of MISA and multi-letter extensions works because we have only 2 CPU types, generic and vendor, and by using "!generic" we're implying that we're talking about vendor CPUs. When adding a third CPU type this logic will break so let's handle it beforehand. In set_misa_ext_cfg() and set_multi_ext_cfg(), check for "vendor" cpu inste= ad of "not generic". The "generic CPU" checks remaining are from riscv_cpu_add_misa_properties() and cpu_add_multi_ext_prop() before applying default values for the extensions. This leaves us with: - vendor CPUs will not allow extension enablement, all other CPUs will; - generic CPUs will inherit default values for extensions, all others won't. And now we can add a new, third CPU type, that will allow extensions to be enabled and will not inherit defaults, without changing the existing logic. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Reviewed-by: Alistair Francis --- target/riscv/tcg/tcg-cpu.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 1a3351b142..08f8dded56 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -654,6 +654,11 @@ static bool riscv_cpu_is_generic(Object *cpu_obj) return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) !=3D NULL; } =20 +static bool riscv_cpu_is_vendor(Object *cpu_obj) +{ + return object_dynamic_cast(cpu_obj, TYPE_RISCV_VENDOR_CPU) !=3D NULL; +} + /* * We'll get here via the following path: * @@ -716,7 +721,7 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *= v, const char *name, target_ulong misa_bit =3D misa_ext_cfg->misa_bit; RISCVCPU *cpu =3D RISCV_CPU(obj); CPURISCVState *env =3D &cpu->env; - bool generic_cpu =3D riscv_cpu_is_generic(obj); + bool vendor_cpu =3D riscv_cpu_is_vendor(obj); bool prev_val, value; =20 if (!visit_type_bool(v, name, &value, errp)) { @@ -730,7 +735,7 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *= v, const char *name, } =20 if (value) { - if (!generic_cpu) { + if (vendor_cpu) { g_autofree char *cpuname =3D riscv_cpu_get_name(cpu); error_setg(errp, "'%s' CPU does not allow enabling extensions", cpuname); @@ -835,7 +840,7 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor = *v, const char *name, { const RISCVCPUMultiExtConfig *multi_ext_cfg =3D opaque; RISCVCPU *cpu =3D RISCV_CPU(obj); - bool generic_cpu =3D riscv_cpu_is_generic(obj); + bool vendor_cpu =3D riscv_cpu_is_vendor(obj); bool prev_val, value; =20 if (!visit_type_bool(v, name, &value, errp)) { @@ -859,7 +864,7 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor = *v, const char *name, return; } =20 - if (value && !generic_cpu) { + if (value && vendor_cpu) { g_autofree char *cpuname =3D riscv_cpu_get_name(cpu); error_setg(errp, "'%s' CPU does not allow enabling extensions", cpuname); --=20 2.41.0