From nobody Wed Nov 27 14:32:42 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698965274; cv=none; d=zohomail.com; s=zohoarc; b=R7q53gHt/X3mK3u7B/yAzojP+PW7oDRFP8+Uy6XIKTlOOr5GD2+og+nYaJ1s9p0BufNjmjpFDkVCNR/1axNvgQEw2QNf8WklPVc6Juxn7DTHO0XdHfX6V0Bs1skxFz9oCRfgCG7VszKBwLokoJ3yFFEJm08tnevk2xy1nXEnEVQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698965274; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Ro0icYK71fZ1kwLHRmv02PhLlgsNL/aRf529X0R4GIg=; b=dgmEY/Iv3CqShdgxkP+EkZsqH1NqNFHcVYwERO7uZS8I6KZlu3RP5KoFAv1tR3eXMV5siglMW3phE0RGbroZ1QMoZlm1/NrfZW6xpokt/TbF3tzVW42oAODX5u4DOGfbkup7hKCWYURhuaLUPXiF1sThwJccgVC9Ejo0BTvCsCo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698965274696824.1902144799005; Thu, 2 Nov 2023 15:47:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qygRh-00079W-Ur; Thu, 02 Nov 2023 18:45:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qygRY-0006jn-El for qemu-devel@nongnu.org; Thu, 02 Nov 2023 18:45:41 -0400 Received: from mail-yw1-x1133.google.com ([2607:f8b0:4864:20::1133]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qygRW-0003Un-Ot for qemu-devel@nongnu.org; Thu, 02 Nov 2023 18:45:40 -0400 Received: by mail-yw1-x1133.google.com with SMTP id 00721157ae682-5a81ab75f21so18042957b3.2 for ; Thu, 02 Nov 2023 15:45:38 -0700 (PDT) Received: from grind.. ([179.193.10.161]) by smtp.gmail.com with ESMTPSA id ce10-20020a05690c098a00b0059b24bd4f2asm259523ywb.57.2023.11.02.15.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 15:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698965137; x=1699569937; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ro0icYK71fZ1kwLHRmv02PhLlgsNL/aRf529X0R4GIg=; b=RFfSo5XewD9j+exh5J+z9kdHKGo/Z7Kz+6Yip5cgLk4YGSgWLOYnDaTD+fZrYYNYQ6 gmSRUxxupaMd6IL0k42/yY94ro+sbriMLgo3w4UuyyZ2Ni6yOLYJ2d32JT9gRnSIx30g 7Qizi178ApaIEPdV0yE4LlfqFgawPoI3tNAF9qIbJQB+fBgTQHO+qCkdv2ywdLoDXiH6 a0d9bzrabJFdIQrya5YA8O46bx3f+zulNo+XHRDNci1A2qzXPLViyVpDJZNKA225vjen SPqFeLQfweL8mJe7yvHDUbfa7SD1gnUn3yq5jpdyXUhiRGw+thW51soL3vojFKXo/Ilj DAZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698965137; x=1699569937; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ro0icYK71fZ1kwLHRmv02PhLlgsNL/aRf529X0R4GIg=; b=TlaNENuJTk7hXLbAWtYokcWstBuJi6mW9UDUebblOGvfH7nDnFbvqhBJw8qKW9sVwQ I354g0KHP7m0yQPV3/9XrowsiKrOhkeBoq/j29ZRF9gp0tzZq+swwesEW9uU5lrraguO rgPQBlPKhyFY+UdFjimg9PRm8kg61HHsextFRdVdBD9OXaD+w0jqXpXth1Wr+Wpb2F4F mCTeszky/m8hYj9Kq5PC3IRA7T3UJh1Gh9AzlIjFwT/s3ddvJjFCUMP5lMfm3vSn/9Fw znV0lRfKeYZODM7xoiD9FhrZeUc0tc0KCTYia8NR+WpNWFTQ3SkBqlXYxQaRKnB5AgFj mFng== X-Gm-Message-State: AOJu0YyIBeMtyvLnY0OGb64ktJozrwNDsIjiQwv1TV2PkSwEMcQf1QNy jbO13JgTpqHmdYYt4pWtj2ZzHk7Vr/mRJfRIQJI= X-Google-Smtp-Source: AGHT+IGBb79oQLCegmBP7+X8vEVEwcSK3CgQvFCYIVeRbRnFYV20/hRX6TsKDMF3gt7rn+prbPX7HA== X-Received: by 2002:a81:84c1:0:b0:5a7:c906:14f with SMTP id u184-20020a8184c1000000b005a7c906014fmr1158002ywf.11.1698965136903; Thu, 02 Nov 2023 15:45:36 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v9 18/19] target/riscv: add 'rva22u64' CPU Date: Thu, 2 Nov 2023 19:44:44 -0300 Message-ID: <20231102224445.527355-19-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231102224445.527355-1-dbarboza@ventanamicro.com> References: <20231102224445.527355-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1133; envelope-from=dbarboza@ventanamicro.com; helo=mail-yw1-x1133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698965276812100003 Content-Type: text/plain; charset="utf-8" This CPU was suggested by Alistair [1] and others during the profile design discussions. It consists of the bare 'rv64i' CPU with rva22u64 enabled by default, like an alias of '-cpu rv64i,rva22u64=3Dtrue'. Users now have an even easier way of consuming this user-mode profile by doing '-cpu rva22u64'. Extensions can be enabled/disabled at will on top of it. We can boot Linux with this "user-mode" CPU by doing: -cpu rva22u64,sv39=3Dtrue,s=3Dtrue,zifencei=3Dtrue [1] https://lore.kernel.org/qemu-riscv/CAKmqyKP7xzZ9Sx=3D-Lbx2Ob0qCfB7Z+JO9= 44FQ2TQ+49mqo0q_Q@mail.gmail.com/ Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 10 ++++++++++ target/riscv/tcg/tcg-cpu.c | 9 +++++++++ 3 files changed, 20 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index ea9a752280..ac38ffc6cf 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -37,6 +37,7 @@ #define TYPE_RISCV_CPU_BASE64 RISCV_CPU_TYPE_NAME("rv64") #define TYPE_RISCV_CPU_BASE128 RISCV_CPU_TYPE_NAME("x-rv128") #define TYPE_RISCV_CPU_RV64I RISCV_CPU_TYPE_NAME("rv64i") +#define TYPE_RISCV_CPU_RVA22U64 RISCV_CPU_TYPE_NAME("rva22u64") #define TYPE_RISCV_CPU_IBEX RISCV_CPU_TYPE_NAME("lowrisc-ibex") #define TYPE_RISCV_CPU_SHAKTI_C RISCV_CPU_TYPE_NAME("shakti-c") #define TYPE_RISCV_CPU_SIFIVE_E31 RISCV_CPU_TYPE_NAME("sifive-e31") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d24ffbf3f8..1f2932031a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1542,6 +1542,15 @@ static Property riscv_cpu_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +#if defined(TARGET_RISCV64) +static void rva22u64_bare_cpu_init(Object *obj) +{ + rv64i_bare_cpu_init(obj); + + RVA22U64.enabled =3D true; +} +#endif + static const gchar *riscv_gdb_arch_name(CPUState *cs) { RISCVCPU *cpu =3D RISCV_CPU(cs); @@ -1876,6 +1885,7 @@ static const TypeInfo riscv_cpu_type_infos[] =3D { DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_VEYRON_V1, rv64_veyron_v1_cpu_init), DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE128, rv128_base_cpu_init), DEFINE_BARE_CPU(TYPE_RISCV_CPU_RV64I, rv64i_bare_cpu_init), + DEFINE_BARE_CPU(TYPE_RISCV_CPU_RVA22U64, rva22u64_bare_cpu_init), #endif }; =20 diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index ef43264cb3..553fb337e7 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -1068,6 +1068,15 @@ static void riscv_cpu_add_profiles(Object *cpu_obj) object_property_add(cpu_obj, profile->name, "bool", cpu_get_profile, cpu_set_profile, NULL, (void *)profile); + + /* + * CPUs might enable a profile right from the start. + * Enable its mandatory extensions right away in this + * case. + */ + if (profile->enabled) { + object_property_set_bool(cpu_obj, profile->name, true, NULL); + } } } =20 --=20 2.41.0