From nobody Wed Nov 27 15:47:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169880818175374.59513890262758; Tue, 31 Oct 2023 20:09:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qy1at-0003xT-2B; Tue, 31 Oct 2023 23:08:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qy1aq-0003vk-46 for qemu-devel@nongnu.org; Tue, 31 Oct 2023 23:08:32 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qy1am-0005qn-Te for qemu-devel@nongnu.org; Tue, 31 Oct 2023 23:08:31 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxxPAowUFl0SM2AA--.41624S3; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1698808183086100002 Content-Type: text/plain; charset="utf-8" Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- linux-user/loongarch64/signal.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/linux-user/loongarch64/signal.c b/linux-user/loongarch64/signa= l.c index cc8324b4b3..9336f40ffe 100644 --- a/linux-user/loongarch64/signal.c +++ b/linux-user/loongarch64/signal.c @@ -18,10 +18,10 @@ #define SC_USED_FP (1 << 0) =20 struct target_sigcontext { - uint64_t sc_pc; - uint64_t sc_regs[32]; - uint32_t sc_flags; - uint64_t sc_extcontext[0] QEMU_ALIGNED(16); + abi_ulong sc_pc; + abi_ulong sc_regs[32]; + abi_uint sc_flags; + abi_ulong sc_extcontext[0] QEMU_ALIGNED(16); }; =20 QEMU_BUILD_BUG_ON(sizeof(struct target_sigcontext) !=3D sizeof_sigcontext); @@ -33,9 +33,9 @@ QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, sc_r= egs) #define FPU_CTX_MAGIC 0x46505501 #define FPU_CTX_ALIGN 8 struct target_fpu_context { - uint64_t regs[32]; - uint64_t fcc; - uint32_t fcsr; + abi_ulong regs[32]; + abi_ulong fcc; + abi_uint fcsr; } QEMU_ALIGNED(FPU_CTX_ALIGN); =20 QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, regs) @@ -43,9 +43,9 @@ QEMU_BUILD_BUG_ON(offsetof(struct target_fpu_context, reg= s) =20 #define CONTEXT_INFO_ALIGN 16 struct target_sctx_info { - uint32_t magic; - uint32_t size; - uint64_t padding; + abi_uint magic; + abi_uint size; + abi_ulong padding; } QEMU_ALIGNED(CONTEXT_INFO_ALIGN); =20 QEMU_BUILD_BUG_ON(sizeof(struct target_sctx_info) !=3D sizeof_sctx_info); @@ -162,7 +162,7 @@ static bool parse_extcontext(struct extctx_layout *extc= tx, abi_ptr frame) memset(extctx, 0, sizeof(*extctx)); =20 while (1) { - uint32_t magic, size; + abi_uint magic, size; =20 if (get_user_u32(magic, frame) || get_user_u32(size, frame + 4)) { return false; @@ -206,7 +206,7 @@ static void restore_sigframe(CPULoongArchState *env, if (extctx->fpu.haddr) { struct target_fpu_context *fpu_ctx =3D extctx->fpu.haddr + sizeof(struct target_sctx_info); - uint64_t fcc; + abi_ulong fcc; =20 for (i =3D 0; i < 32; ++i) { __get_user(env->fpr[i].vreg.D(0), &fpu_ctx->regs[i]); --=20 2.25.1