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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id h9-20020a170902f7c900b001b8a3e2c241sm3600096plw.14.2023.10.28.12.45.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Oct 2023 12:45:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698522344; x=1699127144; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bILXU6Tv3/UsJC5IcZK0AlLd3YFdGLp0U4K4tlGQLvs=; b=wsKrDK4VxrHWc/x5L15gEIxQsQ6OUYWH9xdkpcl7YlmEftdoxImKEnQuKC4zet5Dsa oA3hIm0ocgYIsYt54oMPcxiq59t39aRwKHZU7q4WVvyuq/NAJVv+gGQA4kgcH/N5Dh9x UbDNIIvwv3rk8uCeTxSSogxG3cSBmOQtRdqJGGt5/yefQ1ez7shtPl+Ex01zCYnSAZYY 3Twtj4U3SeZhjeVuy3vS+wiR5HfBxZX5tEmNMSf7lpa9OIOPWuJoxmUBdfZcUx/VXngH wjLI7DtM4x2K4vBNLZK8a18ZtsDzbPjos4loEiboD3bLuvA9/N7Da74QzF3jgQJeMJSv 46yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698522344; x=1699127144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bILXU6Tv3/UsJC5IcZK0AlLd3YFdGLp0U4K4tlGQLvs=; b=KoE8TX0HuOR5BNpwTP8HixorryJ4ZUCts8IPT+foY/gdrb7OnVKuFWJWMPJMpn+n0a ag5WcLzmY3Xw9lnaf56bJnDh+uB+/NrQPZq7u8aai4cncjiUB+YW93DdpJ5zD2y7yP2C 5m6OpcvCg1DHVqyfJy4fJ0waQqxjeVm4HDpawj540vAkoa64KR3Q/SuTrwDigkyzme2t 90VcGNg7UrMVMvTDARg6PHFwUptpeo4WCQsbqUXMySV4fqGxOK5domdWKPlaY6GS2fOy +jBoDv/8w6NrM/uG+4W9cHrPtAA/iC2bH5dI6sXo2lSt2OE+6nE6YngB+7Z8cz3LeCQM 0/Hg== X-Gm-Message-State: AOJu0Yyu1eGFiYmV3V6gaIjaFWVx9t5DpHD3kAazkB8EfFDP61PjhtkR 1uHtkF171bAiDj3cgjtEeW5BxPW1ALG4p0tSNm4= X-Google-Smtp-Source: AGHT+IGHNyki1/dZ+aQQuuXINUoht13lh1zGAnN/0t3QnilQ5GNYFlyPPKOdS8lJUH6So2tI9eqDxg== X-Received: by 2002:a05:6e02:2163:b0:357:704a:8699 with SMTP id s3-20020a056e02216300b00357704a8699mr10683602ilv.8.1698522344165; Sat, 28 Oct 2023 12:45:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: philmd@linaro.org, pbonzini@redhat.com Subject: [PATCH v2 22/35] tcg/sparc64: Support TCG_COND_TST{EQ,NE} Date: Sat, 28 Oct 2023 12:45:09 -0700 Message-Id: <20231028194522.245170-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231028194522.245170-1-richard.henderson@linaro.org> References: <20231028194522.245170-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::12b; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698522489633100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tcg/sparc64/tcg-target.c.inc | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 10fb8a1a0d..176c98740b 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -607,9 +607,11 @@ static void tcg_out_div32(TCGContext *s, TCGReg rd, TC= GReg rs1, uns ? ARITH_UDIV : ARITH_SDIV); } =20 -static const uint8_t tcg_cond_to_bcond[] =3D { +static const uint8_t tcg_cond_to_bcond[16] =3D { [TCG_COND_EQ] =3D COND_E, [TCG_COND_NE] =3D COND_NE, + [TCG_COND_TSTEQ] =3D COND_E, + [TCG_COND_TSTNE] =3D COND_NE, [TCG_COND_LT] =3D COND_L, [TCG_COND_GE] =3D COND_GE, [TCG_COND_LE] =3D COND_LE, @@ -649,7 +651,8 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int = flags, TCGLabel *l) static void tcg_out_cmp(TCGContext *s, TCGCond cond, TCGReg c1, int32_t c2, int c2const) { - tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, ARITH_SUBCC); + tcg_out_arithc(s, TCG_REG_G0, c1, c2, c2const, + is_tst_cond(cond) ? ARITH_ANDCC : ARITH_SUBCC); } =20 static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1, @@ -744,6 +747,15 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond= cond, TCGReg ret, cond =3D (cond =3D=3D TCG_COND_EQ ? TCG_COND_GEU : TCG_COND_LTU); break; =20 + case TCG_COND_TSTEQ: + case TCG_COND_TSTNE: + /* Transform to inequality vs zero. */ + tcg_out_arithc(s, TCG_REG_T1, c1, c2, c2const, ARITH_AND); + c1 =3D TCG_REG_G0; + c2 =3D TCG_REG_T1, c2const =3D 0; + cond =3D (cond =3D=3D TCG_COND_TSTEQ ? TCG_COND_GEU : TCG_COND_LTU= ); + break; + case TCG_COND_GTU: case TCG_COND_LEU: /* If we don't need to load a constant into a register, we can --=20 2.34.1