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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698280680238100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index fe141a26f9..5a316f364d 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -669,9 +669,11 @@ enum { CR_SO }; =20 -static const uint32_t tcg_to_bc[] =3D { +static const uint32_t tcg_to_bc[16] =3D { [TCG_COND_EQ] =3D BC | BI(0, CR_EQ) | BO_COND_TRUE, [TCG_COND_NE] =3D BC | BI(0, CR_EQ) | BO_COND_FALSE, + [TCG_COND_TSTEQ] =3D BC | BI(0, CR_EQ) | BO_COND_TRUE, + [TCG_COND_TSTNE] =3D BC | BI(0, CR_EQ) | BO_COND_FALSE, [TCG_COND_LT] =3D BC | BI(0, CR_LT) | BO_COND_TRUE, [TCG_COND_GE] =3D BC | BI(0, CR_LT) | BO_COND_FALSE, [TCG_COND_LE] =3D BC | BI(0, CR_GT) | BO_COND_FALSE, @@ -683,9 +685,11 @@ static const uint32_t tcg_to_bc[] =3D { }; =20 /* The low bit here is set if the RA and RB fields must be inverted. */ -static const uint32_t tcg_to_isel[] =3D { +static const uint32_t tcg_to_isel[16] =3D { [TCG_COND_EQ] =3D ISEL | BC_(0, CR_EQ), [TCG_COND_NE] =3D ISEL | BC_(0, CR_EQ) | 1, + [TCG_COND_TSTEQ] =3D ISEL | BC_(0, CR_EQ), + [TCG_COND_TSTNE] =3D ISEL | BC_(0, CR_EQ) | 1, [TCG_COND_LT] =3D ISEL | BC_(0, CR_LT), [TCG_COND_GE] =3D ISEL | BC_(0, CR_LT) | 1, [TCG_COND_LE] =3D ISEL | BC_(0, CR_GT) | 1, @@ -1699,6 +1703,12 @@ static void tcg_out_cmp(TCGContext *s, int cond, TCG= Arg arg1, TCGArg arg2, imm =3D 0; break; =20 + case TCG_COND_TSTEQ: + case TCG_COND_TSTNE: + tcg_debug_assert(cr =3D=3D 0); + tcg_out_and_rc(s, type, TCG_REG_R0, arg1, arg2, const_arg2, true); + return; + case TCG_COND_LT: case TCG_COND_GE: case TCG_COND_LE: @@ -1909,6 +1919,16 @@ static void tcg_out_setcond(TCGContext *s, TCGType t= ype, TCGCond cond, tcg_out_setcond_ne0(s, type, arg0, arg1, neg); break; =20 + case TCG_COND_TSTEQ: + tcg_out_and_rc(s, type, TCG_REG_R0, arg1, arg2, const_arg2, false); + tcg_out_setcond_eq0(s, type, arg0, TCG_REG_R0, neg); + break; + + case TCG_COND_TSTNE: + tcg_out_and_rc(s, type, TCG_REG_R0, arg1, arg2, const_arg2, false); + tcg_out_setcond_ne0(s, type, arg0, TCG_REG_R0, neg); + break; + case TCG_COND_LE: case TCG_COND_LEU: inv =3D true; @@ -2081,6 +2101,13 @@ static void tcg_out_cmp2(TCGContext *s, const TCGArg= *args, tcg_out32(s, op | BT(0, CR_EQ) | BA(6, CR_EQ) | BB(7, CR_EQ)); break; =20 + case TCG_COND_TSTEQ: + case TCG_COND_TSTNE: + tcg_out_and_rc(s, TCG_TYPE_I32, TCG_REG_R0, al, bl, blconst, false= ); + tcg_out_and_rc(s, TCG_TYPE_I32, TCG_REG_TMP1, ah, bh, bhconst, fal= se); + tcg_out32(s, OR | SAB(TCG_REG_R0, TCG_REG_R0, TCG_REG_TMP1) | 1); + break; + case TCG_COND_LT: case TCG_COND_LE: case TCG_COND_GT: --=20 2.34.1