From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277591; cv=none; d=zohomail.com; s=zohoarc; b=RAgGjcbSMv7gFKLDljSgnIiLWm+7+jGqmqfEmv6HPdJWT0tH7cLof6ztVrShPFAcGtatBc1mj87xxms0HLjJeZquNKd5ofoqYzpqtsW1ciSriy+fxGY1aHBOUw6Jz2AfVVwDJ1T/js6UIg/BodPMTgoe5ZXUJA8nU2jEVJnduSY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277591; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EWrsEP2nCaxvct1xWBDFibPhdaq2BqmUx9lrQ3Glem4=; b=grWyp227WRVbunO9SR8D+NxSAC71h8SHNJTwet/PhfrJsrONaLmsdB6utifF5E75TsxyPIJ6NyIutwlrTpAD22kdFfeIzUD5jf+B4tloSMI7hZ9UK7o1bzUUa1eOzsxvsu4p/iIZsNCkJ4Z6aO/t9Sc8rglNhsUmO76rNTM2z88= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277591713284.48070359520716; Wed, 25 Oct 2023 16:46:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZ6-0000wB-8n; Wed, 25 Oct 2023 19:45:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnYr-0000pa-8M for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:19 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnYp-0002EH-9f for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:16 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1ca82f015e4so2166295ad.1 for ; Wed, 25 Oct 2023 16:45:14 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277513; x=1698882313; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EWrsEP2nCaxvct1xWBDFibPhdaq2BqmUx9lrQ3Glem4=; b=Rm5FSeRIEKkRBTnfhWWDd835E96BzyLALPEyY7poOlLop5V0m957MjJ5uLUOmO1GWI pD3N46g9gYqgC/TvK9L6URxBLNLSX21n6Fdql+K2Vozc7rTnyonOedjGcFoHuOhYx1P9 tGtqrM3MMk7LHgM+x+XxmYlnWH7FNgBrZmmHp6jFNmFYcB02RDbVapRVsRR6IaCLpmim GM10TnB7Q4tMg5ei9Dm39RkUkCLK7h85fk4vfwpfAVctnv0GehDwDf+amHbr30s6zhVm RBGzHk+gvJyadWyD3jQDKetvCa4uNs506WrqYA5ZRgl4aoNE7naAkenOUns3dazDcymB r1vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277513; x=1698882313; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EWrsEP2nCaxvct1xWBDFibPhdaq2BqmUx9lrQ3Glem4=; b=PoPbqGsp22KZ+Mj8aQpKr8X/4qw2Y2FsakTfRbMlbvAW7mavUS0Jid5NJIFEUMM5Xd 7ciy0wCi93ZBg568SZk71UH32s53s8XSuDsCvdtCFKqI+qC5AgxnwI9+rUDJYPWTuME2 9dxTU1AAsK+pfj6Ez4OK5dYOJcNf2zX9WjzPzXvG5HswS5lvpUE3g2NdYgFiIqhmIgzl fnhRd5+boxOuA1efPDJzd0VIY3rB7L7W0shU8Dn2zHEvLeCvfbv1H+VsuX4TOZBw8qv8 dCPodZcuQ/+JFTCdExFjM0uDfGOfQF5jaMSXpouL6z++DeOwF8polx//OFlX25ljusNZ TzUQ== X-Gm-Message-State: AOJu0YwmwIoXC23lFoESsJPNo2Vgw/HiZhwfJKcbgVs2xNEY8VsOk9yh rAvvR2SSJDT7jZ4/gWwSIWFhXxMq3KH+j9VJkIk= X-Google-Smtp-Source: AGHT+IFZHYLBDAmypjTBnAP6ju2MNvVcV5WCSOpzVPcsmGaoAOSNfIQGBJ5Wh+WVmL1/GADUD6TNrg== X-Received: by 2002:a17:903:186:b0:1b6:bced:1dc2 with SMTP id z6-20020a170903018600b001b6bced1dc2mr15776205plg.0.1698277513285; Wed, 25 Oct 2023 16:45:13 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 01/10] target/riscv/tcg: add 'zic64b' support Date: Wed, 25 Oct 2023 20:44:50 -0300 Message-ID: <20231025234459.581697-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277592303100001 Content-Type: text/plain; charset="utf-8" zic64b is defined in the RVA22U64 profile [1] as a named feature for "Cache blocks must be 64 bytes in size, naturally aligned in the address space". It's a fantasy name for 64 bytes cache blocks. RVA22U64 mandates this feature, meaning that applications using it expects 64 bytes cache blocks. In theory we're already compliant to it since we're using 64 bytes cache block sizes by default, but nothing is stopping users from enabling a profile and changing the cache block size at the same time. We'll add zic64b as a 'named feature', not a regular extension, in a sense that we won't write it in riscv,isa. It'll be used solely to track whether the user changed cache sizes and if we should warn about it. zic64b is default to 'true' since we're already using 64 bytes blocks. If any cache block size (cbom_blocksize or cboz_blocksize) is changed to something different than 64, zic64b is set to 'false' and, if zic64b was set to 'true' in the command line, also throw an user warning. Our profile implementation set mandatory extensions as if users enabled them in the command line, so this logic will extend to the future RVA22U64 implementation as well. [1] https://github.com/riscv/riscv-profiles/releases/download/v1.0/profiles= .pdf Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 12 ++++++++++-- target/riscv/cpu.h | 3 +++ target/riscv/cpu_cfg.h | 1 + target/riscv/tcg/tcg-cpu.c | 26 ++++++++++++++++++++++++++ 4 files changed, 40 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f40da4c661..5095f093ba 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1394,6 +1394,12 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_= exts[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +const RISCVCPUMultiExtConfig riscv_cpu_named_features[] =3D { + MULTI_EXT_CFG_BOOL("zic64b", zic64b, true), + + DEFINE_PROP_END_OF_LIST(), +}; + /* Deprecated entries marked for future removal */ const RISCVCPUMultiExtConfig riscv_cpu_deprecated_exts[] =3D { MULTI_EXT_CFG_BOOL("Zifencei", ext_zifencei, true), @@ -1423,8 +1429,10 @@ Property riscv_cpu_options[] =3D { DEFINE_PROP_UINT16("vlen", RISCVCPU, cfg.vlen, 128), DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), =20 - DEFINE_PROP_UINT16("cbom_blocksize", RISCVCPU, cfg.cbom_blocksize, 64), - DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), + DEFINE_PROP_UINT16("cbom_blocksize", RISCVCPU, + cfg.cbom_blocksize, CB_DEF_VALUE), + DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, + cfg.cboz_blocksize, CB_DEF_VALUE), =20 DEFINE_PROP_END_OF_LIST(), }; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 8efc4d83ec..ee9abe61d6 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -64,6 +64,8 @@ extern const uint32_t misa_bits[]; const char *riscv_get_misa_ext_name(uint32_t bit); const char *riscv_get_misa_ext_description(uint32_t bit); =20 +#define CB_DEF_VALUE 64 + #define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) =20 /* Privileged specification version */ @@ -745,6 +747,7 @@ typedef struct RISCVCPUMultiExtConfig { extern const RISCVCPUMultiExtConfig riscv_cpu_extensions[]; extern const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[]; extern const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[]; +extern const RISCVCPUMultiExtConfig riscv_cpu_named_features[]; extern const RISCVCPUMultiExtConfig riscv_cpu_deprecated_exts[]; extern Property riscv_cpu_options[]; =20 diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index 6eef4a51ea..b6693320d3 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -107,6 +107,7 @@ struct RISCVCPUConfig { bool ext_smepmp; bool rvv_ta_all_1s; bool rvv_ma_all_1s; + bool zic64b; =20 uint32_t mvendorid; uint64_t marchid; diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 093bda2e75..ac5f65a757 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -264,6 +264,27 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCV= CPU *cpu) } } =20 +static void riscv_cpu_validate_zic64b(RISCVCPU *cpu) +{ + const char *warn =3D "zic64b set to 'true' but %s is set to %u. " + "zic64b changed to 'false'"; + bool send_warn =3D cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(zic64b)); + + if (cpu->cfg.cbom_blocksize !=3D CB_DEF_VALUE) { + cpu->cfg.zic64b =3D false; + if (send_warn) { + warn_report(warn, "cbom_blocksize", cpu->cfg.cbom_blocksize); + } + } + + if (cpu->cfg.cboz_blocksize !=3D CB_DEF_VALUE) { + cpu->cfg.zic64b =3D false; + if (send_warn) { + warn_report(warn, "cboz_blocksize", cpu->cfg.cboz_blocksize); + } + } +} + /* * Check consistency between chosen extensions while setting * cpu->cfg accordingly. @@ -394,6 +415,10 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 + if (cpu->cfg.zic64b) { + riscv_cpu_validate_zic64b(cpu); + } + if (cpu->cfg.ext_zvfh) { cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvfhmin), true); } @@ -889,6 +914,7 @@ static void riscv_cpu_add_user_properties(Object *obj) riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_extensions); riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_vendor_exts); riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_experimental_exts); + riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_named_features); =20 riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_deprecated_exts); =20 --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277624; cv=none; d=zohomail.com; s=zohoarc; b=eSbnvNaWahKgRjxdwNnFxPvVRLTHQB/PhMH9dhJB29RsLMrrsvGLBXgF5wHuEFTuqvD875ucdbA7HmX2bFN+0YlfCEeJ/88jHaRADz3PMSJ+1e0QkMQL8qQ7e4FSJr5wYbjnYTCVJa6feiDGpE2QXhR8qBa8bZ7ofmVml6hZWZw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277624; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=nfE3EuwF54FcNHaKLTT47crDoYBFUQZU4Scq8wPsh5A=; b=UN4UvWSzcYW6hvjCl5atmidR5P28T83Ysjqw52MUjXqdh7i1WS3yFPDKMxLajVkEKdobeJ6y9Tk5sAzMka4vzLJ332672/uY9XzlBt5Hl+iMm0ZfZL31MfcveKynOt6ZGmncmU3YFnSxcBXVv7TGrT/MVv6aw6/o0ypzmW6W01Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169827762409936.86484126401922; Wed, 25 Oct 2023 16:47:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZF-0000yf-6U; Wed, 25 Oct 2023 19:45:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnYu-0000sk-Fw for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:27 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnYs-0002Eq-16 for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:20 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1c8a1541232so2289225ad.0 for ; Wed, 25 Oct 2023 16:45:17 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277516; x=1698882316; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nfE3EuwF54FcNHaKLTT47crDoYBFUQZU4Scq8wPsh5A=; b=ZZ/gmcnsclPwE9CQJ4gNgWLWJuDABqCN1ONAvc01uhzOSyfapQlSwV0i1kav61dZso r3fSuOQuilG6H+Ct3Vs84y1GI0K+gR+qzdyeEKNBPUuzxkjm/LRSscDEc7KPJ/Do7ESf nPghuDEKZ7gMCc5DyUD32GQxO4aK/AGYF58sFcnkELROm2AM3raVCFDQBg8yJifJUYwN 6mkVYQpnNv9xeonrPFP9k76DeMrm3QR5DT4DuWN3iiJaOp9CahL5RYkurNlgMIco+qFb BaLowKZ+QLhBTrG4S3YmXrh3m2nPGWZwEoAc/8QUPB571glYuWOuArtZ1Oab1s9yKq9w OEUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277516; x=1698882316; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nfE3EuwF54FcNHaKLTT47crDoYBFUQZU4Scq8wPsh5A=; b=W9ZXUC4BBIEUooB6y2J6af5nBYKBVBf0WK5L5Hl1AjEi+AFQ/AaVpwvDmebOzOhh02 2LhR+uJDd0QZuPVJRkyzfW9sa7g1ZyFkE/2C/YZULJ6rMQ7dPd7e5rXBNq86+kWMByqq TrLNaWoqbRJD/b1EYgDsa5/J2fdwi6rqnAFPENRrCo31WUmGrowjiABztDVHloTsbxLg 71BIFlGXkAF/zULAMKgLGff8Paphz1g6CTfmKSEKz6zXqMyeX6WJmcgCK0ROqrem90Fw 9CGWu0xrYtPiDUA2E/YJVnVE8WcfMO23F+h0+FWA6sp3fUPViUswkBaKx3OoyXQSxW3F eHTw== X-Gm-Message-State: AOJu0YzGAJ+Ix5dYiAl/+MQ5OZuJrRU7J1UCEZR/gLAefmeVP3weuOV7 RqRPQrlCuWI+tbCvZ9anH7zxWn7QJf9S+6c4ouE= X-Google-Smtp-Source: AGHT+IFFEsE26YqIZER6gNxsqIkgV7ex6rx1f+68hV7XAonbNXTzCus6AgPdWKwfUIS/OiGWeWJ6+A== X-Received: by 2002:a17:903:887:b0:1ca:57ff:9bfa with SMTP id kt7-20020a170903088700b001ca57ff9bfamr15170399plb.24.1698277516333; Wed, 25 Oct 2023 16:45:16 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 02/10] target/riscv: add rva22u64 profile definition Date: Wed, 25 Oct 2023 20:44:51 -0300 Message-ID: <20231025234459.581697-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277624375100001 Content-Type: text/plain; charset="utf-8" The rva22U64 profile, described in: https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva22-profi= les Contains a set of CPU extensions aimed for 64-bit userspace applications. Enabling this set to be enabled via a single user flag makes it convenient to enable a predictable set of features for the CPU, giving users more predicability when running/testing their workloads. QEMU implements all possible extensions of this profile. The exception is Zicbop (Cache-Block Prefetch Operations) that is not available since QEMU RISC-V does not implement a cache model. For this same reason all the so called 'synthetic extensions' described in the profile that are cache related are ignored (Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa, Zicclsm). An abstraction called RISCVCPUProfile is created to store the profile. 'ext_offsets' contains mandatory extensions that QEMU supports. Same thing with the 'misa_ext' mask. Optional extensions must be enabled manually in the command line if desired. The design here is to use the common target/riscv/cpu.c file to store the profile declaration and export it to the accelerator files. Each accelerator is then responsible to expose it (or not) to users and how to enable the extensions. Next patches will implement the profile for TCG and KVM. Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 31 +++++++++++++++++++++++++++++++ target/riscv/cpu.h | 12 ++++++++++++ 2 files changed, 43 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 5095f093ba..d6ba0dff34 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1437,6 +1437,37 @@ Property riscv_cpu_options[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +/* + * RVA22U64 defines some 'named features' or 'synthetic extensions' + * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa + * and Zicclsm. We do not implement caching in QEMU so we'll consider + * all these named features as always enabled. + * + * There's no riscv,isa update for them (and for zic64b) at this + * moment. + */ +static RISCVCPUProfile RVA22U64 =3D { + .name =3D "rva22u64", + .misa_ext =3D RVI | RVM | RVA | RVF | RVD | RVC, + .ext_offsets =3D { + CPU_CFG_OFFSET(ext_zicsr), CPU_CFG_OFFSET(ext_zihintpause), + CPU_CFG_OFFSET(ext_zba), CPU_CFG_OFFSET(ext_zbb), + CPU_CFG_OFFSET(ext_zbs), CPU_CFG_OFFSET(ext_zfhmin), + CPU_CFG_OFFSET(ext_zkt), CPU_CFG_OFFSET(ext_zicntr), + CPU_CFG_OFFSET(ext_zihpm), CPU_CFG_OFFSET(ext_zicbom), + CPU_CFG_OFFSET(ext_zicboz), + + /* mandatory named features for this profile */ + CPU_CFG_OFFSET(zic64b), + + RISCV_PROFILE_EXT_LIST_END + } +}; + +RISCVCPUProfile *riscv_profiles[] =3D { + &RVA22U64, NULL, +}; + static Property riscv_cpu_properties[] =3D { DEFINE_PROP_BOOL("debug", RISCVCPU, cfg.debug, true), =20 diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index ee9abe61d6..d3d82c5a7a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -68,6 +68,18 @@ const char *riscv_get_misa_ext_description(uint32_t bit); =20 #define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) =20 +typedef struct riscv_cpu_profile { + const char *name; + uint32_t misa_ext; + bool enabled; + bool user_set; + const int32_t ext_offsets[]; +} RISCVCPUProfile; + +#define RISCV_PROFILE_EXT_LIST_END -1 + +extern RISCVCPUProfile *riscv_profiles[]; + /* Privileged specification version */ enum { PRIV_VERSION_1_10_0 =3D 0, --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277636; cv=none; d=zohomail.com; s=zohoarc; b=PUDTGaBGKnKdl3BL+5naGluEXqctvUIyfrY0ArhV3ZlYfRV2403F4ZR3jllvdMlCZm44EiwhaFAZf4DrirwmFYQwZr1B1Dq1cM32VVufmzg0l2fEnHyV2LT7erBxow9FbnSuJQUnkrxvF45akdO9wxIo+2S3gL7DV6VwmLGijXw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277636; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=OHkn0XIn+pavsGrnpXUqDrmtzSQW189F7d4DhyW0RDo=; b=B15+teU54oAl/OiVIgK6fu8VrqjYJ0ld7KR32c2YxIxG//JG/y02rduM11t7dKOtx7bAu4lRJAr3QDtskgSpr/yhhTjVGGJk8nStA26WNzcToOyW9zeToOkxnG+8IyBsf9eVqV6aexs9d3vPxczwFBgZZutPTLtCnq6moLCSZo0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277636136276.51647525344265; Wed, 25 Oct 2023 16:47:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZO-00015W-T3; Wed, 25 Oct 2023 19:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnYw-0000t0-TM for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:27 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnYv-0002Gm-0u for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:22 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1c9d922c039so2010345ad.3 for ; Wed, 25 Oct 2023 16:45:20 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277519; x=1698882319; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OHkn0XIn+pavsGrnpXUqDrmtzSQW189F7d4DhyW0RDo=; b=XuwqaEDXyqwK7Fmdw5Xhhp8NAM6V1ls7WI9zuLfv4WdRmWt6W3tWGs8KKFjrHYDZal UPQ3EqmN8cdz4T3N2qkB1U6H9D+hoBBtwQ4RQj+Qr5SfhgTmyOBwY09QKJO9nlsmeZ7J H8WzjM6RKIs3pYDVhujNBcLghxQHQpw3VGkIPxEZWlyyde+w2m8ITX61IS/QlWrNayx+ BLYgz3tprEQKDzybUboiCsEFH6Vfq+/P5c49DtYCA8qgVFepTYkPxLwj8CA7yIPGLbUX Th6KLZquVD3bXbzPXl3FZGLLv2nxsHNrb9gtvLo18So5Y0J79sXkH8S+1KMRn6UGGwiQ qV4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277519; x=1698882319; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OHkn0XIn+pavsGrnpXUqDrmtzSQW189F7d4DhyW0RDo=; b=nWVkDEuLh5m9XndgI3kugK1n3iMpFESZ/tt2K7wJGhN9dBs9wSpwufmR3F3Lf6AlUZ JKVmQUcAmnOHjlVsXWY5zx2BaULSUtPrvsE+Sqlw+vaGYr55aRb+2PzkZ16YJZ/3MkT/ AUpkVY57RNqMYeRpljdbNssMl8rjmmrlQrLjOqpgLq1mruTn4QkWGazALQ1R5j3fVnyr TQ2z7KrEmmATNnBhjJG81f49qhwhY0Zpp8odaBdGM3g0km8Jgmvg3codDg31jsG8QOvq MJzF4FKC7yWghM6AsdQjPvTtFDBuu68TZjGE8mp3oBIq8JYRcSl8PnwjYw3IdDDxLq8n qL8w== X-Gm-Message-State: AOJu0YyMZ92atUoWaXCdLXSnNBHYgsEG+Wmub4iUo26uAKM9vQDX5+Km vqKFDewt2a6QAHFz3jLBnhAARD6afNZV2fo0YuQ= X-Google-Smtp-Source: AGHT+IEIZ3PsCUI2JvEWXw6nHeHi1U99LBcM/5eMIL5y8LBr5Fxe540xpOwDpw7buxbC8df3IMuZNA== X-Received: by 2002:a17:903:42cb:b0:1c9:bfdc:7efe with SMTP id jy11-20020a17090342cb00b001c9bfdc7efemr13699387plb.68.1698277519259; Wed, 25 Oct 2023 16:45:19 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 03/10] target/riscv/kvm: add 'rva22u64' flag as unavailable Date: Wed, 25 Oct 2023 20:44:52 -0300 Message-ID: <20231025234459.581697-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277636372100001 Content-Type: text/plain; charset="utf-8" KVM does not have the means to support enabling the rva22u64 profile. The main reasons are: - we're missing support for some mandatory rva22u64 extensions in the KVM module; - we can't make promises about enabling a profile since it all depends on host support in the end. We'll revisit this decision in the future if needed. For now mark the 'rva22u64' profile as unavailable when running a KVM CPU: $ qemu-system-riscv64 -machine virt,accel=3Dkvm -cpu rv64,rva22u64=3Dtrue qemu-system-riscv64: can't apply global rv64-riscv-cpu.rva22u64=3Dtrue: 'rva22u64' is not available with KVM Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 6d1c0a7915..2243dfde64 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -393,7 +393,7 @@ static void cpu_set_cfg_unavailable(Object *obj, Visito= r *v, } =20 if (value) { - error_setg(errp, "extension %s is not available with KVM", + error_setg(errp, "'%s' is not available with KVM", propname); } } @@ -474,6 +474,11 @@ static void kvm_riscv_add_cpu_user_properties(Object *= cpu_obj) riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_extensions); riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_vendor_exts); riscv_cpu_add_kvm_unavail_prop_array(cpu_obj, riscv_cpu_experimental_e= xts); + + /* We don't have the needed KVM support for profiles */ + for (i =3D 0; riscv_profiles[i] !=3D NULL; i++) { + riscv_cpu_add_kvm_unavail_prop(cpu_obj, riscv_profiles[i]->name); + } } =20 static int kvm_riscv_get_regs_core(CPUState *cs) --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277662; cv=none; d=zohomail.com; s=zohoarc; b=Ccix88rqsSa0rQx9udLR0Hs9nuPT6zBvrZKOfDDjmKvVcnCsVECfvd5aSwnK/HH1a/9l7TV3f3K8DxOlGPdR5GIJOtYWUGzaTwkGa91ihEor6SmY8RPwNEV3CH6338DFbRotvjSOwPpvoZCeQU14B8N2gnJVXmikxwtVerHQeHA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277662; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=twCg9Hi/Uneisj1rGhDSwdKJP+W0YTw82SGzEBE1Q5o=; b=lc2Dy9jtf0NoVHOq0/g5HwPEdPZe4DUV5pRm3oCcDDgiI7l4NgoHLPFcwcO/JVFPmV2UMttv1Wf6l3VCb0nHjdApP2sQI8OXuK705siOhDK+6uT72zAGuLrmz4utrR1rdzamJ/OUCX6NblgzkGAQquNpI0OsnH/wCKOVcjIYzFU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277662411187.45395094642674; Wed, 25 Oct 2023 16:47:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZL-00010x-RK; Wed, 25 Oct 2023 19:45:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZ1-0000tK-5l for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:28 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnYy-0002HS-Gz for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:26 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1c434c33ec0so2087835ad.3 for ; Wed, 25 Oct 2023 16:45:23 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277522; x=1698882322; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=twCg9Hi/Uneisj1rGhDSwdKJP+W0YTw82SGzEBE1Q5o=; b=JUUt18vljw7MbYno6V7t5JOskzp8FX4qqRot6GVpwnD8xZXE776ZDiTmUY6k62hkAj gk+bSYUJQkjpdgz01RgK8HX///Q26FwVS83SomaczYmBRcLbTTPgBPSabEPRCz39gC+s 32JwFk0MAwdpnZpf5tMTFtkvLG4EJp3f5eQwwY1m4A43rYFaZz+X6DEvL8UL36dv86lA qMt8wMNT12rOd/lNu8jlIA/KOAPI8K59HCfYE3fb0KO9j4err4rpSmUPjnAW9A2SmI2r fpX5t3Cr5zEU5uH9P3814jBeHPEypBc4vaZeNcARB9iszRbaaLxqPS11QxAdQbbM657i qpHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277522; x=1698882322; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=twCg9Hi/Uneisj1rGhDSwdKJP+W0YTw82SGzEBE1Q5o=; b=UHRZAe7cezQiUrQt55X8Jl1dSLcIOtTN8L82q7/+IABKiaaiztadDp996XGiCsaYp9 t3OYkL6YJjLscnBG8CHrTz0tBnmlcqTIHY+5sVZClbnO4zmhYZknyGBXM9ZGzJK+2Rqm JJqAKlf/l9LP3oq/OfHbWj0s+pupsle1VqvXcWBavJ7Hl9nX5SV1K1s24DFasj19RO4q 2/SkLDW2/LTYjkfekvF67Bhe3o4O3Of156DExViNOTRCSQpLhNa1YYtaSBWWlT0JZHw6 RPvRFpPJSElyRPDzDD46oGpRKeqAX8svN+2KvU6QfIRFc3yyBxXqYK3TVsMGceaBc+US x3iA== X-Gm-Message-State: AOJu0YzERAe5Q97KaG9Umi1POYJVk7XkQevWS2I6XjqBy3HtqaLgGP0d Up0IPYowIVkSOfkV3qqEytoaWyWO9R1Yz5/n38g= X-Google-Smtp-Source: AGHT+IHmSOJaglzUed+GRmm2uvWsmRAiyfO7J3GWQloS5FdEdL3sLNPQRWin+x6ul8zyHZJJhmUuUw== X-Received: by 2002:a17:902:ec8e:b0:1ca:82f0:131a with SMTP id x14-20020a170902ec8e00b001ca82f0131amr19116439plg.19.1698277522386; Wed, 25 Oct 2023 16:45:22 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 04/10] target/riscv/tcg: add user flag for profile support Date: Wed, 25 Oct 2023 20:44:53 -0300 Message-ID: <20231025234459.581697-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277664442100003 Content-Type: text/plain; charset="utf-8" The TCG emulation implements all the extensions described in the RVA22U64 profile, both mandatory and optional. The mandatory extensions will be enabled via the profile flag. We'll leave the optional extensions to be enabled by hand. Given that this is the first profile we're implementing in TCG we'll need some ground work first: - all profiles declared in riscv_profiles[] will be exposed to users. TCG is the main accelerator we're considering when adding profile support in QEMU, so for now it's safe to assume that all profiles in riscv_profiles[] will be relevant to TCG; - we'll not support user profile settings for vendor CPUs. The flags will still be exposed but users won't be able to change them. The idea is that vendor CPUs in the future can enable profiles internally in their cpu_init() functions, showing to the external world that the CPU supports a certain profile. But users won't be able to enable/disable it; - Setting a profile to 'true' means 'enable all mandatory extensions of this profile, setting it to 'false' means disabling all its mandatory extensions. Regular left-to-right option order will determine the resulting CPU configuration, i.e. the following QEMU command line: -cpu rv64,zicbom=3Dfalse,zifencei=3Dfalse,rva22u64=3Dtrue Enables all rva22u64 mandatory extensions, including 'zicbom' and 'zifencei', while this other command line: -cpu rv64,rva22u64=3Dtrue,zicbom=3Dfalse,zifencei=3Dfalse Enables all mandatory rva22u64 extensions, and then disable both zicbom and zifencei. For now we'll handle multi-letter extensions only. MISA extensions need additional steps that we'll take care later. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 53 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index ac5f65a757..c1eddf17fd 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -794,6 +794,57 @@ static void riscv_cpu_add_misa_properties(Object *cpu_= obj) } } =20 +static void cpu_set_profile(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPUProfile *profile =3D opaque; + RISCVCPU *cpu =3D RISCV_CPU(obj); + bool value; + int i, ext_offset; + + if (object_dynamic_cast(obj, TYPE_RISCV_DYNAMIC_CPU) =3D=3D NULL) { + error_setg(errp, "Profile %s only available for generic CPUs", + profile->name); + return; + } + + if (!visit_type_bool(v, name, &value, errp)) { + return; + } + + profile->user_set =3D true; + profile->enabled =3D value; + + for (i =3D 0; profile->ext_offsets[i] !=3D RISCV_PROFILE_EXT_LIST_END;= i++) { + ext_offset =3D profile->ext_offsets[i]; + + g_hash_table_insert(multi_ext_user_opts, + GUINT_TO_POINTER(ext_offset), + (gpointer)profile->enabled); + isa_ext_update_enabled(cpu, ext_offset, profile->enabled); + } +} + +static void cpu_get_profile(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPUProfile *profile =3D opaque; + bool value =3D profile->enabled; + + visit_type_bool(v, name, &value, errp); +} + +static void riscv_cpu_add_profiles(Object *cpu_obj) +{ + for (int i =3D 0; riscv_profiles[i] !=3D NULL; i++) { + const RISCVCPUProfile *profile =3D riscv_profiles[i]; + + object_property_add(cpu_obj, profile->name, "bool", + cpu_get_profile, cpu_set_profile, + NULL, (void *)profile); + } +} + static bool cpu_ext_is_deprecated(const char *ext_name) { return isupper(ext_name[0]); @@ -918,6 +969,8 @@ static void riscv_cpu_add_user_properties(Object *obj) =20 riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_deprecated_exts); =20 + riscv_cpu_add_profiles(obj); + for (Property *prop =3D riscv_cpu_options; prop && prop->name; prop++)= { qdev_property_add_static(DEVICE(obj), prop); } --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277591; cv=none; d=zohomail.com; s=zohoarc; b=amVJh9Y3dtm3wK2bPhblRfavUOBSD9AdBaTwNAH9fzM2qWlCAc/74GgvigZ/lnLIgGbEU0Y5ed/g35syg1ZDTD1Z2joaf8cn8M0Qd8N/7pCHDX2oUC0YDXaIX0sVLDuchhRlQRgrcraJfnm+NL1UBAVwQ3RHq6UFrAm4IC+f+O4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277591; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=m+d/NJr7Lp8P9GIwbRNrTXnxAHvwrd1uro0GkYn/6g4=; b=YedxU/LRrCqkx75vGEWYnxUBir1Ek7cKDHaMPJaErRsgI3KwY2+2CBNAdK/i5R8E+BkPiUnbMTGnL8uX9J7ZabsbiC5To3dW90LTMr3DrEQbydA9oOGJ9T60DGKJ3mWCjfQ30RsWebag3uPOzveXjuenicm0GuRAz9uw5nufU5g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277591029404.85364080672855; Wed, 25 Oct 2023 16:46:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZ8-0000x7-6w; Wed, 25 Oct 2023 19:45:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZ4-0000vA-Jj for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:30 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnZ1-0002Hy-8Z for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:28 -0400 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1caa371dcd8so2271145ad.0 for ; Wed, 25 Oct 2023 16:45:26 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277525; x=1698882325; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m+d/NJr7Lp8P9GIwbRNrTXnxAHvwrd1uro0GkYn/6g4=; b=dUMujSypOEHjv7hgV74RM/oWPfVELwrzl7RZ+aMf+dz8xSCiPnwqUIN82WB9uyrI2p GasMkrI7cPpkW4xL3AuPZZFt8WWaynyD1WBXchToTu1yI7pSbZCTDj7CDU1pKMKVafvA AmWbPpGFK/5k4VAcdMksQeXFe65MdgHaXgzGfM729g+HwJMMDSEdChp+nO/4OX5sPrDr UzsaYDWGSkYv8azH3pUjlac7RkXprlAURL5oe68hD1DxGDWKSBHJgBmp8lFMaNfFQQJv TvH/CDHSmPyd7bf4hifXoem3W6UozLkG0z4DiOofx1kNm5z2DT52mBM0JC+iIMUP8yHA EG+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277525; x=1698882325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m+d/NJr7Lp8P9GIwbRNrTXnxAHvwrd1uro0GkYn/6g4=; b=b9/lxw1who2n/z9qjL4mNO3x7CMpHXSs5hxguLGElVtZMYmRi5TCdo5uVmBg484CqQ J0JLo9wKpJ7zaH909CE+YfkaTQ9P7TM/Am7RFjyUPCPq8OGMhmvE4nBOUgsDj6VYQQQW l/oCZJ4MoZoA3dbVhQ8CMNqLKzcjiRKsz6++5WImA4ALtGPNN6IhvU4KQj8ITTvK5upB Wo8ZLuk5P4ZCqK1zsddXByFBQXFQdrpLx+Xf0ugUQ5X4asdiWPxKgTwjUjiY4xME7vvI Hk+rXpajoVywIkPrv/Jo6JoLsvSh9LuDxkDpTYCexhr/Ap0XBas9h0bxTAu/dId03Hfb BC9A== X-Gm-Message-State: AOJu0YzXwTPKC73YIroRbz/yiB8ZOozuZeWJ2a1In85lVhF8ucDee/hh CD06yO9h6MKgvY47LJVWUQjW9CzqVatQSTsW3VM= X-Google-Smtp-Source: AGHT+IGy1XyshTH23q31kruO8Z7gARSwtZgPgIz3WGUHf5N424Il28Dh4Pevs3HOdL9bN6wJn1yFaQ== X-Received: by 2002:a17:903:1383:b0:1ca:4681:eb37 with SMTP id jx3-20020a170903138300b001ca4681eb37mr13120875plb.14.1698277525426; Wed, 25 Oct 2023 16:45:25 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 05/10] target/riscv/tcg: add MISA user options hash Date: Wed, 25 Oct 2023 20:44:54 -0300 Message-ID: <20231025234459.581697-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277592305100002 Content-Type: text/plain; charset="utf-8" We already track user choice for multi-letter extensions because we needed to honor user choice when enabling/disabling extensions during realize(). We refrained from adding the same mechanism for MISA extensions since we didn't need it. Profile support requires tne need to check for user choice for MISA extensions, so let's add the corresponding hash now. It works like the existing multi-letter hash (multi_ext_user_opts) but tracking MISA bits options in the cpu_set_misa_ext_cfg() callback. Note that we can't re-use the same hash from multi-letter extensions because that hash uses cpu->cfg offsets as keys, while for MISA extensions we're using MISA bits as keys. After adding the user hash in cpu_set_misa_ext_cfg(), setting default values with object_property_set_bool() in add_misa_properties() will end up marking the user choice hash with them. Set the default value manually to avoid it. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index c1eddf17fd..9a0d85d6e6 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -34,6 +34,7 @@ =20 /* Hash that stores user set extensions */ static GHashTable *multi_ext_user_opts; +static GHashTable *misa_ext_user_opts; =20 static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset) { @@ -706,6 +707,10 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor = *v, const char *name, return; } =20 + g_hash_table_insert(misa_ext_user_opts, + GUINT_TO_POINTER(misa_bit), + (gpointer)value); + prev_val =3D env->misa_ext & misa_bit; =20 if (value =3D=3D prev_val) { @@ -769,6 +774,7 @@ static const RISCVCPUMisaExtConfig misa_ext_cfgs[] =3D { */ static void riscv_cpu_add_misa_properties(Object *cpu_obj) { + CPURISCVState *env =3D &RISCV_CPU(cpu_obj)->env; bool use_def_vals =3D riscv_cpu_is_generic(cpu_obj); int i; =20 @@ -789,7 +795,13 @@ static void riscv_cpu_add_misa_properties(Object *cpu_= obj) NULL, (void *)misa_cfg); object_property_set_description(cpu_obj, name, desc); if (use_def_vals) { - object_property_set_bool(cpu_obj, name, misa_cfg->enabled, NUL= L); + if (misa_cfg->enabled) { + env->misa_ext |=3D bit; + env->misa_ext_mask |=3D bit; + } else { + env->misa_ext &=3D ~bit; + env->misa_ext_mask &=3D ~bit; + } } } } @@ -1021,6 +1033,7 @@ static void tcg_cpu_instance_init(CPUState *cs) RISCVCPU *cpu =3D RISCV_CPU(cs); Object *obj =3D OBJECT(cpu); =20 + misa_ext_user_opts =3D g_hash_table_new(NULL, g_direct_equal); multi_ext_user_opts =3D g_hash_table_new(NULL, g_direct_equal); riscv_cpu_add_user_properties(obj); =20 --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277668; cv=none; d=zohomail.com; s=zohoarc; b=ZuJVwsB0IuZj0RXWryn1iwbGtg6y19WtY9VBF23qFua30ux0O3bVKIqG8ryi2Rxa0+ADrJL+/8BXqeioklQ1PxiTf66GZdI7NFCLp11Y0sdbH9pxiIOgKuzWEIoMtNDMVWIomKARaV/yclj8/TRFbbkluav66IGezgz8o1mSJYw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277668; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=81c4qw8D2sG0oJuCNbKNZJeJgmw9CLPFrKsbnhzd0Jk=; b=JTQany5EoUHnUK+uyPAb8/kMyNTpf4iGlxFXifTt4Pv1blt9jJ/VzDS9sEgTD1tU9cMLgXJjFmZbB1g73NFOtq3Q8IcvQpwMBEoWFof8AmaQ2yppX9rAImDP8T1HhPbaHXgVHH4u7OxN5cqcA+1Z3QXn6RyHVdkCkYX5dzLxOuI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277668814644.0915053205758; Wed, 25 Oct 2023 16:47:48 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZN-00012x-3J; Wed, 25 Oct 2023 19:45:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZ6-0000wE-3W for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:32 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnZ4-0002Ih-B9 for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:31 -0400 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1bdf4752c3cso1893795ad.2 for ; Wed, 25 Oct 2023 16:45:29 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277528; x=1698882328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=81c4qw8D2sG0oJuCNbKNZJeJgmw9CLPFrKsbnhzd0Jk=; b=ogaZt6QTDmmuAWdD6pGDOrnmiH9hrVMFHg8AFJPJmw4YnMOt6NoqswPUOmR/EL42z2 7qF9HbHsydEzLpVQTOggq3k1U0dT8Oh96pbVVzMzOL/7YkW63mHkT92lRvjt+6pltF0+ 1cEb0VRdgN++4dRESjF5QhE16KDyXZKJeZ0u8J8qjW7fbwI1H73yLxOESk/6iV/qoorj s4j2MAsFbfabi9KGxSvs9yey0sNYtoZTCeBM4u16StXD/OLhRY8glBL9EII/fni+hQ9h tJyVJ42GLgiJupnRmaZJfk1pnWx/0HTtjazkBM6lZPvFu5oRh8PPH/iSuMW2ntiaaWnb RuUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277528; x=1698882328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=81c4qw8D2sG0oJuCNbKNZJeJgmw9CLPFrKsbnhzd0Jk=; b=oTdcIsQzavQdVbNnMgvggmJ3p/yCUeCO+f3ZZzhMXWjT4VbRp6Ivp6nLW8N6FoRYNR NC0HjOtyiNR01IaluLCu3Er/2TfmOGdzejehykdBhAAZlD1l+rj7jAuXPt7dVjoBwXsL l2GO/h8A1hgjxxkVLIFfRAsxFEw86Xd48Hf/LHw40mnN/2f89f35BdJ3i3KNv0mCnx+z XqhD8B500KBYbInwtYBb5mrKp2KgKtCYn/u5ryGa+GmcMIVyyNnAkfAg04sq1bePfN4m CGX6KQe76Jgf6xfuKnDurcOcFkySR37Jot5kpFtrX9VFOJ/4EGm1JAq3Ebm5VHUTQhsQ ZcLA== X-Gm-Message-State: AOJu0Yw9qPNEd50iMLmT6F3clI8cWOyW5XbffSuztslt9AjLNyeYOwg/ ipggead7Vl6LawIA19UCtr4X2iibLsE977GDMJo= X-Google-Smtp-Source: AGHT+IGv7xDuqbe25p/l7zmcdPk0FE3nJ6k5daNUHnKmA3H3rdzzH41uMVokYTavvkWXsQ5AV3AmaA== X-Received: by 2002:a17:902:d502:b0:1c4:4dbc:92bc with SMTP id b2-20020a170902d50200b001c44dbc92bcmr15525977plg.16.1698277528354; Wed, 25 Oct 2023 16:45:28 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 06/10] target/riscv/tcg: add riscv_cpu_write_misa_bit() Date: Wed, 25 Oct 2023 20:44:55 -0300 Message-ID: <20231025234459.581697-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277670472100003 Content-Type: text/plain; charset="utf-8" We have two instances of the setting/clearing a MISA bit from env->misa_ext and env->misa_ext_mask pattern. And the next patch will end up adding one more. Create a helper to avoid code repetition. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 44 ++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 21 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 9a0d85d6e6..5d96ccb45c 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -42,6 +42,20 @@ static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset) GUINT_TO_POINTER(ext_offset)); } =20 +static void riscv_cpu_write_misa_bit(RISCVCPU *cpu, uint32_t bit, + bool enabled) +{ + CPURISCVState *env =3D &cpu->env; + + if (enabled) { + env->misa_ext |=3D bit; + env->misa_ext_mask |=3D bit; + } else { + env->misa_ext &=3D ~bit; + env->misa_ext_mask &=3D ~bit; + } +} + static void riscv_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { @@ -717,20 +731,14 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor= *v, const char *name, return; } =20 - if (value) { - if (!generic_cpu) { - g_autofree char *cpuname =3D riscv_cpu_get_name(cpu); - error_setg(errp, "'%s' CPU does not allow enabling extensions", - cpuname); - return; - } - - env->misa_ext |=3D misa_bit; - env->misa_ext_mask |=3D misa_bit; - } else { - env->misa_ext &=3D ~misa_bit; - env->misa_ext_mask &=3D ~misa_bit; + if (value && !generic_cpu) { + g_autofree char *cpuname =3D riscv_cpu_get_name(cpu); + error_setg(errp, "'%s' CPU does not allow enabling extensions", + cpuname); + return; } + + riscv_cpu_write_misa_bit(cpu, misa_bit, value); } =20 static void cpu_get_misa_ext_cfg(Object *obj, Visitor *v, const char *name, @@ -774,7 +782,6 @@ static const RISCVCPUMisaExtConfig misa_ext_cfgs[] =3D { */ static void riscv_cpu_add_misa_properties(Object *cpu_obj) { - CPURISCVState *env =3D &RISCV_CPU(cpu_obj)->env; bool use_def_vals =3D riscv_cpu_is_generic(cpu_obj); int i; =20 @@ -795,13 +802,8 @@ static void riscv_cpu_add_misa_properties(Object *cpu_= obj) NULL, (void *)misa_cfg); object_property_set_description(cpu_obj, name, desc); if (use_def_vals) { - if (misa_cfg->enabled) { - env->misa_ext |=3D bit; - env->misa_ext_mask |=3D bit; - } else { - env->misa_ext &=3D ~bit; - env->misa_ext_mask &=3D ~bit; - } + riscv_cpu_write_misa_bit(RISCV_CPU(cpu_obj), bit, + misa_cfg->enabled); } } } --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277626; cv=none; d=zohomail.com; s=zohoarc; b=CNHcl5SXa5CPCLY+ibLvhzt7fSZMZ/ibXGG7PnMFVMoZPzY3e+65aekdsCmIeS44rSmUY49j7G88o2yIg+bU8j4HfVTA/dW/1mWQg2rZjHu476SPFS/+/y/KVLphIJLQG5cUm2uXeY83UyPUKKZ58aI/nVtgDnT0SKjBpZAlS+Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277626; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VDgDvO7i84WdHmQ1CVHYuaunKGbn8YvcKITz/IAnR9E=; b=BbL+AF61NByTmoVexBtURvPYL5UD3VCsDkIdaxBSzaloOdSv5V4EsAjUpEDgTCT9izxvc9QmVoAFEWHqmqf1WMk0uxGn2MXKEJoh4KrhScq/FNR/S7/YBbnd4EmWKKtyas1II41TriVFfZ8TJUo/3dOZhdgJ9MejmGJRwy/qyco= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277626305808.7560216257173; Wed, 25 Oct 2023 16:47:06 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZO-00014V-7q; Wed, 25 Oct 2023 19:45:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZA-0000xP-2H for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:36 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnZ6-0002JU-T8 for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:34 -0400 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1c434c33ec0so2088585ad.3 for ; Wed, 25 Oct 2023 16:45:32 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277531; x=1698882331; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VDgDvO7i84WdHmQ1CVHYuaunKGbn8YvcKITz/IAnR9E=; b=Sw3/+hTjhDhB3pCL8QoiPYCIVxyAFPfQS8IBP3DsEEVXaOI11m0b8wisOH6u0fAjzm DYyquvTgA4oyk2kbfTwNiGM25e1ryHyBMLMnaYvgYQy8CPi/6YRDrDrruUR7hPKQIC/y GAjnA2N2KdMs3KPXG1SZm0RRrig8b5QHwY8glQvlG8KySVnaLWH4xPI7Ws689Skekqc8 vM7Mmv2pOzAoaHwsnxZCQ31xz9Rswtjy3jNGaXnCNkC/nNcfkbh0MA8dcZ2RcycOKgvQ rxcBgGxObd3f4ZeQ+Q6HLNnjDu+gV7gMJKU9VbjrHnHm9RWyAcMmqiJOGp/DaU7My3ta gbPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277531; x=1698882331; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VDgDvO7i84WdHmQ1CVHYuaunKGbn8YvcKITz/IAnR9E=; b=W9MXXG/ecIaA+uPCHkjY11AAmjBqVjEDJuO3Xtp0tvxbbLlo2CsKWRg9rFor0YYUNr P8/Ev/byx3ntj9n+gGXPNF+yFXxFAaHX4ThEGUCDuCE1bDyy8qn0SEszoN1WZUm8U8ad 9L0NnwJMkufMxjGUFJGM1EC5AKV1B3RSTiNHRXKGb0RsOzzRqDY2fMiOv+7enJa0wWas xqeiqRM/riCy2TErp8V9Q+VNdI8iitzZcyY6G4tfwkIoaIXDVbapV3A8r14pBqxkw+6+ s/JFXWggembJAFi1XmK4uGG1SrBudSBrPtL+m9y1IOWtYy14AcgA63p1KCZwfWEEUiE3 z2cQ== X-Gm-Message-State: AOJu0YyGBOk+g8Ll+kScUQ6qkM/PgDIYX7DCJNjKUiYVjLpBQh3ZFuIs W9TO764wD5fMa/SE3+92AIYxEFiHDbQRUyySJok= X-Google-Smtp-Source: AGHT+IF9kp0F1/Sin6fhMrS9A9HMXaJeCDXpjBuaDYeDdMDZ3F6EQ0LOttAF/9dwAIKvvbzYh78MMw== X-Received: by 2002:a17:902:f092:b0:1ca:86b:7ed9 with SMTP id p18-20020a170902f09200b001ca086b7ed9mr11311959pla.40.1698277531328; Wed, 25 Oct 2023 16:45:31 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 07/10] target/riscv/tcg: handle profile MISA bits Date: Wed, 25 Oct 2023 20:44:56 -0300 Message-ID: <20231025234459.581697-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277628365100007 Content-Type: text/plain; charset="utf-8" The profile support is handling multi-letter extensions only. Let's add support for MISA bits as well. We'll go through every known MISA bit. If the profile doesn't declare the b= it as mandatory, ignore it. Otherwise, set or clear the bit in env->misa_ext a= nd env->misa_ext_mask depending on whether the profile was set to 'true' or 'false'. Signed-off-by: Daniel Henrique Barboza Reviewed-by: LIU Zhiwei Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 5d96ccb45c..4f4bc58627 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -829,6 +829,19 @@ static void cpu_set_profile(Object *obj, Visitor *v, c= onst char *name, profile->user_set =3D true; profile->enabled =3D value; =20 + for (i =3D 0; misa_bits[i] !=3D 0; i++) { + uint32_t bit =3D misa_bits[i]; + + if (!(profile->misa_ext & bit)) { + continue; + } + + g_hash_table_insert(misa_ext_user_opts, + GUINT_TO_POINTER(bit), + (gpointer)value); + riscv_cpu_write_misa_bit(cpu, bit, profile->enabled); + } + for (i =3D 0; profile->ext_offsets[i] !=3D RISCV_PROFILE_EXT_LIST_END;= i++) { ext_offset =3D profile->ext_offsets[i]; =20 --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277637; cv=none; d=zohomail.com; s=zohoarc; b=mRj0Q5SQBKb2/I1TwqDuQixic2un1Qy0eGUEqpOHn9O3yzpx+CG1nZTixMXfR2tW8dhNghf4JnNoN/4afnCK0jwqqVo6xS/t+4cvG+NN0S9+Smme2ZNEkyEJdpRA5ZOiW+tfyfGCo6Ze+9fqxSIIY2gJLwhtaYdXrPiFAFr5aPw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277637; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3jz6QPtK8VtnFWFXVTNqCUkfRcOHZqUbOgSb1yU0vAY=; b=ceNu30cOB/M7P1s7pNVN13B8M0hr2Vc2jenkut6bQsm1GuUzgu7nxEfko+SH9zC87ZQ5CwcTzw+7MihpIdJzv22wCsPk2TtbVDAfbtbP79FoiVbLOzxN9CwSR9ca/D0qbF3dFwCGmcTAcH5iz9kM+qzOMri1VlHB/J0jmDvUNfQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277637248627.0754150947857; Wed, 25 Oct 2023 16:47:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZM-000110-UD; Wed, 25 Oct 2023 19:45:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZD-0000xl-2c for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:40 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnZB-0002Jw-EP for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:38 -0400 Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-1c9a1762b43so2077945ad.1 for ; Wed, 25 Oct 2023 16:45:36 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277534; x=1698882334; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3jz6QPtK8VtnFWFXVTNqCUkfRcOHZqUbOgSb1yU0vAY=; b=BelH3bdTXh0TJ62lOlppRQfSLqhuNelHN8blRuKmkoQZUeaN3bzkO6+ANu2VPo9cZs hEgwwctQp6CwMzf1iv15i8MMHw/Au8DzDJZlZYyQUGZd7uLFp7CEOS7WUE8l0Aeb9/Fq S73kk2pPp61414C4PsHnWXGTKvYW4cE/JRW223tYBH0NjiGHhLIthUAd6WBJ4/U0rAST HbV2uhRnaLdciyfbDm5x12WBI/TCHK/6A8UX+zJqeYvpPQzKDQtK6KZtx9xF7v1zVQL1 /9TG15I+txLYNWy0yDMsVRlDmxx+RnM/iOvt/gpXKCr7KEYH3aPCLqCrRnahAlNB2yQs gv3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277534; x=1698882334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3jz6QPtK8VtnFWFXVTNqCUkfRcOHZqUbOgSb1yU0vAY=; b=CsfagLvp3qhLZY3ULf+ljP10YDdHVlVfK4uYJAa0RsBqSiMvcwzyix1wkt1BtT2D8H rc7KuO+0oVDxWStqolzpkmonAMpmxJG2QXlXC6pSCli7YvYVys9Z1GwHMF9jQpVp61C4 EesOpSfBX6lmgq640Odaxlr3VWtmcfkWrswz2s8GSqamiyfZM98/uQxdIiMYAwHFqeB3 BJ7Jpxe3RMUHb++GnE5l0+MPMRtTwXBctGJ2fhpDUbFsQ8s+kwgupKxR1QZ85LwDTT1s UMz4Tu9qmY/O+4tfzp4tepjIvSmfIPe3jyIzw1l2x7oa4Vj5qDE1Sz/l+a50sZjTrVnt XIiA== X-Gm-Message-State: AOJu0YxrqqABR+rdBsLjAvLtRbPNjCAeqTQl9PqOI3c0YtJigTUpw7pN Ke9V0KoSCWafb8HLepOM+ZiuDMQ5YxZwAUm/fCo= X-Google-Smtp-Source: AGHT+IHQxgvj8qXQWpfSUUtGMo0gGNF588ZheTm2oxeF79XYehYmmfuS+pugR3fCKWYTrX527C9Q8w== X-Received: by 2002:a17:903:84c:b0:1ca:1be4:bda4 with SMTP id ks12-20020a170903084c00b001ca1be4bda4mr15200297plb.4.1698277534273; Wed, 25 Oct 2023 16:45:34 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 08/10] target/riscv/tcg: add hash table insert helpers Date: Wed, 25 Oct 2023 20:44:57 -0300 Message-ID: <20231025234459.581697-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277638427100005 Content-Type: text/plain; charset="utf-8" Latest patches added several g_hash_table_insert() patterns. Add two helpers, one for each user hash, to make the code cleaner. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 4f4bc58627..423328b1c7 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -42,6 +42,18 @@ static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset) GUINT_TO_POINTER(ext_offset)); } =20 +static void cpu_cfg_ext_add_user_opt(uint32_t ext_offset, bool value) +{ + g_hash_table_insert(multi_ext_user_opts, GUINT_TO_POINTER(ext_offset), + (gpointer)value); +} + +static void cpu_misa_ext_add_user_opt(uint32_t bit, bool value) +{ + g_hash_table_insert(misa_ext_user_opts, GUINT_TO_POINTER(bit), + (gpointer)value); +} + static void riscv_cpu_write_misa_bit(RISCVCPU *cpu, uint32_t bit, bool enabled) { @@ -721,9 +733,7 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *= v, const char *name, return; } =20 - g_hash_table_insert(misa_ext_user_opts, - GUINT_TO_POINTER(misa_bit), - (gpointer)value); + cpu_misa_ext_add_user_opt(misa_bit, value); =20 prev_val =3D env->misa_ext & misa_bit; =20 @@ -836,18 +846,14 @@ static void cpu_set_profile(Object *obj, Visitor *v, = const char *name, continue; } =20 - g_hash_table_insert(misa_ext_user_opts, - GUINT_TO_POINTER(bit), - (gpointer)value); + cpu_misa_ext_add_user_opt(bit, profile->enabled); riscv_cpu_write_misa_bit(cpu, bit, profile->enabled); } =20 for (i =3D 0; profile->ext_offsets[i] !=3D RISCV_PROFILE_EXT_LIST_END;= i++) { ext_offset =3D profile->ext_offsets[i]; =20 - g_hash_table_insert(multi_ext_user_opts, - GUINT_TO_POINTER(ext_offset), - (gpointer)profile->enabled); + cpu_cfg_ext_add_user_opt(ext_offset, profile->enabled); isa_ext_update_enabled(cpu, ext_offset, profile->enabled); } } @@ -910,9 +916,7 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor = *v, const char *name, multi_ext_cfg->name, lower); } =20 - g_hash_table_insert(multi_ext_user_opts, - GUINT_TO_POINTER(multi_ext_cfg->offset), - (gpointer)value); + cpu_cfg_ext_add_user_opt(multi_ext_cfg->offset, value); =20 prev_val =3D isa_ext_is_enabled(cpu, multi_ext_cfg->offset); =20 --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1698277644; cv=none; d=zohomail.com; s=zohoarc; b=cHPDeadaL6Me4hH4LqGv7oYpizXK/TcvN1vrUS1GDfm+SevSdIj1NuLL71jEQ0zTOllRQOiYlEHMslec98ahT0lP5DAjECv42YP49vFQWdOp2lOr8tLsKUUvESB2YPX5PyNt3QDZmf6nMTXUP3MhWc0j7cv7LmziZRVarvTs5gQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698277644; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pWwvE4682xpR0DXPdf9S+13HwbPC8ixF58zbOXjH4GI=; b=LDAKiMp4MlmXR8Qu6hoXgir7GUuAT4HUn1sW4ymYxkTvKVjwuKCGWgllb+t92hWOT8cmPjZYhpNKTFlzTBTYd0yeW1mdnLdnqNPETGgXZSVoyeLywu7mWIx42SS+ySet6uiVn25/LWwO403Fblu03f/HI5WvSTfA08/FpCxHIzA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698277644760253.53162751137938; Wed, 25 Oct 2023 16:47:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvnZN-000136-6M; Wed, 25 Oct 2023 19:45:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvnZF-0000yy-Lh for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:45 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qvnZC-0002KO-Sh for qemu-devel@nongnu.org; Wed, 25 Oct 2023 19:45:41 -0400 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-1c9b95943beso2165565ad.1 for ; Wed, 25 Oct 2023 16:45:38 -0700 (PDT) Received: from grind.. ([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277537; x=1698882337; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pWwvE4682xpR0DXPdf9S+13HwbPC8ixF58zbOXjH4GI=; b=Ps5rxi+oXhbLTucYLKU53rZWanoFPwP85ILT7F61I7dp2aF3TPr9vB8Bq4R6dH09OC Ich1CdfDWaMfzJbAJVMY9B015AP+/Z2qv69VydXW9DDjdF+hVBVFwnXFgXvfQgp5j8qK mVLwpN7G36mcKLC1orV2sQAWzHRjeQBXxN/UzydY1qE4d84PQeDB3JDv7qCdIZ/wh/06 KJn1Jwg18Cu7VH3AGXOT+UpzlwrbjFUzNp1VvMabj5FPtQNooG1YgoNSL0vhP4BTiq/Q Xl8EvnxhTOPV5uzoOx6xnMj5UTJ3PkE/mNLiDUgqOCz/AzgeNjKONVe+uRhTDh96baqT 8knw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277537; x=1698882337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pWwvE4682xpR0DXPdf9S+13HwbPC8ixF58zbOXjH4GI=; b=vbejg7Y1mRDJO80bHSpcoGNapwajciTHGMjPItSPeN5HkZV0oHwYqCjDC8z8x+VtqI U8kofdCdAHH3cNxRc41yRRBhb5Js6YEHMDAGIEqfPUvoKXxx/xws6r+O2jBpC4UW/nYH j83EkY1WrUs3lvCXzZ06vM1lxBZJayjEKGy6ARfIOZX0MxM5u+b0ztIcp37U5hiH/5cl M8Xz5Yc9hLGxj5H9ZW2gmz59u3l+RGLp01SzDXAzl7CZLVXwwNRR0jWnKupXxobqk9FW iqrraFyMQ6r9FTV0WlzZsu4lOuTg89XxvXBUgEER7VJwA0nWnzKaUfMFzhWoykXpD6GR goDg== X-Gm-Message-State: AOJu0YyFGlra0vEJ/WI9m3T2pvVmqLTlHZutPX6JCijecPn2ypejquzi MGNwnROBSfHbT6TXaShDp/9k/JeO4JV7a1iMSXk= X-Google-Smtp-Source: AGHT+IHcFMzfggYlFTqngt4Kn7DLl2mogUY/GyhMDNWbGMzPQEjmHi8DdIT287IKCEqpS3+rbwNmJQ== X-Received: by 2002:a17:902:e745:b0:1c7:7e00:8075 with SMTP id p5-20020a170902e74500b001c77e008075mr18037890plf.66.1698277537264; Wed, 25 Oct 2023 16:45:37 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 09/10] target/riscv/tcg: honor user choice for G MISA bits Date: Wed, 25 Oct 2023 20:44:58 -0300 Message-ID: <20231025234459.581697-10-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277646457100001 Content-Type: text/plain; charset="utf-8" RVG behaves like a profile: a single flag enables a set of bits. Right now we're considering user choice when handling RVG and zicsr/zifencei and ignoring user choice on MISA bits. We'll add user warnings for profiles when the user disables its mandatory extensions in the next patch. We'll do the same thing with RVG now to keep consistency between RVG and profile handling. First and foremost, create a new RVG only helper to avoid clogging riscv_cpu_validate_set_extensions(). We do not want to annoy users with RVG warnings like we did in the past (see 9b9741c38f), thus we'll only warn if RVG was user set and the user disabled a RVG extension in the command line. For every RVG MISA bit (IMAFD), zicsr and zifencei, the logic then becomes: - if enabled, do nothing; - if disabled and not user set, enable it; - if disabled and user set, throw a warning that it's a RVG mandatory extension. This same logic will be used for profiles in the next patch. Note that this is a behavior change, where we would error out if the user disabled either zicsr or zifencei. As long as users are explicitly disabling things in the command line we'll let them have a go at it, at least in this step. We'll error out later in the validation if needed. Other notable changes from the previous RVG code: - use riscv_cpu_write_misa_bit() instead of manually updating both env->misa_ext and env->misa_ext_mask; - set zicsr and zifencei directly. We're already checking if they were user set and priv version will never fail for these extensions, making cpu_cfg_ext_auto_update() redundant. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 73 +++++++++++++++++++++++++------------- 1 file changed, 48 insertions(+), 25 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 423328b1c7..8d24cb2e82 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -42,6 +42,12 @@ static bool cpu_cfg_ext_is_user_set(uint32_t ext_offset) GUINT_TO_POINTER(ext_offset)); } =20 +static bool cpu_misa_ext_is_user_set(uint32_t misa_bit) +{ + return g_hash_table_contains(misa_ext_user_opts, + GUINT_TO_POINTER(misa_bit)); +} + static void cpu_cfg_ext_add_user_opt(uint32_t ext_offset, bool value) { g_hash_table_insert(multi_ext_user_opts, GUINT_TO_POINTER(ext_offset), @@ -312,6 +318,46 @@ static void riscv_cpu_validate_zic64b(RISCVCPU *cpu) } } =20 +static void riscv_cpu_validate_g(RISCVCPU *cpu) +{ + const char *warn_msg =3D "RVG mandates disabled extension %s"; + uint32_t g_misa_bits[] =3D {RVI, RVM, RVA, RVF, RVD}; + bool send_warn =3D cpu_misa_ext_is_user_set(RVG); + + for (int i =3D 0; i < ARRAY_SIZE(g_misa_bits); i++) { + uint32_t bit =3D g_misa_bits[i]; + + if (riscv_has_ext(&cpu->env, bit)) { + continue; + } + + if (!cpu_misa_ext_is_user_set(bit)) { + riscv_cpu_write_misa_bit(cpu, bit, true); + continue; + } + + if (send_warn) { + warn_report(warn_msg, riscv_get_misa_ext_name(bit)); + } + } + + if (!cpu->cfg.ext_zicsr) { + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr))) { + cpu->cfg.ext_zicsr =3D true; + } else if (send_warn) { + warn_report(warn_msg, "zicsr"); + } + } + + if (!cpu->cfg.ext_zifencei) { + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zifencei))) { + cpu->cfg.ext_zifencei =3D true; + } else if (send_warn) { + warn_report(warn_msg, "zifencei"); + } + } +} + /* * Check consistency between chosen extensions while setting * cpu->cfg accordingly. @@ -321,31 +367,8 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) CPURISCVState *env =3D &cpu->env; Error *local_err =3D NULL; =20 - /* Do some ISA extension error checking */ - if (riscv_has_ext(env, RVG) && - !(riscv_has_ext(env, RVI) && riscv_has_ext(env, RVM) && - riscv_has_ext(env, RVA) && riscv_has_ext(env, RVF) && - riscv_has_ext(env, RVD) && - cpu->cfg.ext_zicsr && cpu->cfg.ext_zifencei)) { - - if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr)) && - !cpu->cfg.ext_zicsr) { - error_setg(errp, "RVG requires Zicsr but user set Zicsr to fal= se"); - return; - } - - if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zifencei)) && - !cpu->cfg.ext_zifencei) { - error_setg(errp, "RVG requires Zifencei but user set " - "Zifencei to false"); - return; - } - - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zicsr), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zifencei), true); - - env->misa_ext |=3D RVI | RVM | RVA | RVF | RVD; - env->misa_ext_mask |=3D RVI | RVM | RVA | RVF | RVD; + if (riscv_has_ext(env, RVG)) { + riscv_cpu_validate_g(cpu); } =20 if (riscv_has_ext(env, RVI) && riscv_has_ext(env, RVE)) { --=20 2.41.0 From nobody Wed Nov 27 13:48:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([191.255.2.33]) by smtp.gmail.com with ESMTPSA id w14-20020a170902e88e00b001c736746d33sm9738654plg.217.2023.10.25.16.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 16:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698277540; x=1698882340; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N66mwe55qIwqiyZlpStxI0DDZnJyiqHeIii+NKoAya4=; b=cK/b4PSLZUq83S7vtTEsPDxxF2masnsHYPp3lFOfyVDCEe6Fy7LnwXwP7yzcIdsGo0 sI1pB8kAAqkZHt4/4Q4lkiuJxwfWZeEjmMD//9b9foUIoSvtGRJE+8M7/O8gY0peJxb9 DLqtdeyEp0d1sufRjZQJz6nHDJAHPEXCbKxDhcY/pDoOKaE4QWUmQWmPI+FCOq3/TCpf gR6JYgLxhDVelrOTH4BOfUfHahjxoB/Zk2Cdef8X+zZgcs0FUTyQJ6YTvYygm56H4FCQ Qp474iM54fukgM1xnuC3eXik8aJ4c04GG0x70Y8llBRSZZtrdtVRMNwG98GzrwGAYdsj M/XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698277540; x=1698882340; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N66mwe55qIwqiyZlpStxI0DDZnJyiqHeIii+NKoAya4=; b=DsHG2boOK2iIDSe5igD+RhjvKh2gJwaUS04rzt4Ksan+5IeNvM6HajrZ0gWxMSy8++ RbDdPp5XKjBRxZqhUG3G5JH98cT72jJI4ov14sulmhWuRxtNxAmHvUde4g2vE8Y5N8OG NVFaAUGXEEK1W/NmWjyTDwGCdFHTDkEk/kE+L+BbVDwWGo6q9ggDiOvAUbFnZHT73cgW 0aK9ZeDEe1HULnJTPjAR6DlgP+NL6zmNngeTZoSmdpgu3UVgknOiZq4qkFmVvfhZM86F 4c6nXnI3FtgJayR+i99kyhPlXt8gVmfCBzOBtHbk9Nxro3XRGmQYnjqytnkOMQk2xVqX nPUQ== X-Gm-Message-State: AOJu0YwkJX3ZU+Ks2EQ/d/fM2fvCHFe3cxL+5tBLuUJ8J1LhwQob5e0P keHhdTkb3j5QcQ+3rSLL3mhd9ve1PpqmyRQDCL8= X-Google-Smtp-Source: AGHT+IHDwfHwMq5HfxnwFpBpVDap1BUY3VuXH9Ojj056ztPsiE7ywAa75yKw26XEbagEBCzRJ7TgIQ== X-Received: by 2002:a17:902:c411:b0:1cb:e412:c3fd with SMTP id k17-20020a170902c41100b001cbe412c3fdmr8475460plk.63.1698277540213; Wed, 25 Oct 2023 16:45:40 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v5 10/10] target/riscv/tcg: warn if profile exts are disabled Date: Wed, 25 Oct 2023 20:44:59 -0300 Message-ID: <20231025234459.581697-11-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231025234459.581697-1-dbarboza@ventanamicro.com> References: <20231025234459.581697-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1698277642418100011 Content-Type: text/plain; charset="utf-8" Enabling a profile and then disabling some of its mandatory extensions is a valid use. It can be useful for debugging and testing. But the common expected use of enabling a profile is to enable all its mandatory extensions. Add an user warning when mandatory extensions from an enabled profile are disabled in the command line, like we're already doing with RVG. After this patch, this will throw warnings: -cpu rv64,rva22u64=3Dtrue,zihintpause=3Dfalse,zicbom=3Dfalse,zicboz=3Dfalse qemu-system-riscv64: warning: Profile rva22u64 mandates disabled extension = zihintpause qemu-system-riscv64: warning: Profile rva22u64 mandates disabled extension = zicbom qemu-system-riscv64: warning: Profile rva22u64 mandates disabled extension = zicboz Note that the following will NOT throw warnings because the profile is being enabled last, hence all its mandatory extensions will be enabled: -cpu rv64,zihintpause=3Dfalse,zicbom=3Dfalse,zicboz=3Dfalse,rva22u64=3Dtrue Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 57 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 8d24cb2e82..ac21cd5ad4 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -147,6 +147,22 @@ static int cpu_cfg_ext_get_min_version(uint32_t ext_of= fset) g_assert_not_reached(); } =20 +static const char *cpu_cfg_ext_get_name(uint32_t ext_offset) +{ + const RISCVIsaExtData *edata; + + for (edata =3D isa_edata_arr; edata && edata->name; edata++) { + if (edata->ext_enable_offset !=3D ext_offset) { + continue; + } + + return edata->name; + } + + g_assert_not_reached(); +} + + static void cpu_cfg_ext_auto_update(RISCVCPU *cpu, uint32_t ext_offset, bool value) { @@ -644,11 +660,52 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,= Error **errp) riscv_cpu_disable_priv_spec_isa_exts(cpu); } =20 +static void riscv_cpu_validate_profile(RISCVCPU *cpu, + RISCVCPUProfile *profile) +{ + const char *warn_msg =3D "Profile %s mandates disabled extension %s"; + int i; + + for (i =3D 0; misa_bits[i] !=3D 0; i++) { + uint32_t bit =3D misa_bits[i]; + + if (!(profile->misa_ext & bit)) { + continue; + } + + if (!riscv_has_ext(&cpu->env, bit)) { + warn_report(warn_msg, profile->name, riscv_get_misa_ext_name(b= it)); + } + } + + for (i =3D 0; profile->ext_offsets[i] !=3D RISCV_PROFILE_EXT_LIST_END;= i++) { + int ext_offset =3D profile->ext_offsets[i]; + + if (!isa_ext_is_enabled(cpu, ext_offset)) { + warn_report(warn_msg, profile->name, + cpu_cfg_ext_get_name(ext_offset)); + } + } +} + +static void riscv_cpu_validate_profiles(RISCVCPU *cpu) +{ + for (int i =3D 0; riscv_profiles[i] !=3D NULL; i++) { + RISCVCPUProfile *profile =3D riscv_profiles[i]; + + if (profile->user_set && profile->enabled) { + riscv_cpu_validate_profile(cpu, profile); + } + } +} + void riscv_tcg_cpu_finalize_features(RISCVCPU *cpu, Error **errp) { CPURISCVState *env =3D &cpu->env; Error *local_err =3D NULL; =20 + riscv_cpu_validate_profiles(cpu); + riscv_cpu_validate_priv_spec(cpu, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); --=20 2.41.0