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From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>
To: qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@linaro.org>,
=?UTF-8?q?C=C3=A9dric=20Le=20Goater?= <clg@kaod.org>
Subject: [PULL 12/12] hw/arm/aspeed: Move AspeedSoCState::cpu/vic to
Aspeed2400SoCState
Date: Wed, 25 Oct 2023 10:59:21 +0200
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X-ZM-MESSAGEID: 1698224611306100003
From: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
The ARM array and VIC peripheral are only used by the
2400 series, remove them from the common AspeedSoCState.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <philmd@linaro.org>
Reviewed-by: C=C3=A9dric Le Goater <clg@kaod.org>
Signed-off-by: C=C3=A9dric Le Goater <clg@kaod.org>
---
include/hw/arm/aspeed_soc.h | 5 +++--
hw/arm/{aspeed_soc.c =3D> aspeed_ast2400.c} | 27 +++++++++++++----------
hw/arm/meson.build | 2 +-
3 files changed, 19 insertions(+), 15 deletions(-)
rename hw/arm/{aspeed_soc.c =3D> aspeed_ast2400.c} (95%)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 6f783138e172..cb832bc1ee14 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -49,14 +49,12 @@
struct AspeedSoCState {
DeviceState parent;
=20
- ARMCPU cpu[ASPEED_CPUS_NUM];
MemoryRegion *memory;
MemoryRegion *dram_mr;
MemoryRegion dram_container;
MemoryRegion sram;
MemoryRegion spi_boot_container;
MemoryRegion spi_boot;
- AspeedVICState vic;
AspeedRtcState rtc;
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
@@ -99,6 +97,9 @@ OBJECT_DECLARE_TYPE(AspeedSoCState, AspeedSoCClass, ASPEE=
D_SOC)
=20
struct Aspeed2400SoCState {
AspeedSoCState parent;
+
+ ARMCPU cpu[ASPEED_CPUS_NUM];
+ AspeedVICState vic;
};
=20
#define TYPE_ASPEED2400_SOC "aspeed2400-soc"
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_ast2400.c
similarity index 95%
rename from hw/arm/aspeed_soc.c
rename to hw/arm/aspeed_ast2400.c
index dfb97f6dbd78..a4334c81b8f3 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_ast2400.c
@@ -135,13 +135,15 @@ static const int aspeed_soc_ast2400_irqmap[] =3D {
=20
static qemu_irq aspeed_soc_ast2400_get_irq(AspeedSoCState *s, int dev)
{
+ Aspeed2400SoCState *a =3D ASPEED2400_SOC(s);
AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s);
=20
- return qdev_get_gpio_in(DEVICE(&s->vic), sc->irqmap[dev]);
+ return qdev_get_gpio_in(DEVICE(&a->vic), sc->irqmap[dev]);
}
=20
static void aspeed_ast2400_soc_init(Object *obj)
{
+ Aspeed2400SoCState *a =3D ASPEED2400_SOC(obj);
AspeedSoCState *s =3D ASPEED_SOC(obj);
AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s);
int i;
@@ -153,7 +155,7 @@ static void aspeed_ast2400_soc_init(Object *obj)
}
=20
for (i =3D 0; i < sc->num_cpus; i++) {
- object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type);
+ object_initialize_child(obj, "cpu[*]", &a->cpu[i], sc->cpu_type);
}
=20
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
@@ -167,7 +169,7 @@ static void aspeed_ast2400_soc_init(Object *obj)
object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu),
"hw-prot-key");
=20
- object_initialize_child(obj, "vic", &s->vic, TYPE_ASPEED_VIC);
+ object_initialize_child(obj, "vic", &a->vic, TYPE_ASPEED_VIC);
=20
object_initialize_child(obj, "rtc", &s->rtc, TYPE_ASPEED_RTC);
=20
@@ -242,6 +244,7 @@ static void aspeed_ast2400_soc_init(Object *obj)
static void aspeed_ast2400_soc_realize(DeviceState *dev, Error **errp)
{
int i;
+ Aspeed2400SoCState *a =3D ASPEED2400_SOC(dev);
AspeedSoCState *s =3D ASPEED_SOC(dev);
AspeedSoCClass *sc =3D ASPEED_SOC_GET_CLASS(s);
Error *err =3D NULL;
@@ -264,15 +267,15 @@ static void aspeed_ast2400_soc_realize(DeviceState *d=
ev, Error **errp)
=20
/* CPU */
for (i =3D 0; i < sc->num_cpus; i++) {
- object_property_set_link(OBJECT(&s->cpu[i]), "memory",
+ object_property_set_link(OBJECT(&a->cpu[i]), "memory",
OBJECT(s->memory), &error_abort);
- if (!qdev_realize(DEVICE(&s->cpu[i]), NULL, errp)) {
+ if (!qdev_realize(DEVICE(&a->cpu[i]), NULL, errp)) {
return;
}
}
=20
/* SRAM */
- sram_name =3D g_strdup_printf("aspeed.sram.%d", CPU(&s->cpu[0])->cpu_i=
ndex);
+ sram_name =3D g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_i=
ndex);
memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, =
&err);
if (err) {
error_propagate(errp, err);
@@ -288,14 +291,14 @@ static void aspeed_ast2400_soc_realize(DeviceState *d=
ev, Error **errp)
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_S=
CU]);
=20
/* VIC */
- if (!sysbus_realize(SYS_BUS_DEVICE(&s->vic), errp)) {
+ if (!sysbus_realize(SYS_BUS_DEVICE(&a->vic), errp)) {
return;
}
- aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_DEV_V=
IC]);
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0,
- qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1,
- qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
+ aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->vic), 0, sc->memmap[ASPEED_DEV_V=
IC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&a->vic), 0,
+ qdev_get_gpio_in(DEVICE(&a->cpu), ARM_CPU_IRQ));
+ sysbus_connect_irq(SYS_BUS_DEVICE(&a->vic), 1,
+ qdev_get_gpio_in(DEVICE(&a->cpu), ARM_CPU_FIQ));
=20
/* RTC */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) {
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 42e7aa36f39a..68245d3ad10b 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -48,9 +48,9 @@ arm_ss.add(when: 'CONFIG_FSL_IMX25', if_true: files('fsl-=
imx25.c', 'imx25_pdk.c'
arm_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c'=
))
arm_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
- 'aspeed_soc.c',
'aspeed.c',
'aspeed_soc_common.c',
+ 'aspeed_ast2400.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--=20
2.41.0