From nobody Tue Dec 16 11:42:29 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1698137671; cv=none; d=zohomail.com; s=zohoarc; b=L8LZxSh4LSystEs2d2+tfJgDQWbO40H36CC8rkQFtC5YXFjRdU7pfyf5/wef/YHiqky5BT6gyiffNtRUL49Ss/sq/TU8dWRzSU8YmZpddSxhnmnt4vuyAHXzmz5fQfGYSBmEWmJ7dk5tj+FsILMZOrBDVHJXiMBC0N0j7fxPsss= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698137671; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+4r4ZwtB6cGkcOOXZqmaRLs565BJU69oxAf8KoQDxc0=; b=fuDZDEr+K5bLtBP58A2uycsXhrNUEQQBkiOASAw9m67wz+GTl8feRHFcOON7IEAAD/8GVQzhAP+YLGR3DE5c7o7Ei99Se6/r3Ngef/zlzfg/Q6PC2uyFVMEl3YmNgWD2aIRLkB8F/4ykv/s8APg1/KZwkLyMBtgJUKmcGOIDR5A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698137671373491.119505797776; Tue, 24 Oct 2023 01:54:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qvDAk-0001qY-TF; Tue, 24 Oct 2023 04:53:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvDAj-0001oc-SJ for qemu-devel@nongnu.org; Tue, 24 Oct 2023 04:53:57 -0400 Received: from mgamail.intel.com ([134.134.136.126]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qvDAi-0006Q6-7E for qemu-devel@nongnu.org; Tue, 24 Oct 2023 04:53:57 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Oct 2023 01:53:54 -0700 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga001.jf.intel.com with ESMTP; 24 Oct 2023 01:53:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698137636; x=1729673636; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=faxaES8YoVbOgMt3WqpUmEvmnbakJ+oHviWW1FXmsws=; b=gP6EeLRyfP6xg6PTU765Em+sP5rH0FIM4s+f5ABvwJpK6OUbg+zWmDOG lPAKBk1tl6pHnaGuX+VKSj2SmONp85/Xlf54p4fXaHWipaSHkPlh6dZCr ksq2Sa8OnxXhJ48659ySIf7rqDhg4jOTc81/28YiMUNkupQoKJQt9nWDJ AJELYeMy/Ql5jN5xzhl0/+aJPFSAd0PCx6wiqXI2EEMKXfi4TRl5fGl1q XuWxpICyAIpDi7RvhTe6maf82n3cmpdpAsde3d5ZeXVAxL8PvgA7ycMTV /OHSOAFiyKG8WR/kKDHn8bIMM0v35ZGdhbVeDweH7FYzMcGjxcvUoSUi0 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="372077426" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="372077426" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10872"; a="793418343" X-IronPort-AV: E=Sophos;i="6.03,247,1694761200"; d="scan'208";a="793418343" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Xiaoyao Li , Babu Moger , Yongwei Ma , Zhao Liu , Zhuocheng Ding Subject: [PATCH v5 16/20] hw/i386/pc: Support smp.clusters for x86 PC machine Date: Tue, 24 Oct 2023 17:03:19 +0800 Message-Id: <20231024090323.1859210-17-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231024090323.1859210-1-zhao1.liu@linux.intel.com> References: <20231024090323.1859210-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=134.134.136.126; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1698137673423100003 Content-Type: text/plain; charset="utf-8" From: Zhuocheng Ding As module-level topology support is added to X86CPU, now we can enable the support for the cluster parameter on PC machines. With this support, we can define a 5-level x86 CPU topology with "-smp": -smp cpus=3D*,maxcpus=3D*,sockets=3D*,dies=3D*,clusters=3D*,cores=3D*,threa= ds=3D*. Additionally, add the 5-level topology example in description of "-smp". Signed-off-by: Zhuocheng Ding Signed-off-by: Zhao Liu Reviewed-by: Yanan Wang Tested-by: Babu Moger Tested-by: Yongwei Ma Acked-by: Michael S. Tsirkin --- hw/i386/pc.c | 1 + qemu-options.hx | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f7ee638becf4..e215913cafe3 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1822,6 +1822,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->default_cpu_type =3D TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported =3D true; mc->smp_props.dies_supported =3D true; + mc->smp_props.clusters_supported =3D true; mc->default_ram_id =3D "pc.ram"; pcmc->default_smbios_ep_type =3D SMBIOS_ENTRY_POINT_TYPE_64; =20 diff --git a/qemu-options.hx b/qemu-options.hx index e26230bac5f0..c65b77527b3c 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -337,14 +337,14 @@ SRST -smp 8,sockets=3D2,cores=3D2,threads=3D2,maxcpus=3D8 =20 The following sub-option defines a CPU topology hierarchy (2 sockets - totally on the machine, 2 dies per socket, 2 cores per die, 2 threads - per core) for PC machines which support sockets/dies/cores/threads. - Some members of the option can be omitted but their values will be - automatically computed: + totally on the machine, 2 dies per socket, 2 clusters per die, 2 cores= per + cluster, 2 threads per core) for PC machines which support sockets/dies + /clusters/cores/threads. Some members of the option can be omitted but + their values will be automatically computed: =20 :: =20 - -smp 16,sockets=3D2,dies=3D2,cores=3D2,threads=3D2,maxcpus=3D16 + -smp 32,sockets=3D2,dies=3D2,clusters=3D2,cores=3D2,threads=3D2,ma= xcpus=3D32 =20 The following sub-option defines a CPU topology hierarchy (2 sockets totally on the machine, 2 clusters per socket, 2 cores per cluster, --=20 2.34.1