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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c36; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084850698100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 5c873b2161..5cecc6ed95 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -221,7 +221,7 @@ static inline bool in_range_b(tcg_target_long target) } =20 static uint32_t reloc_pc24_val(const tcg_insn_unit *pc, - const tcg_insn_unit *target) + const tcg_insn_unit *target) { ptrdiff_t disp =3D tcg_ptr_byte_diff(target, pc); tcg_debug_assert(in_range_b(disp)); @@ -241,7 +241,7 @@ static bool reloc_pc24(tcg_insn_unit *src_rw, const tcg= _insn_unit *target) } =20 static uint16_t reloc_pc14_val(const tcg_insn_unit *pc, - const tcg_insn_unit *target) + const tcg_insn_unit *target) { ptrdiff_t disp =3D tcg_ptr_byte_diff(target, pc); tcg_debug_assert(disp =3D=3D (int16_t) disp); @@ -3645,7 +3645,7 @@ static void expand_vec_mul(TCGType type, unsigned vec= e, TCGv_vec v0, tcgv_vec_arg(t1), tcgv_vec_arg(t2)); vec_gen_3(INDEX_op_ppc_pkum_vec, type, vece, tcgv_vec_arg(v0), tcgv_vec_arg(v0), tcgv_vec_arg(t1)); - break; + break; =20 case MO_32: tcg_debug_assert(!have_isa_2_07); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084813; x=1698689613; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kPve6f7zLeYUZnfvyB8rknIVGRQNk3b6m8Mg7HCCt/Y=; b=mHaPp5Sc8KUo2G09Y6mouormtju1BZf6HjGq1pX+3BL2AV6k8dtaHDML4wQcfOewfj OfDfJ0kfsLKf2Q9+lBUoHmp4VxirE7ejZD89pvsUMcCNjReeGaViaYYa/D6KmaKiFbUQ 658RNPCqQlMyQfstnJY+JPTXIJBbKdL1kj6PQ2fkcwC8duvIW/JW9G/a8cp32Uq709Ek gspVn5GZT+1bv+SFZZfEgHR6dFWqpqSzIKRBJwQh4ilCvYRZ+oywWmRg8r7Jgk7lDlYy 0Dja1/sCNLvp2oNSQ89ns0LW2PVXlQSZbX6dRSz1oOgLCyLVmthx3qmCCsqnblBgY1Y0 VWcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084813; x=1698689613; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kPve6f7zLeYUZnfvyB8rknIVGRQNk3b6m8Mg7HCCt/Y=; b=wXJB5HFtPefa5zwu5fpbaa8jInVmH3DVGBrjoCt1Y1SXZ5Zgv2vp63UKOWz6oDN4AC 7hE2StB3SrM05t5f2sVQJCs3IIU+Rv9Fz4VqbN/tSamonNFsC8KE1jiAngya7incOvN5 vV9l4sqvVtu6EWs08K8NNnxKASar7TxeQZEpMHLRV0rb6o5R92YrI4Ll4nQ2/cuICSWH d5VAIhAwsnyKUoPTXVdCfH0QS9k+nlSVmKekkZrki2GMKRXb2+uUSF1LIpP1wMxr/v3b wWfQcaDfKB2IFXvFAUqwzxktkmWygNxcXwyEcznGTNCYKtm/rFBebrpr0HwK3hDi9KDQ Gxlg== X-Gm-Message-State: AOJu0YxTNm1f/KmzUGxV5MlNe7jP/azPt6M7FiHSfBocRxQq2rz51NoX g/RarimFNyslCPIqhIgHe/ahzxudcpCxodv7W2g= X-Google-Smtp-Source: AGHT+IH59+EoFVi72cLxRr1vKpplfUnND49lj5a/mv27f+HyDmTe5DawwM+F3/HxAF1IrvvAtFzMZA== X-Received: by 2002:a05:6a20:54a6:b0:14c:a53c:498e with SMTP id i38-20020a056a2054a600b0014ca53c498emr354664pzk.42.1698084813052; Mon, 23 Oct 2023 11:13:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Jordan Niethe Subject: [PULL v3 02/38] tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB Date: Mon, 23 Oct 2023 11:12:53 -0700 Message-Id: <20231023181329.171490-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085127623100001 Content-Type: text/plain; charset="utf-8" From: Jordan Niethe Direct branch patching was disabled when using TCG_REG_TB in commit 736a1588c1 ("tcg/ppc: Fix race in goto_tb implementation"). The issue with direct branch patching with TCG_REG_TB is the lack of synchronization between the new TCG_REG_TB being established and the direct branch being patched in. If each translation block is responsible for establishing its own TCG_REG_TB then there can be no synchronization issue. Make each translation block begin by setting up its own TCG_REG_TB. Use the preferred 'bcl 20,31,$+4' sequence. Signed-off-by: Jordan Niethe [rth: Split out tcg_out_tb_start, power9 addpcis] Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 48 ++++++++++++++-------------------------- 1 file changed, 17 insertions(+), 31 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 5cecc6ed95..9197cfd6c6 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2509,9 +2509,6 @@ static void tcg_target_qemu_prologue(TCGContext *s) =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out32(s, MTSPR | RS(tcg_target_call_iarg_regs[1]) | CTR); - if (USE_REG_TB) { - tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, tcg_target_call_iarg_regs= [1]); - } tcg_out32(s, BCCTR | BO_ALWAYS); =20 /* Epilogue */ @@ -2529,7 +2526,13 @@ static void tcg_target_qemu_prologue(TCGContext *s) =20 static void tcg_out_tb_start(TCGContext *s) { - /* nothing to do */ + /* Load TCG_REG_TB. */ + if (USE_REG_TB) { + /* bcl 20,31,$+4 (preferred form for getting nia) */ + tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK); + tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR); + tcg_out32(s, ADDI | TAI(TCG_REG_TB, TCG_REG_TB, -4)); + } } =20 static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg) @@ -2542,32 +2545,22 @@ static void tcg_out_goto_tb(TCGContext *s, int whic= h) { uintptr_t ptr =3D get_jmp_target_addr(s, which); =20 + /* Direct branch will be patched by tb_target_set_jmp_target. */ + set_jmp_insn_offset(s, which); + tcg_out32(s, NOP); + + /* When branch is out of range, fall through to indirect. */ if (USE_REG_TB) { ptrdiff_t offset =3D tcg_tbrel_diff(s, (void *)ptr); - tcg_out_mem_long(s, LD, LDX, TCG_REG_TB, TCG_REG_TB, offset); - =20 - /* TODO: Use direct branches when possible. */ - set_jmp_insn_offset(s, which); - tcg_out32(s, MTSPR | RS(TCG_REG_TB) | CTR); - - tcg_out32(s, BCCTR | BO_ALWAYS); - - /* For the unlinked case, need to reset TCG_REG_TB. */ - set_jmp_reset_offset(s, which); - tcg_out_mem_long(s, ADDI, ADD, TCG_REG_TB, TCG_REG_TB, - -tcg_current_code_size(s)); + tcg_out_mem_long(s, LD, LDX, TCG_REG_TMP1, TCG_REG_TB, offset); } else { - /* Direct branch will be patched by tb_target_set_jmp_target. */ - set_jmp_insn_offset(s, which); - tcg_out32(s, NOP); - - /* When branch is out of range, fall through to indirect. */ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, ptr - (int16_t)ptr); tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, (int16_t)p= tr); - tcg_out32(s, MTSPR | RS(TCG_REG_TMP1) | CTR); - tcg_out32(s, BCCTR | BO_ALWAYS); - set_jmp_reset_offset(s, which); } + + tcg_out32(s, MTSPR | RS(TCG_REG_TMP1) | CTR); + tcg_out32(s, BCCTR | BO_ALWAYS); + set_jmp_reset_offset(s, which); } =20 void tb_target_set_jmp_target(const TranslationBlock *tb, int n, @@ -2577,10 +2570,6 @@ void tb_target_set_jmp_target(const TranslationBlock= *tb, int n, intptr_t diff =3D addr - jmp_rx; tcg_insn_unit insn; =20 - if (USE_REG_TB) { - return; - } - if (in_range_b(diff)) { insn =3D B | (diff & 0x3fffffc); } else { @@ -2600,9 +2589,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, switch (opc) { case INDEX_op_goto_ptr: tcg_out32(s, MTSPR | RS(args[0]) | CTR); - if (USE_REG_TB) { - tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, args[0]); - } tcg_out32(s, ADDI | TAI(TCG_REG_R3, 0, 0)); tcg_out32(s, BCCTR | BO_ALWAYS); break; --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085123; cv=none; d=zohomail.com; s=zohoarc; b=aFF+fKE1zy9cFuTjyBAyqij6CCY5swpcoozazN1KgGhJbNhID/6hx7QWU98ZfsmHdsCDzS2GOlwRUaSZ89Xu2tLSy0BIpO5J/OVGqEANzciZApWeedK6dscW/ZeJhpcEn8vklQPIAhgx1r8W1e2+aaNX5+e3UTeQSgL7YM4IEdk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085123; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084814; x=1698689614; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=3KCQIgln5kN/33Jyz8B+r1A500q3A4Jm4TEcmcp8vS8=; b=Z6xUgsqyg/YSo2mtmN81hn4f9jkjDkOnnYjxjptmIfVKsNGs+J6lZVTgXgSteB0rGo 5YpWTttqgfykuIXrj98RvMHRjm+0DlucedArR99+nY1zaQ00pj6I6qyBwERifTiuZkxb y0U1VFcU9tpNLE28Gm8f/r32Q08FTAD4sY931w+KHVPJBhKSsyGN9Q5cA8/DWQmVtt6V tmIeGnztE0S/wGnwJuH6wjgBEhIEafR5EM6Swf4WmMhPDm62bHVNuYWxRrBT0e+/ocQV 33Uk/7LHTJWQBgDXfPq5ofdDkUl2GPqssdqXR6HZMgVWdGz++11BcalvGwAPJPDIPa+g 9NeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084814; x=1698689614; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3KCQIgln5kN/33Jyz8B+r1A500q3A4Jm4TEcmcp8vS8=; b=g/OSI5vtrJTHjFrVV/36ODJ9k8G0bWB+rFgae7+vWKP2BR5rdMLr9QK6Z2DEuXMKPC S5B9Js7Mef0DVsTCVQsrnZ/tGqX826WRW/6hF7wCuXuebVweR1IW8giQ4ZFHYOKjzyJc 2JHHawJoaHopgUrOv3aRmTnbia2RvCsolT4U0IRUA6PjaRo28ufMyrZXf3xWXeUd1c4Y jMA7SVKIbidyuU3OxDouEhIVrjO+s25hmeoFMZboW/P/G8uY9W3Uh6qLsnDJ4QV5Rtvg pliVUTgTK5RAtNVQejMVRnoRxMWueDEGadWbEZYoEBsioxIbeNhsVgJbMMQm8l2cixY3 V5ZQ== X-Gm-Message-State: AOJu0YwvwdMp2+u0PFseVNaWK5LBbF9OdnIUcihAhi1jmoA/zhttI916 YhPQf3CXoXMFLImkEqSHrtiP53DpELxmpkO4PYc= X-Google-Smtp-Source: AGHT+IGJdThe0J3hhihGJOZU3G4hHbjraFYZJngUsEdnUGM5lYZT+ydt3qp0FDIuSENwgCptB0xAiw== X-Received: by 2002:a05:6359:4289:b0:168:d0d4:d8e6 with SMTP id kp9-20020a056359428900b00168d0d4d8e6mr7666134rwb.16.1698084813892; Mon, 23 Oct 2023 11:13:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 03/38] tcg/ppc: Reinterpret tb-relative to TB+4 Date: Mon, 23 Oct 2023 11:12:54 -0700 Message-Id: <20231023181329.171490-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c34; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc34.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085123560100006 Content-Type: text/plain; charset="utf-8" It saves one insn to load the address of TB+4 instead of TB. Adjust all of the indexing to match. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 9197cfd6c6..aafbf2db4e 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -215,6 +215,12 @@ static const int tcg_target_callee_save_regs[] =3D { TCG_REG_R31 }; =20 +/* For PPC, we use TB+4 instead of TB as the base. */ +static inline ptrdiff_t ppc_tbrel_diff(TCGContext *s, const void *target) +{ + return tcg_tbrel_diff(s, target) - 4; +} + static inline bool in_range_b(tcg_target_long target) { return target =3D=3D sextract64(target, 0, 26); @@ -991,7 +997,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType typ= e, TCGReg ret, } =20 /* Load addresses within the TB with one insn. */ - tb_diff =3D tcg_tbrel_diff(s, (void *)arg); + tb_diff =3D ppc_tbrel_diff(s, (void *)arg); if (!in_prologue && USE_REG_TB && tb_diff =3D=3D (int16_t)tb_diff) { tcg_out32(s, ADDI | TAI(ret, TCG_REG_TB, tb_diff)); return; @@ -1044,7 +1050,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType t= ype, TCGReg ret, /* Use the constant pool, if possible. */ if (!in_prologue && USE_REG_TB) { new_pool_label(s, arg, R_PPC_ADDR16, s->code_ptr, - tcg_tbrel_diff(s, NULL)); + ppc_tbrel_diff(s, NULL)); tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0)); return; } @@ -1104,7 +1110,7 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType t= ype, unsigned vece, */ if (USE_REG_TB) { rel =3D R_PPC_ADDR16; - add =3D tcg_tbrel_diff(s, NULL); + add =3D ppc_tbrel_diff(s, NULL); } else { rel =3D R_PPC_ADDR32; add =3D 0; @@ -2531,7 +2537,6 @@ static void tcg_out_tb_start(TCGContext *s) /* bcl 20,31,$+4 (preferred form for getting nia) */ tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK); tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR); - tcg_out32(s, ADDI | TAI(TCG_REG_TB, TCG_REG_TB, -4)); } } =20 @@ -2551,7 +2556,7 @@ static void tcg_out_goto_tb(TCGContext *s, int which) =20 /* When branch is out of range, fall through to indirect. */ if (USE_REG_TB) { - ptrdiff_t offset =3D tcg_tbrel_diff(s, (void *)ptr); + ptrdiff_t offset =3D ppc_tbrel_diff(s, (void *)ptr); tcg_out_mem_long(s, LD, LDX, TCG_REG_TMP1, TCG_REG_TB, offset); } else { tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, ptr - (int16_t)ptr); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085121; cv=none; d=zohomail.com; s=zohoarc; b=aVVUfLOy1kn4FZLwnDIHwj9pdVA1NVSjWz+XA8K/XEk/BOyuYHT90Bq1LMEupoF7t3gBYPZJUlGqfEyyIRrFvffcYzhFDLwcngE5EpE7ywmo8KwJeoWKbJEZeoNUDnshXIC22IPT37OsIEKONcnlPCusH/rS1Hm7cjMEQyeG20E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085121; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=ll1AHH/tNyWuM8OWYdUz/S/zYn03mj8222BJRAroDbQ=; b=PdaIXw5xjcUhE4iBxQi8CgrFgd/DIixH099K919+a03sOwEZgJZMvfY+k6ApQZXA3OOv8k4e8JMflgEB7t4UOMBnOOg0CIpUB80210ZOxBHRNER0azFZRGARxjFGtliarUAzXvow7GDnR8EZtzQThOpvsseVz+HQV5shIP2W6dM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085121571223.0196688406271; Mon, 23 Oct 2023 11:18:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzQu-0005VF-Jt; Mon, 23 Oct 2023 14:13:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQr-0005UG-U2 for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:42 -0400 Received: from mail-oo1-xc35.google.com ([2607:f8b0:4864:20::c35]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQl-00085D-Pq for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:41 -0400 Received: by mail-oo1-xc35.google.com with SMTP id 006d021491bc7-584042a01eeso2273662eaf.2 for ; Mon, 23 Oct 2023 11:13:35 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084814; x=1698689614; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ll1AHH/tNyWuM8OWYdUz/S/zYn03mj8222BJRAroDbQ=; b=rAPdpyopiZmJ2FUfdY8NebQOYujXwtkbtENSi+g55xn509DqYjRhcx9quHBf1DYA2B KAHdOe2yk7c3NbE67xcpVR81ZZZEBSu0tGWkpDg8phP2kZRo8fjPiMAEobBCRKFHJl6q oqu/qNu2nbL15m6v4YolLLxws+01mmvcXGTbWhXbUd0eB5oSMzmtkN1JyEzET3s8w01K W1RvLigr26T1hVOvGD6V7YB00s/RBx4CVoJmhdXJvH8HXQ/igiKm5NSnidlO4Ex4Z+3l fC/Sul2cVoMiLTSiW8E5p2h+77F6XywbeKTmjmg5e2EUWLC/dxuFKEuEunuIq79TA+St r3hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084814; x=1698689614; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ll1AHH/tNyWuM8OWYdUz/S/zYn03mj8222BJRAroDbQ=; b=CJ7iJr/TRmUv/Sy+wO2wNNsjNcZH/V13zvUbm3wysButhC3VD/zxV4EyrXsIevAuvJ FN90bXVAFe03CHX3eAgYNI5xGet746eAj+jIsVla2bIs5abVAYeD7ZXM4AZ/lpf5rqS/ d5pvWKV26JgxVaw+Mttzipnmh41/jHJYy42WMR9wyT1mgWTmpsSrdAYKy6+0nhe9G/v/ Y/eZH/JsZ9iOZMEn8ujCo90lSVLBpbEfMw30zvK9DhAZ39Iyw4HLBkps1pMWjoeGFZJk J7375p7coUHT2sQoWJ+koKlCTcyvrRiZ1X3ert1H4u88NrD66Iw5KBVqoNiyZT3hgJ0B bw2g== X-Gm-Message-State: AOJu0Yy97Fx+Fz0QCwdWS0DkT6c1FOVlVJGgPkUoA5CwepkiCyunnosI ES988kv2Xn68xRjCQaZjnQRq1ykm4y8I/6eYYA0= X-Google-Smtp-Source: AGHT+IFi1ZMr2HXhQHCpALqu+SOt0uQpXyGGBmHs6mHL+1QibLOI4ZUV/lbxIDKwrWjeMXnKDBSL+A== X-Received: by 2002:a05:6358:3517:b0:168:ba46:d9dd with SMTP id m23-20020a056358351700b00168ba46d9ddmr8966192rwd.17.1698084814586; Mon, 23 Oct 2023 11:13:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 04/38] tcg/ppc: Use ADDPCIS in tcg_out_tb_start Date: Mon, 23 Oct 2023 11:12:55 -0700 Message-Id: <20231023181329.171490-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c35; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085123541100004 Content-Type: text/plain; charset="utf-8" With ISA v3.0, we can use ADDPCIS instead of BCL+MFLR to load NIA. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index aafbf2db4e..b0b8cd2390 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -362,6 +362,7 @@ static bool tcg_target_const_match(int64_t val, TCGType= type, int ct, int vece) #define CRNAND XO19(225) #define CROR XO19(449) #define CRNOR XO19( 33) +#define ADDPCIS XO19( 2) =20 #define EXTSB XO31(954) #define EXTSH XO31(922) @@ -859,6 +860,19 @@ static inline void tcg_out_sari64(TCGContext *s, TCGRe= g dst, TCGReg src, int c) tcg_out32(s, SRADI | RA(dst) | RS(src) | SH(c & 0x1f) | ((c >> 4) & 2)= ); } =20 +static void tcg_out_addpcis(TCGContext *s, TCGReg dst, intptr_t imm) +{ + uint32_t d0, d1, d2; + + tcg_debug_assert((imm & 0xffff) =3D=3D 0); + tcg_debug_assert(imm =3D=3D (int32_t)imm); + + d2 =3D extract32(imm, 16, 1); + d1 =3D extract32(imm, 17, 5); + d0 =3D extract32(imm, 22, 10); + tcg_out32(s, ADDPCIS | RT(dst) | (d1 << 16) | (d0 << 6) | d2); +} + static void tcg_out_bswap16(TCGContext *s, TCGReg dst, TCGReg src, int fla= gs) { TCGReg tmp =3D dst =3D=3D src ? TCG_REG_R0 : dst; @@ -2534,9 +2548,14 @@ static void tcg_out_tb_start(TCGContext *s) { /* Load TCG_REG_TB. */ if (USE_REG_TB) { - /* bcl 20,31,$+4 (preferred form for getting nia) */ - tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK); - tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR); + if (have_isa_3_00) { + /* lnia REG_TB */ + tcg_out_addpcis(s, TCG_REG_TB, 0); + } else { + /* bcl 20,31,$+4 (preferred form for getting nia) */ + tcg_out32(s, BC | BO_ALWAYS | BI(7, CR_SO) | 0x4 | LK); + tcg_out32(s, MFSPR | RT(TCG_REG_TB) | LR); + } } } =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085013; cv=none; d=zohomail.com; s=zohoarc; b=DNc8XKf7A9EigVjNi2otS5fKmvgJbnIEAksJdiD1q2iyP9HmNQ+Ycm1Rw/d/uK1Riwlgup3fAQ/lm79S6SIbczCLp2qBCwBewkYDcJzajqcacR3ve0dCo1KG3Iy2QbwZKzxM8w8cIJAm/4nW9DmQLndYyZ+HuIfPeqKOudwpLDI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085013; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=kj+TKk2K3WfpkaNPPr/v3KoLmzqb4EREhy9sjMrwx20=; b=dwAMufA2H4HE3Ch9YM5saFp6d3eEVNdT3FAyEf6ssezbg6y1juj+PugDJ/VH3LYpRYJCOq9FB9wTXy3SPMr8/r/OLNzCGoMNlLy3f6dSt/s/flZy3zKaGmm0gOoMFMI2FlsE6q+axqNGo/qXy7py/2+nYnkKJ7NTGRir3UxXFyk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085013847121.7368675505171; Mon, 23 Oct 2023 11:16:53 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzQy-0005X8-4O; Mon, 23 Oct 2023 14:13:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQs-0005UN-DL for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:42 -0400 Received: from mail-oo1-xc2b.google.com ([2607:f8b0:4864:20::c2b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQm-00085H-Cq for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:41 -0400 Received: by mail-oo1-xc2b.google.com with SMTP id 006d021491bc7-5842c251d7cso1760757eaf.1 for ; Mon, 23 Oct 2023 11:13:36 -0700 (PDT) Received: from stoup.. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2b; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085015136100006 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index b0b8cd2390..226b5598ac 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1055,6 +1055,19 @@ static void tcg_out_movi_int(TCGContext *s, TCGType = type, TCGReg ret, return; } =20 + /* Load addresses within 2GB with 2 insns. */ + if (have_isa_3_00) { + intptr_t hi =3D tcg_pcrel_diff(s, (void *)arg) - 4; + int16_t lo =3D hi; + + hi -=3D lo; + if (hi =3D=3D (int32_t)hi) { + tcg_out_addpcis(s, TCG_REG_TMP2, hi); + tcg_out32(s, ADDI | TAI(ret, TCG_REG_TMP2, lo)); + return; + } + } + /* Load addresses within 2GB of TB with 2 (or rarely 3) insns. */ if (!in_prologue && USE_REG_TB && tb_diff =3D=3D (int32_t)tb_diff) { tcg_out_mem_long(s, ADDI, ADD, ret, TCG_REG_TB, tb_diff); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085126; cv=none; d=zohomail.com; s=zohoarc; b=HZplYDPOcMSGvk13ZSPFZOCBtY54cR7hPYCBXlIVtdwqLwZuhhwN3HSy1RzW0Mckf9lfO5bKwPWRhNlzd/GFQF/H4ddnPOjp1NW7Afmwcp8BncV6PwQPTYLzPMwCEt6O6DrJYMjoVsy8lXoqjNrQF1c5XxW5ODCq81YWp/tTiL4= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::135; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085127625100002 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 226b5598ac..720f92ff33 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1081,6 +1081,12 @@ static void tcg_out_movi_int(TCGContext *s, TCGType = type, TCGReg ret, tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0)); return; } + if (have_isa_3_00) { + tcg_out_addpcis(s, TCG_REG_TMP2, 0); + new_pool_label(s, arg, R_PPC_REL14, s->code_ptr, 0); + tcg_out32(s, LD | TAI(ret, TCG_REG_TMP2, 0)); + return; + } =20 tmp =3D arg >> 31 >> 1; tcg_out_movi(s, TCG_TYPE_I32, ret, tmp); @@ -1138,6 +1144,10 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType = type, unsigned vece, if (USE_REG_TB) { rel =3D R_PPC_ADDR16; add =3D ppc_tbrel_diff(s, NULL); + } else if (have_isa_3_00) { + tcg_out_addpcis(s, TCG_REG_TMP1, 0); + rel =3D R_PPC_REL14; + add =3D 0; } else { rel =3D R_PPC_ADDR32; add =3D 0; @@ -1164,6 +1174,8 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType t= ype, unsigned vece, if (USE_REG_TB) { tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, 0, 0)); load_insn |=3D RA(TCG_REG_TB); + } else if (have_isa_3_00) { + tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, 0)); } else { tcg_out32(s, ADDIS | TAI(TCG_REG_TMP1, 0, 0)); tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, 0)); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::12a; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085033168100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 720f92ff33..6337b1e8be 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2593,6 +2593,7 @@ static void tcg_out_exit_tb(TCGContext *s, uintptr_t = arg) static void tcg_out_goto_tb(TCGContext *s, int which) { uintptr_t ptr =3D get_jmp_target_addr(s, which); + int16_t lo; =20 /* Direct branch will be patched by tb_target_set_jmp_target. */ set_jmp_insn_offset(s, which); @@ -2602,9 +2603,15 @@ static void tcg_out_goto_tb(TCGContext *s, int which) if (USE_REG_TB) { ptrdiff_t offset =3D ppc_tbrel_diff(s, (void *)ptr); tcg_out_mem_long(s, LD, LDX, TCG_REG_TMP1, TCG_REG_TB, offset); + } else if (have_isa_3_00) { + ptrdiff_t offset =3D tcg_pcrel_diff(s, (void *)ptr) - 4; + lo =3D offset; + tcg_out_addpcis(s, TCG_REG_TMP1, offset - lo); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, lo); } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, ptr - (int16_t)ptr); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, (int16_t)p= tr); + lo =3D ptr; + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP1, ptr - lo); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, lo); } =20 tcg_out32(s, MTSPR | RS(TCG_REG_TMP1) | CTR); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084818; x=1698689618; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IcT+t2NWvvAgl7ag7U9fcr97JnnF4drB4JEVTRDmT40=; b=mQkW5tIj3yWQgjTi6C0WcCpCINt/dwAoqOEYlN4ID+EapZBwBhZMFty8iekGzZyory tCV66mSb2nmFBgLg1sdZe9hb1Jn5OEizVlP/wfibCvEE4GaWYOonTkUoQfbHz3j/VSi9 fVZGGJbzzMyFTgfDCyM6TIYVEbWMD1jf9zGjmf6CDViEyVlO1koEJxM3yeOwkhZY0GHH 7xJ/KbC/ghfkT3s0mwIqi8ciSKU4YUerhQr7lzc9lFKLJH0gsXtCKRnEpS+Ox4s9RPar rY2N/j6p2s0tSLM9SKLYUggCgVleJqOkdKykYltVDPF20sDoxkpJMdyaYvXbSnYicG2M +g/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084818; x=1698689618; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IcT+t2NWvvAgl7ag7U9fcr97JnnF4drB4JEVTRDmT40=; b=wXpAHVSnj3p/GGsGGgAUEHqRMdhEPLiBDlnB6YZ7GSkIzPVCl0P8cT36epqStCv6xA 8x7q4TCe7CsUiGCIw1ZGo4BdF1QCaQVzblHmoCmhX0ZGjYtLWlHkXwLanX41pgZhJO9c ZRroJJC0xrwpIZDd5fMTqwHRHHRsYfHeB5Q/Y8H98TdlX7cMlVBgwuPuZiLRlCHqVaXb IRNEnMDAS4fSf8GFp9u9A8DosMG/1ya/7PqhL6t2nhFJ+htdpMjlltWYdiwbACYupiHG CW2XNIs1mC6fa5+5CNfXmlbsdCyr3zGnsAZ4TZhCNyVtN2WAVjE+jnoirDwBAhS54nbk XYtg== X-Gm-Message-State: AOJu0YyV7lD9Ikj2EgZYUuh1eBGrlN8ULaNOtSiioS4z2nSF5QuHLb/s on8gVhCdbFaPSghUVtOdu0VxzbjvuPlkJqYrVN8= X-Google-Smtp-Source: AGHT+IG0Drd2MMEtgAcNjrQHIZwLI2zOeB4cogpvZf0p5VR/Ovfolsy76o8TReHSCktrbocPEoqwpw== X-Received: by 2002:a05:6358:810c:b0:168:d6cd:7b2e with SMTP id p12-20020a056358810c00b00168d6cd7b2emr5661037rwk.29.1698084817955; Mon, 23 Oct 2023 11:13:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Jordan Niethe Subject: [PULL v3 08/38] tcg/ppc: Use PADDI in tcg_out_movi Date: Mon, 23 Oct 2023 11:12:59 -0700 Message-Id: <20231023181329.171490-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2b; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085117552100002 Content-Type: text/plain; charset="utf-8" PADDI can load 34-bit immediates and 34-bit pc-relative addresses. Reviewed-by: Jordan Niethe Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 51 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 6337b1e8be..f4235383c6 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -719,6 +719,38 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int t= ype, return true; } =20 +/* Ensure that the prefixed instruction does not cross a 64-byte boundary.= */ +static bool tcg_out_need_prefix_align(TCGContext *s) +{ + return ((uintptr_t)s->code_ptr & 0x3f) =3D=3D 0x3c; +} + +static void tcg_out_prefix_align(TCGContext *s) +{ + if (tcg_out_need_prefix_align(s)) { + tcg_out32(s, NOP); + } +} + +static ptrdiff_t tcg_pcrel_diff_for_prefix(TCGContext *s, const void *targ= et) +{ + return tcg_pcrel_diff(s, target) - (tcg_out_need_prefix_align(s) ? 4 := 0); +} + +/* Output Type 10 Prefix - Modified Load/Store Form (MLS:D) */ +static void tcg_out_mls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, + unsigned ra, tcg_target_long imm, bool r) +{ + tcg_insn_unit p, i; + + p =3D OPCD(1) | (2 << 24) | (r << 20) | ((imm >> 16) & 0x3ffff); + i =3D opc | TAI(rt, ra, imm); + + tcg_out_prefix_align(s); + tcg_out32(s, p); + tcg_out32(s, i); +} + static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, TCGReg base, tcg_target_long offset); =20 @@ -1017,6 +1049,25 @@ static void tcg_out_movi_int(TCGContext *s, TCGType = type, TCGReg ret, return; } =20 + /* + * Load values up to 34 bits, and pc-relative addresses, + * with one prefixed insn. + */ + if (have_isa_3_10) { + if (arg =3D=3D sextract64(arg, 0, 34)) { + /* pli ret,value =3D paddi ret,0,value,0 */ + tcg_out_mls_d(s, ADDI, ret, 0, arg, 0); + return; + } + + tmp =3D tcg_pcrel_diff_for_prefix(s, (void *)arg); + if (tmp =3D=3D sextract64(tmp, 0, 34)) { + /* pla ret,value =3D paddi ret,0,value,1 */ + tcg_out_mls_d(s, ADDI, ret, 0, tmp, 1); + return; + } + } + /* Load 32-bit immediates with two insns. Note that we've already eliminated bare ADDIS, so we know both insns are required. */ if (TCG_TARGET_REG_BITS =3D=3D 32 || arg =3D=3D (int32_t)arg) { --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085043; cv=none; d=zohomail.com; s=zohoarc; b=oLK/PdiDaeIVXuIFpaaUTA6lcpTo9VF3tMoRK+7V6ipdO5sR1N9PuNqyhLAuuFr2n12jo33YEjy+czZVvq2liR1BPysV0EPDDR6KzQc2iqVGuRYGuphCW0wJxqHxoSCe1yzqgeChryts7a0GFgzmpIA6vXbrTE/+C7TFxhu+04Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085043; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=CnIEHz3YbyZLNAezqFGknAR6TwEjyjNQhE5DMYmjFw8=; b=RUmYfZ3qaTPln2NTm9dkHUv48kdeYxrhoNESuyaka58FL05jcki5tBSOxweOUZNlofjr85KI3FUGXHlWA+WQYn6bfxd+TCIYoyKbfevXLsOVb9EdgodNEexXHY8h0S9RCNlAfPLpUgJwElJnEiUsGKcjQrNOt6860La4R+vR8yU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085043478222.94409034011028; Mon, 23 Oct 2023 11:17:23 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzQw-0005WT-FG; Mon, 23 Oct 2023 14:13:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQv-0005Ve-3M for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:45 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQq-00085j-4H for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:44 -0400 Received: by mail-pg1-x52f.google.com with SMTP id 41be03b00d2f7-564b6276941so2818456a12.3 for ; Mon, 23 Oct 2023 11:13:39 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084819; x=1698689619; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CnIEHz3YbyZLNAezqFGknAR6TwEjyjNQhE5DMYmjFw8=; b=ScwISToGSRjtHeh2hnmZ5HHNKpOhBJkM31Yqfv5Jt6Ig/6nPR7Xe1pCK+5ARc0OGNY veADuNnB7VLi4i1vq9ERnBTlWMG6nL7SWiyclPgMf9j1ND7aNjH9/zu6GYYV+mdsM/A1 w04DNFouMmwzNlycuqCQkG48ZkpTRty2cDO73v9lDgaOcHcGYBoj9lqI2BAHq5cpK4M/ 01mTMEefTiYvDRCUZ8uNDobU4SNbofg3NQrPnu3/5UQY0Rozi/4F9aNKieg5yWxs0G+6 deHycCo8IOTuHfWyKBtflhV1X2pqQTUY+H7TRiZYiN3OU9DMTqOvuL/YIN0XXERuGp6r 1prw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084819; x=1698689619; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CnIEHz3YbyZLNAezqFGknAR6TwEjyjNQhE5DMYmjFw8=; b=vb9i9tMJxDzwU5kpm8KfikvxUbg/Ab6ovmEMRF9n2FVnomGpOguP6+cbxWAXA9RikD 51AoK0/CiZJnmdDJ7x4FbYwAeUxhM4wGGtV3/HYNpNTMbLhWJ2exnyDTKlhiwxKrX550 NXr8QRx4+HELxmMs/rrB+qSGR1kQoGrWkK7+V2oR0Qg9+kY2vozsus71lV1E02YzsdqT 9BkX2LBARQTySDyuUGKRaA5rxeBBarlpALj/QaeejF/Lsc9j/fFOn1D4bNQ6MgVNutkH 8m9SJ+Gu8cP07Eo1e2HRkXIWteUszdOTOqYK4PDPuHw8us32IooPDx3h1QBSJR31GZjK tCiQ== X-Gm-Message-State: AOJu0YzSC+q+2UzLM340K99eT4G426YeqR1dU9xY6MkGnxLHA6P2FBuv G0p5Q1MyFw1RqNzpdi89MbD1UK0t25l81zccAr0= X-Google-Smtp-Source: AGHT+IHaB+6XIZrrpT1MSB6sasiAdzajC6P8p8WBAhDn0Pi2znVzIx4RCvdD0NhfzZ4L3eewn6WHqg== X-Received: by 2002:a05:6a20:da88:b0:17e:2afd:407f with SMTP id iy8-20020a056a20da8800b0017e2afd407fmr499358pzb.9.1698084818831; Mon, 23 Oct 2023 11:13:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Jordan Niethe Subject: [PULL v3 09/38] tcg/ppc: Use prefixed instructions in tcg_out_mem_long Date: Mon, 23 Oct 2023 11:13:00 -0700 Message-Id: <20231023181329.171490-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085045210100003 Content-Type: text/plain; charset="utf-8" When the offset is out of range of the non-prefixed insn, but fits the 34-bit immediate of the prefixed insn, use that. Reviewed-by: Jordan Niethe Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 66 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index f4235383c6..34df9144cc 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -329,6 +329,15 @@ static bool tcg_target_const_match(int64_t val, TCGTyp= e type, int ct, int vece) #define STDX XO31(149) #define STQ XO62( 2) =20 +#define PLWA OPCD( 41) +#define PLD OPCD( 57) +#define PLXSD OPCD( 42) +#define PLXV OPCD(25 * 2 + 1) /* force tx=3D1 */ + +#define PSTD OPCD( 61) +#define PSTXSD OPCD( 46) +#define PSTXV OPCD(27 * 2 + 1) /* force sx=3D1 */ + #define ADDIC OPCD( 12) #define ADDI OPCD( 14) #define ADDIS OPCD( 15) @@ -737,6 +746,20 @@ static ptrdiff_t tcg_pcrel_diff_for_prefix(TCGContext = *s, const void *target) return tcg_pcrel_diff(s, target) - (tcg_out_need_prefix_align(s) ? 4 := 0); } =20 +/* Output Type 00 Prefix - 8-Byte Load/Store Form (8LS:D) */ +static void tcg_out_8ls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, + unsigned ra, tcg_target_long imm, bool r) +{ + tcg_insn_unit p, i; + + p =3D OPCD(1) | (r << 20) | ((imm >> 16) & 0x3ffff); + i =3D opc | TAI(rt, ra, imm); + + tcg_out_prefix_align(s); + tcg_out32(s, p); + tcg_out32(s, i); +} + /* Output Type 10 Prefix - Modified Load/Store Form (MLS:D) */ static void tcg_out_mls_d(TCGContext *s, tcg_insn_unit opc, unsigned rt, unsigned ra, tcg_target_long imm, bool r) @@ -1418,6 +1441,49 @@ static void tcg_out_mem_long(TCGContext *s, int opi,= int opx, TCGReg rt, break; } =20 + /* For unaligned or large offsets, use the prefixed form. */ + if (have_isa_3_10 + && (offset !=3D (int16_t)offset || (offset & align)) + && offset =3D=3D sextract64(offset, 0, 34)) { + /* + * Note that the MLS:D insns retain their un-prefixed opcode, + * while the 8LS:D insns use a different opcode space. + */ + switch (opi) { + case LBZ: + case LHZ: + case LHA: + case LWZ: + case STB: + case STH: + case STW: + case ADDI: + tcg_out_mls_d(s, opi, rt, base, offset, 0); + return; + case LWA: + tcg_out_8ls_d(s, PLWA, rt, base, offset, 0); + return; + case LD: + tcg_out_8ls_d(s, PLD, rt, base, offset, 0); + return; + case STD: + tcg_out_8ls_d(s, PSTD, rt, base, offset, 0); + return; + case LXSD: + tcg_out_8ls_d(s, PLXSD, rt & 31, base, offset, 0); + return; + case STXSD: + tcg_out_8ls_d(s, PSTXSD, rt & 31, base, offset, 0); + return; + case LXV: + tcg_out_8ls_d(s, PLXV, rt & 31, base, offset, 0); + return; + case STXV: + tcg_out_8ls_d(s, PSTXV, rt & 31, base, offset, 0); + return; + } + } + /* For unaligned, or very large offsets, use the indexed form. */ if (offset & align || offset !=3D (int32_t)offset || opi =3D=3D 0) { if (rs =3D=3D base) { --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085017; cv=none; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084819; x=1698689619; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=4gXGK6fIVAMAIDlPSRafHxXOFGChnJBeeF+QM2JUpio=; b=QKMmiCplK/iJXS1XYv4o+C3ELvZmOsait1wOf3MykKISkFtO8GEMpp1b7FPcSp40LI 6IHkgSIfGwdfzyNuypLWjT73y5ToTUo4wr1ZNpzDrr9rhvhjM0VBXzxQSUESa5xPacDn v1SmRiph9W/NuhMLlenkMbJg1K1x7Pf+MJ7P6GSTCW93BS9C+IhgHcfv+YuPG8YdEbRy Hkwj+pb4t3oShSiwBvoG4+mq/pTKBnOdRyugfFeQPNC+lfyvFuXyv96C0VpkUSiVwglY 2x3FC4PBMnQyv5W2MW+ODJ0ek1FW8jl1E55tPSMr61CUHXZPPn7DLjGR5rsGj9WWRMYj F5Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084819; x=1698689619; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4gXGK6fIVAMAIDlPSRafHxXOFGChnJBeeF+QM2JUpio=; b=EJlDCWHuRrOw/RqAVD2w4WVuhHli4LKDJIpAJtpHx9SdV8KtZF19lmSpQiBS1GsRgA RuZeOidkwDQi05Zy3XSk9SmRzI8fwAI3sA4GWS/GDgilAfUPp8c7vnWSCHQTpMie//Fh nVp4R3cZ/YnoPHOl8JpIm95fpDrxTSWK/7+wnq7uktdy9vMi5xS0vcSF62JiLdJE1BNv BrlW0BZitLYJlB51iCxPPeTow4AyHXdMIz0n+ZsVYzO7sS39Qj0HcPGa2Xe4tq0+uybm Iauq0Y/RMjoUfQI5xWAkeysgXAe4Fbmnlk68ezNHqABx8JLYxWciyBdOtJ2cE25mc6FR MBtw== X-Gm-Message-State: AOJu0Yy13vvblHKRvCN1RWePMRdEtcGwRQ5w5nhmkysnwzLEE6wrmYnf mlhVwugLxf+Nnr3ZTV1IFwXSinC0BV4SqbCVm3s= X-Google-Smtp-Source: AGHT+IHu7H7AF2zbNA9/8Nm0dfuNGqDph1laLiCCd9f4gJ2Z1bbkoZlHcTw9+nsqzI5cOWSaj7t1FA== X-Received: by 2002:a62:f246:0:b0:691:27b:15b4 with SMTP id y6-20020a62f246000000b00691027b15b4mr16940176pfl.5.1698084819628; Mon, 23 Oct 2023 11:13:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 10/38] tcg/ppc: Use PLD in tcg_out_movi for constant pool Date: Mon, 23 Oct 2023 11:13:01 -0700 Message-Id: <20231023181329.171490-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085019106100018 Content-Type: text/plain; charset="utf-8" The prefixed instruction has a pc-relative form to use here. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 34df9144cc..79e82d2f94 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -101,6 +101,10 @@ #define ALL_GENERAL_REGS 0xffffffffu #define ALL_VECTOR_REGS 0xffffffff00000000ull =20 +#ifndef R_PPC64_PCREL34 +#define R_PPC64_PCREL34 132 +#endif + #define have_isel (cpuinfo & CPUINFO_ISEL) =20 #ifndef CONFIG_SOFTMMU @@ -266,6 +270,19 @@ static bool reloc_pc14(tcg_insn_unit *src_rw, const tc= g_insn_unit *target) return false; } =20 +static bool reloc_pc34(tcg_insn_unit *src_rw, const tcg_insn_unit *target) +{ + const tcg_insn_unit *src_rx =3D tcg_splitwx_to_rx(src_rw); + ptrdiff_t disp =3D tcg_ptr_byte_diff(target, src_rx); + + if (disp =3D=3D sextract64(disp, 0, 34)) { + src_rw[0] =3D (src_rw[0] & ~0x3ffff) | ((disp >> 16) & 0x3ffff); + src_rw[1] =3D (src_rw[1] & ~0xffff) | (disp & 0xffff); + return true; + } + return false; +} + /* test if a constant matches the constraint */ static bool tcg_target_const_match(int64_t val, TCGType type, int ct, int = vece) { @@ -696,6 +713,8 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int ty= pe, return reloc_pc14(code_ptr, target); case R_PPC_REL24: return reloc_pc24(code_ptr, target); + case R_PPC64_PCREL34: + return reloc_pc34(code_ptr, target); case R_PPC_ADDR16: /* * We are (slightly) abusing this relocation type. In particular, @@ -1155,6 +1174,11 @@ static void tcg_out_movi_int(TCGContext *s, TCGType = type, TCGReg ret, tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0)); return; } + if (have_isa_3_10) { + tcg_out_8ls_d(s, PLD, ret, 0, 0, 1); + new_pool_label(s, arg, R_PPC64_PCREL34, s->code_ptr - 2, 0); + return; + } if (have_isa_3_00) { tcg_out_addpcis(s, TCG_REG_TMP2, 0); new_pool_label(s, arg, R_PPC_REL14, s->code_ptr, 0); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085122; cv=none; d=zohomail.com; s=zohoarc; b=Ly3jG80O9Tet2HYcQvezRqybkidP0ADX4d4yBwJ3+L3B2Q4DJxNs+5N0x9jiNlWcOjyu6JtpFLz+JYv08fRCtv04W+7boyEJ+dqfjjmwARPPA8WfbIr1uSlGCyIlBSZYwuyjiVShwBxDTq5lGkuGp3WvzUE7dgXoO7cZySXauXc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085122; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=eJDwvSu5y6aQI1FUpLq82z/uiGp428KQX4VVdh13eIw=; b=fQ/CTR1CSUPXHkO2/rPVCG9qX4aKWj6CGxS0jsXA1CoLixzQ2dJyvRtBcC+v80kUH3V9XD7VCIwmHYoii14w6AlSaxWqFCWJlVh2/T4RgaqsRC3hBJbl+nRhV7XipSBc3jZVW8RODClRj4Arr6uwAA/HP7ZAIKwktqxnVjABXlE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085122856769.6655964189039; Mon, 23 Oct 2023 11:18:42 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzQy-0005X7-40; Mon, 23 Oct 2023 14:13:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQw-0005Wo-Rt for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:46 -0400 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQs-00087Z-6B for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:46 -0400 Received: by mail-pf1-x431.google.com with SMTP id d2e1a72fcca58-6b44befac59so3379131b3a.0 for ; Mon, 23 Oct 2023 11:13:41 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084820; x=1698689620; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=eJDwvSu5y6aQI1FUpLq82z/uiGp428KQX4VVdh13eIw=; b=H+XHAD7gxLwoPx27mxzQf3mtryZs+gXiGf2F39aXqpMBeFwqbwPDYBRLhTpyasWrKN dOtmA72Q//PBXgu+I5mdV3Xxr4n26h2wLsDUjjRrH7x1CCKR3xtDQGlAtXaBGupKGRM3 J1xMhgzItaLU0Tsp3nIcK535DaoBjE4EZustQ4aSzwySo6aBf9gNVUyyQNGhoVFiUhJp p4yS7ES4jV6fLZXIOtJoYvm1xht+aOZUvExIjtRG1IDFxvpGSzN2cP7iatGLvd+V6OR4 JSG30X22z2CpPRTXWkrAhIdB2VJhCUJq5JIFA0SsotK4RIDSEzxz7erkJDJXfmSA1jF0 ZPqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084820; x=1698689620; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eJDwvSu5y6aQI1FUpLq82z/uiGp428KQX4VVdh13eIw=; b=JtA7Dasg8bdm4Ig5ggoy78uySmDwRjUcHv6wjta+33lESgwL880x9A77l2TCs6LRAL S5Ml55PWR8Nxbvowkyk54Vz0TEI1XzeAWodIiB7+t5roY4tVu3+VikBju7Q7+35TGM1c 7n2h8RFYeZ0tdSbzbFK2/m0C7b7q3DHtfvhyc/grIQFsBb+A8yWODH/xplMmixql6ej9 TngoPodM7AhQ+ShJqnu4uaf4II6p28tAvHdhJPrMw1KKmVvyQKlVJF6k8325vVWDMXCL aoBVrKbeafYpsin/IUst6/dmGJkYyO1gIO1vE/Rfxqfhr/nCWkhl9JgByTmgJnLdtcA7 DjMQ== X-Gm-Message-State: AOJu0YxSdjV5Brps5bbuN6GB5W/Cz65RpAmqUSw/rR3ILE/cDLm9Uejx SyBW8MbO0itnnmLxCcC1noHWpQq4eadbn9HTNfs= X-Google-Smtp-Source: AGHT+IFEROEHi84p+qMgpdj18Zkntr0M7ypDRx1IOf8cn5vxLX7DdKwvh56yne/76UhKqZvXLuk08w== X-Received: by 2002:a05:6a00:35cd:b0:6b1:5d1a:bd0c with SMTP id dc13-20020a056a0035cd00b006b15d1abd0cmr17804558pfb.16.1698084820431; Mon, 23 Oct 2023 11:13:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 11/38] tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec Date: Mon, 23 Oct 2023 11:13:02 -0700 Message-Id: <20231023181329.171490-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085123517100003 Content-Type: text/plain; charset="utf-8" The prefixed instructions have a pc-relative form to use here. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 79e82d2f94..db3212083b 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1242,6 +1242,15 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType = type, unsigned vece, if (USE_REG_TB) { rel =3D R_PPC_ADDR16; add =3D ppc_tbrel_diff(s, NULL); + } else if (have_isa_3_10) { + if (type =3D=3D TCG_TYPE_V64) { + tcg_out_8ls_d(s, PLXSD, ret & 31, 0, 0, 1); + new_pool_label(s, val, R_PPC64_PCREL34, s->code_ptr - 2, 0); + } else { + tcg_out_8ls_d(s, PLXV, ret & 31, 0, 0, 1); + new_pool_l2(s, R_PPC64_PCREL34, s->code_ptr - 2, 0, val, val); + } + return; } else if (have_isa_3_00) { tcg_out_addpcis(s, TCG_REG_TMP1, 0); rel =3D R_PPC_REL14; --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084979; cv=none; d=zohomail.com; s=zohoarc; b=RHh96YCDm3ZchB6XSgtgirLY6nHuC26QuM0nUtiwRGAzR/eALtRM0juZzgZfLUGnGf02DfTVaitQczvp8CvwA+h1P5eSt+OaWCZe3Tn4EbfQY+e40aGbkQ5xtgpSORWCdyEANXFodOxzBgZaGy0K849qXGTxXKZu7lp3oNS8qpk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084979; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=6Sq2XuaUgq1WVJLtCb9vCiBQv+e4IAv+CN8pWqHj0rc=; b=Qxi0x94AtI+zca50pU6QcSbyXVoy5R6+6H9EORjy+c+u8qO2Jr8jCVyNecoSnTV8qfmjK1H9WJM9/WwFtymFoxq+ayFijJ4qvBkWwGz4ugsqX+3XBDqP/bGlSW4bHW/NYIUtVGtmhW06s4APcZHZqfwsePpYRb6Cj69VZgsRtUc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084979022541.6796183601477; Mon, 23 Oct 2023 11:16:19 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzQw-0005Wp-WD; Mon, 23 Oct 2023 14:13:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQw-0005WP-Am for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:46 -0400 Received: from mail-oo1-xc29.google.com ([2607:f8b0:4864:20::c29]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQt-00088I-4Z for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:46 -0400 Received: by mail-oo1-xc29.google.com with SMTP id 006d021491bc7-581b6b93bd1so2157588eaf.1 for ; Mon, 23 Oct 2023 11:13:42 -0700 (PDT) Received: from stoup.. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c29; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc29.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084981071100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index db3212083b..6496f76e41 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2753,6 +2753,9 @@ static void tcg_out_goto_tb(TCGContext *s, int which) if (USE_REG_TB) { ptrdiff_t offset =3D ppc_tbrel_diff(s, (void *)ptr); tcg_out_mem_long(s, LD, LDX, TCG_REG_TMP1, TCG_REG_TB, offset); + } else if (have_isa_3_10) { + ptrdiff_t offset =3D tcg_pcrel_diff_for_prefix(s, (void *)ptr); + tcg_out_8ls_d(s, PLD, TCG_REG_TMP1, 0, offset, 1); } else if (have_isa_3_00) { ptrdiff_t offset =3D tcg_pcrel_diff(s, (void *)ptr) - 4; lo =3D offset; --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084966; cv=none; d=zohomail.com; s=zohoarc; b=bUlFe3j57PZZ4gDiesKOHt0Z/JtoQ0K/kFid3UKo351EYXALTrpHqgb6epzIRlZDsxWcHgSIQ50nQR+qjB875Fxx90hQp8tLMeQD86Ml50jJDySnY2Nmb34TTDoHLmyO7oodrVhlqwm6N+3vh+BW3nO5Sl7LyDZuStdm2b3M9Ko= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084966; 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Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 6496f76e41..c31da4da9d 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -83,7 +83,7 @@ #define TCG_VEC_TMP2 TCG_REG_V1 =20 #define TCG_REG_TB TCG_REG_R31 -#define USE_REG_TB (TCG_TARGET_REG_BITS =3D=3D 64) +#define USE_REG_TB (TCG_TARGET_REG_BITS =3D=3D 64 && !have_isa_3_00) =20 /* Shorthand for size of a pointer. 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084823; x=1698689623; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VXDCPRqwkNHEWZB52f+OeRGLQD3oaL6U6LhW5ET5dXA=; b=wIEsZnslbevgiZPW+B53hhSGs4BF7V+7425Qi69BAK91QkZfmF6t+Aks1QQG/QMT7+ cCBckyUCQUXmHD6Zn1GC8pBnfNnwYxIAdhLDaWMT6csTTjf8HyZq5PbmOwYLfzK9qTCl Sgw80RcZDfUBMK2LdI8/shry2B1vrJ7cyyPM2OgE+qkoymZdJj50LKOrVKqBLYSTcE6/ 5Js+4zYRKSv0IF9f2YLx2ujCxaw4B1E+br+smnAdla6nEdSexRLVfIVipmZoiH76HXKi gaLp/TeZtCuMqtEahgyJ+z4Kq+GH5OFpaEdlQzjxTPo6BwGRP//lbGW8YiLkOorIq2I1 S1AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084823; x=1698689623; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VXDCPRqwkNHEWZB52f+OeRGLQD3oaL6U6LhW5ET5dXA=; b=r8mk/aFgxm0HFUmVTL8B3w3vPEQRRFMTjLQBGFR4BjDwObBEjj/rwdg11zYTux3DoF +WqKGfLuwnObhRHDw9C/i9Qt7Yyqa4zowVksp9Ry8vugNiIrDS/RUNuY0/lS6Jfxbpcg BysYCSAmk26Rt8unYQazJW9ijuOZpQ2rNpHCrGKiGxyNG+bjr/NVgW5a/Qb/4eSoxv46 tiz2asbPs+4wNPxAipeH9Q+JxR4wvbnRL/2NwQkFMBBalccJjXJAa4GDuPqNU3xIq12y KPYAujNTdL4zcgZsnn4pAi3hN4E4OEbdAd4lNg1XiD5OxcuvBqjS8QIfDIeaCqzhTOm8 jIvA== X-Gm-Message-State: AOJu0Yz7fnWNK4PuCykT6UOQ/JLuJHrpH6UG6EeptylvcCSsh2tE1b2s lub4qCUqrq+xJK1QxyPtTzohIyXWON4TK2sL8/c= X-Google-Smtp-Source: AGHT+IEHFaNk/DjXY9GlUMZFPOOkkclO2gV4/qpKyWHCo3TQEWVrHB0zVhKFCXvgm3AX2cor6IPAww== X-Received: by 2002:a05:6a00:1881:b0:691:2d4:23b2 with SMTP id x1-20020a056a00188100b0069102d423b2mr8381417pfh.15.1698084822865; Mon, 23 Oct 2023 11:13:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 14/38] tcg: Introduce tcg_use_softmmu Date: Mon, 23 Oct 2023 11:13:05 -0700 Message-Id: <20231023181329.171490-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085055317100003 Begin disconnecting CONFIG_SOFTMMU from !CONFIG_USER_ONLY. Introduce a variable which can be set at startup to select one method or another for user-only. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 8 ++++++-- tcg/tcg-op-ldst.c | 14 +++++++------- tcg/tcg.c | 9 ++++++--- 3 files changed, 19 insertions(+), 12 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 680ff00722..a9282cdcc6 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -488,11 +488,9 @@ struct TCGContext { int nb_ops; TCGType addr_type; /* TCG_TYPE_I32 or TCG_TYPE_I64 */ =20 -#ifdef CONFIG_SOFTMMU int page_mask; uint8_t page_bits; uint8_t tlb_dyn_max_bits; -#endif uint8_t insn_start_words; TCGBar guest_mo; =20 @@ -573,6 +571,12 @@ static inline bool temp_readonly(TCGTemp *ts) return ts->kind >=3D TEMP_FIXED; } =20 +#ifdef CONFIG_USER_ONLY +extern bool tcg_use_softmmu; +#else +#define tcg_use_softmmu true +#endif + extern __thread TCGContext *tcg_ctx; extern const void *tcg_code_gen_epilogue; extern uintptr_t tcg_splitwx_diff; diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index df4f22c427..2b96687699 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -34,13 +34,13 @@ =20 static void check_max_alignment(unsigned a_bits) { -#if defined(CONFIG_SOFTMMU) /* * The requested alignment cannot overlap the TLB flags. * FIXME: Must keep the count up-to-date with "exec/cpu-all.h". */ - tcg_debug_assert(a_bits + 5 <=3D tcg_ctx->page_bits); -#endif + if (tcg_use_softmmu) { + tcg_debug_assert(a_bits + 5 <=3D tcg_ctx->page_bits); + } } =20 static MemOp tcg_canonicalize_memop(MemOp op, bool is64, bool st) @@ -411,10 +411,11 @@ void tcg_gen_qemu_st_i64_chk(TCGv_i64 val, TCGTemp *a= ddr, TCGArg idx, */ static bool use_two_i64_for_i128(MemOp mop) { -#ifdef CONFIG_SOFTMMU /* Two softmmu tlb lookups is larger than one function call. */ - return false; -#else + if (tcg_use_softmmu) { + return false; + } + /* * For user-only, two 64-bit operations may well be smaller than a cal= l. * Determine if that would be legal for the requested atomicity. @@ -432,7 +433,6 @@ static bool use_two_i64_for_i128(MemOp mop) default: g_assert_not_reached(); } -#endif } =20 static void canonicalize_memop_i128_as_i64(MemOp ret[2], MemOp orig) diff --git a/tcg/tcg.c b/tcg/tcg.c index 637b9e6870..d3a4a17ef2 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -226,6 +226,10 @@ static TCGAtomAlign atom_and_align_for_opc(TCGContext = *s, MemOp opc, MemOp host_atom, bool allow_two= _ops) __attribute__((unused)); =20 +#ifdef CONFIG_USER_ONLY +bool tcg_use_softmmu; +#endif + TCGContext tcg_init_ctx; __thread TCGContext *tcg_ctx; =20 @@ -404,13 +408,12 @@ static uintptr_t G_GNUC_UNUSED get_jmp_target_addr(TC= GContext *s, int which) return (uintptr_t)tcg_splitwx_to_rx(&s->gen_tb->jmp_target_addr[which]= ); } =20 -#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER) -static int tlb_mask_table_ofs(TCGContext *s, int which) +static int __attribute__((unused)) +tlb_mask_table_ofs(TCGContext *s, int which) { return (offsetof(CPUNegativeOffsetState, tlb.f[which]) - sizeof(CPUNegativeOffsetState)); } -#endif =20 /* Signal overflow, starting over with fewer guest insns. */ static G_NORETURN --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084824; x=1698689624; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YGlbtLg90LV1uY25eQEYhNteHi+RQnuiWgmb0RTVS6Y=; b=yo8Quzg4fhJuqGKXoXmb1KcezsIoY1RzKzhroa4fEjgaq4+hMqVCRPo/yWV7ynNSkf baY8ylj3lHKvEqakH1dMeNlgl9N/olXGDbnSPRGUjVkpb1jG+4GqnTU6d21KJjZ/nXC0 Dn0wCFg3x7dSI5tP3uXT80yEDyKqoYyjpb8BmIRQqngq6BFjIgsUtxEDDfEnal1njXee 1bUBax1R95Nfn+23PT9re2YLvcthlTxwrVfM4uX7IW73t5EQJnRs5ABRjNYF+lgykIzr QciyrrF2Vunp1vvcqganwwmJNrFp9NF7SlFyjJsfi/0D2YKj2KPg1IAl4mEni15WEkBY kqSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084824; x=1698689624; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YGlbtLg90LV1uY25eQEYhNteHi+RQnuiWgmb0RTVS6Y=; b=LDP+pIWYSM9oUOlnZp+bJz8ek3JP/+BpEtQ+NgkWTmdBPyeehA1+O+OF2aaKWWCKg1 PAlg5rzDYXyRdbDRjarCGwSUzMR+qqTN+nCgoPhmFPBJ10ZVA6+mhjAHKCby2iZtyXhD xTGqNEgZZfpNwJBSqU+V0hi3eR5KSIIP0nftXIcvEqESCInBllFMOUqwM4HCSPv38EzL xsPuD/9hPFfcGr9JAwdnrKZPi6Kbk7A1EW5UAh33748H7IAdr6UCMF9ar/oUJFMj9ifM JLI2ees1xKJOiYQk9Ts57qEMtqdgwCoxXTbxFKyi8LUdO5qlprD5NVDTjF0+198irkIV gs+A== X-Gm-Message-State: AOJu0Yy+24Qrmq3XS++Z1VEvaXsSNbksgTTU3EYVsC0f9htvFfNyPgdY Bz7CrFdkvSOS5KGncfnbmAW1O6p4LabEU867OTE= X-Google-Smtp-Source: AGHT+IFJwRJBxvmeT8khxpUISFw1j4ggyiz84LH5BivBxeYSFVUMq+xmdJSVl6yzCKSYiEzVoep5hQ== X-Received: by 2002:a05:6a20:3956:b0:15d:c274:2eb1 with SMTP id r22-20020a056a20395600b0015dc2742eb1mr476907pzg.10.1698084823859; Mon, 23 Oct 2023 11:13:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 15/38] tcg: Provide guest_base fallback for system mode Date: Mon, 23 Oct 2023 11:13:06 -0700 Message-Id: <20231023181329.171490-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085013096100001 Provide a define to allow !tcg_use_softmmu code paths to compile in system mode, but require elimination. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index d3a4a17ef2..35158a0846 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -178,6 +178,10 @@ static bool tcg_target_const_match(int64_t val, TCGTyp= e type, int ct, int vece); static int tcg_out_ldst_finalize(TCGContext *s); #endif =20 +#ifndef CONFIG_USER_ONLY +#define guest_base ({ qemu_build_not_reached(); (uintptr_t)0; }) +#endif + typedef struct TCGLdstHelperParam { TCGReg (*ra_gen)(TCGContext *s, const TCGLabelQemuLdst *l, int arg_reg= ); unsigned ntmp; --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084859; cv=none; d=zohomail.com; s=zohoarc; b=LSGtgZ+UMowa2QTT/MwGaiAqLp5bIBbd4H6yC4OcSBBXoMTpg0Ksj6sBFn0FjkJ9lrpHuw+tynbXq7ENX+XSs4PYE1SoVpbrNCG/+12dPNRDzeAitVXQisNk2GRMRtk6NdjlwEHhrcPLb3/WCERuCsIn6v9SKAKsGw+uBZwV3Qg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084859; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Z5Y3YpkqSuB++PQnHqXwQCPjLyzdqqH8F+jPD48ZrG4=; b=D5Lz0m6H+8r6pU0b9Zhc/lXKRGJ1o39tgmZd7OpLFoRKFyv7j1L4AwlascPR+ATO1ezWzl++6Fkx/DFL2ujzXGan7SsfJ24CIK/MLDizuCQ2t1ofiObI+7KOkz5cFmIR6p/1z6GmQMYASqSUP9hWaJzZHRvOef/mm3HyNXLxQ7w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084859667676.0053129540393; Mon, 23 Oct 2023 11:14:19 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzR9-0005cq-Na; Mon, 23 Oct 2023 14:14:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQy-0005XE-FJ for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:48 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQw-0008AX-8M for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:48 -0400 Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6bd96cfb99cso2758396b3a.2 for ; Mon, 23 Oct 2023 11:13:45 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084825; x=1698689625; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z5Y3YpkqSuB++PQnHqXwQCPjLyzdqqH8F+jPD48ZrG4=; b=KSl/5A2X39xFAh5l8Zb1xCIFq3vaBnkR4+5+IzIWlIgXRXzphx68bCoHStU6iGXFs7 b0oNg106pKI2VRndYP1YaoKZBUDYguXmCHcdDd+tGghIsU4JQbxgpLd9gn2hzC6c2Xvl TeL0SFg4FAOa1F08rmTEhQBYSqPpsf5d7At8RloPTcmQRcEK+SWWDU5hudOk193Cb4nl Xk36gH0yq//SvjaaXiuyMXYBEmUv0j6/Mv9kkBuFKEvujmCHc2iPSS6Hr+M7P3Xi3T0T SM1YAkTdqHrxNt0+cZGmecGHy0FIKAlegJuC4tzgFGMKhytoda7kz2daRLcQg+VtF9Df +jCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084825; x=1698689625; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z5Y3YpkqSuB++PQnHqXwQCPjLyzdqqH8F+jPD48ZrG4=; b=IuzYWYARebp7XR9Is8eaOM6e0AMne+LY0mX5MsS31AK5/1aSmWUp22oZ6lU1wVDtIz SnYabhLqqwbKxPss9jhyDyVexxHxyaWNd89dQ9HjiEOqhuf4OgbUzR328GwuDzSdyHfO t/OSJ3QjILp65kw22Lf68iCjnCo2yMHsJzLU9vXV5sjdny64BKQO86gQXpqhtLPn3mTG EkHAtECQk2D8wzUtuud4nk3VXoHJMYWIGLdomiLFku0oovOmNARt/bIBhxCAsWyc3mmg nQMaOwgRXKh8Uzb4QOkKTZpIxas4UQRXppx6/9IB1iaEhQyQaAtVxSezYewYY4MrW46S BaHA== X-Gm-Message-State: AOJu0YzFtrmhtq6OrL4gpCdp+VCojte3ox3GgJOcAvLjj7rWLASu1yCy Ef7k3TNet+YBo2qGRpp3Aazg9EapsH36QRpi3Ns= X-Google-Smtp-Source: AGHT+IFcbHTweUJ4M+4Xaq9rxT9H5qAhe5kUq/8BV2UfK2jdn0GFrY7BcFYCmRxyli5wVMjKvH/4cQ== X-Received: by 2002:a05:6a21:7787:b0:171:c88a:8927 with SMTP id bd7-20020a056a21778700b00171c88a8927mr361584pzc.29.1698084824756; Mon, 23 Oct 2023 11:13:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 16/38] tcg/arm: Use tcg_use_softmmu Date: Mon, 23 Oct 2023 11:13:07 -0700 Message-Id: <20231023181329.171490-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084860667100003 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 203 +++++++++++++++++++-------------------- 1 file changed, 97 insertions(+), 106 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 0d9c2d157b..fc78566494 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -89,9 +89,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind = kind, int slot) =20 #define TCG_REG_TMP TCG_REG_R12 #define TCG_VEC_TMP TCG_REG_Q15 -#ifndef CONFIG_SOFTMMU #define TCG_REG_GUEST_BASE TCG_REG_R11 -#endif =20 typedef enum { COND_EQ =3D 0x0, @@ -356,14 +354,8 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int t= ype, * r0-r3 will be overwritten when reading the tlb entry (system-mode only); * r14 will be overwritten by the BLNE branching to the slow path. */ -#ifdef CONFIG_SOFTMMU #define ALL_QLDST_REGS \ - (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \ - (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \ - (1 << TCG_REG_R14))) -#else -#define ALL_QLDST_REGS (ALL_GENERAL_REGS & ~(1 << TCG_REG_R14)) -#endif + (ALL_GENERAL_REGS & ~((tcg_use_softmmu ? 0xf : 0) | (1 << TCG_REG_R14)= )) =20 /* * ARM immediates for ALU instructions are made of an unsigned 8-bit @@ -1387,113 +1379,115 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGCon= text *s, HostAddress *h, MemOp opc =3D get_memop(oi); unsigned a_mask; =20 -#ifdef CONFIG_SOFTMMU - *h =3D (HostAddress){ - .cond =3D COND_AL, - .base =3D addrlo, - .index =3D TCG_REG_R1, - .index_scratch =3D true, - }; -#else - *h =3D (HostAddress){ - .cond =3D COND_AL, - .base =3D addrlo, - .index =3D guest_base ? TCG_REG_GUEST_BASE : -1, - .index_scratch =3D false, - }; -#endif + if (tcg_use_softmmu) { + *h =3D (HostAddress){ + .cond =3D COND_AL, + .base =3D addrlo, + .index =3D TCG_REG_R1, + .index_scratch =3D true, + }; + } else { + *h =3D (HostAddress){ + .cond =3D COND_AL, + .base =3D addrlo, + .index =3D guest_base ? TCG_REG_GUEST_BASE : -1, + .index_scratch =3D false, + }; + } =20 h->aa =3D atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false); a_mask =3D (1 << h->aa.align) - 1; =20 -#ifdef CONFIG_SOFTMMU - int mem_index =3D get_mmuidx(oi); - int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write); - int fast_off =3D tlb_mask_table_ofs(s, mem_index); - unsigned s_mask =3D (1 << (opc & MO_SIZE)) - 1; - TCGReg t_addr; + if (tcg_use_softmmu) { + int mem_index =3D get_mmuidx(oi); + int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write); + int fast_off =3D tlb_mask_table_ofs(s, mem_index); + unsigned s_mask =3D (1 << (opc & MO_SIZE)) - 1; + TCGReg t_addr; =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addrlo; - ldst->addrhi_reg =3D addrhi; + ldst =3D new_ldst_label(s); + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addrlo; + ldst->addrhi_reg =3D addrhi; =20 - /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {r0,r1}. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 4); - tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_AREG0, fast_off); + /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {r0,r1}. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 4); + tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_AREG0, fast_off); =20 - /* Extract the tlb index from the address into R0. */ - tcg_out_dat_reg(s, COND_AL, ARITH_AND, TCG_REG_R0, TCG_REG_R0, addrlo, - SHIFT_IMM_LSR(s->page_bits - CPU_TLB_ENTRY_BITS)); + /* Extract the tlb index from the address into R0. */ + tcg_out_dat_reg(s, COND_AL, ARITH_AND, TCG_REG_R0, TCG_REG_R0, add= rlo, + SHIFT_IMM_LSR(s->page_bits - CPU_TLB_ENTRY_BITS)); =20 - /* - * Add the tlb_table pointer, creating the CPUTLBEntry address in R1. - * Load the tlb comparator into R2/R3 and the fast path addend into R1. - */ - QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); - if (cmp_off =3D=3D 0) { - if (s->addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ld32_rwb(s, COND_AL, TCG_REG_R2, TCG_REG_R1, TCG_REG_R= 0); + /* + * Add the tlb_table pointer, creating the CPUTLBEntry address in = R1. + * Load the tlb comparator into R2/R3 and the fast path addend int= o R1. + */ + QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); + if (cmp_off =3D=3D 0) { + if (s->addr_type =3D=3D TCG_TYPE_I32) { + tcg_out_ld32_rwb(s, COND_AL, TCG_REG_R2, + TCG_REG_R1, TCG_REG_R0); + } else { + tcg_out_ldrd_rwb(s, COND_AL, TCG_REG_R2, + TCG_REG_R1, TCG_REG_R0); + } } else { - tcg_out_ldrd_rwb(s, COND_AL, TCG_REG_R2, TCG_REG_R1, TCG_REG_R= 0); + tcg_out_dat_reg(s, COND_AL, ARITH_ADD, + TCG_REG_R1, TCG_REG_R1, TCG_REG_R0, 0); + if (s->addr_type =3D=3D TCG_TYPE_I32) { + tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R1, cmp_of= f); + } else { + tcg_out_ldrd_8(s, COND_AL, TCG_REG_R2, TCG_REG_R1, cmp_off= ); + } } - } else { - tcg_out_dat_reg(s, COND_AL, ARITH_ADD, - TCG_REG_R1, TCG_REG_R1, TCG_REG_R0, 0); - if (s->addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R1, cmp_off); + + /* Load the tlb addend. */ + tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1, + offsetof(CPUTLBEntry, addend)); + + /* + * Check alignment, check comparators. + * Do this in 2-4 insns. Use MOVW for v7, if possible, + * to reduce the number of sequential conditional instructions. + * Almost all guests have at least 4k pages, which means that we n= eed + * to clear at least 9 bits even for an 8-byte memory, which means= it + * isn't worth checking for an immediate operand for BIC. + * + * For unaligned accesses, test the page of the last unit of align= ment. + * This leaves the least significant alignment bits unchanged, and= of + * course must be zero. + */ + t_addr =3D addrlo; + if (a_mask < s_mask) { + t_addr =3D TCG_REG_R0; + tcg_out_dat_imm(s, COND_AL, ARITH_ADD, t_addr, + addrlo, s_mask - a_mask); + } + if (use_armv7_instructions && s->page_bits <=3D 16) { + tcg_out_movi32(s, COND_AL, TCG_REG_TMP, ~(s->page_mask | a_mas= k)); + tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP, + t_addr, TCG_REG_TMP, 0); + tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, + TCG_REG_R2, TCG_REG_TMP, 0); } else { - tcg_out_ldrd_8(s, COND_AL, TCG_REG_R2, TCG_REG_R1, cmp_off); + if (a_mask) { + tcg_debug_assert(a_mask <=3D 0xff); + tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, addrlo, a_mask); + } + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP, 0, t_addr, + SHIFT_IMM_LSR(s->page_bits)); + tcg_out_dat_reg(s, (a_mask ? COND_EQ : COND_AL), ARITH_CMP, + 0, TCG_REG_R2, TCG_REG_TMP, + SHIFT_IMM_LSL(s->page_bits)); } - } =20 - /* Load the tlb addend. */ - tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1, - offsetof(CPUTLBEntry, addend)); - - /* - * Check alignment, check comparators. - * Do this in 2-4 insns. Use MOVW for v7, if possible, - * to reduce the number of sequential conditional instructions. - * Almost all guests have at least 4k pages, which means that we need - * to clear at least 9 bits even for an 8-byte memory, which means it - * isn't worth checking for an immediate operand for BIC. - * - * For unaligned accesses, test the page of the last unit of alignment. - * This leaves the least significant alignment bits unchanged, and of - * course must be zero. - */ - t_addr =3D addrlo; - if (a_mask < s_mask) { - t_addr =3D TCG_REG_R0; - tcg_out_dat_imm(s, COND_AL, ARITH_ADD, t_addr, - addrlo, s_mask - a_mask); - } - if (use_armv7_instructions && s->page_bits <=3D 16) { - tcg_out_movi32(s, COND_AL, TCG_REG_TMP, ~(s->page_mask | a_mask)); - tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP, - t_addr, TCG_REG_TMP, 0); - tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R2, TCG_REG_TMP,= 0); - } else { - if (a_mask) { - tcg_debug_assert(a_mask <=3D 0xff); - tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, addrlo, a_mask); + if (s->addr_type !=3D TCG_TYPE_I32) { + tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0, TCG_REG_R3, addrhi, = 0); } - tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP, 0, t_addr, - SHIFT_IMM_LSR(s->page_bits)); - tcg_out_dat_reg(s, (a_mask ? COND_EQ : COND_AL), ARITH_CMP, - 0, TCG_REG_R2, TCG_REG_TMP, - SHIFT_IMM_LSL(s->page_bits)); - } - - if (s->addr_type !=3D TCG_TYPE_I32) { - tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0, TCG_REG_R3, addrhi, 0); - } -#else - if (a_mask) { + } else if (a_mask) { ldst =3D new_ldst_label(s); ldst->is_ld =3D is_ld; ldst->oi =3D oi; @@ -1505,7 +1499,6 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, HostAddress *h, /* tst addr, #mask */ tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, addrlo, a_mask); } -#endif =20 return ldst; } @@ -2931,12 +2924,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); =20 -#ifndef CONFIG_SOFTMMU - if (guest_base) { + if (!tcg_use_softmmu && guest_base) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); } -#endif =20 tcg_out_b_reg(s, COND_AL, tcg_target_call_iarg_regs[1]); =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084939; cv=none; d=zohomail.com; s=zohoarc; b=EGXtmaPCXBh+Qm41Yje5FFCrDTTCqn7OnSK3PGU3R1dtofKkD2kQEPGYCe1oVtX3IjeFQBqTlLVTauVX8HoxnD0KKYaOZL6P2nRnCaboeMCRMFiR9iI8DXMBrxTXv+sSslT72bzBhzujz8UvzlVG6/6Ed+/yZUY9m74lMSVCy+k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084939; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=H+PnCNXxM75sZlgHHFx2OEqwx4bspJhNCS0HMsehl/Y=; b=h03vDcSXgDjCv44SYfcf6jLKSR+/xvYnuhqUCDCK6KwRNd7JQ8VuhBV1Sj9TZBFpSg1J1JI0win1o6TdzB/gaQgjXX/N+2sCr2BOJ6ma+GmGxaueA3Dai6aAjc6myBsvV63xabP06JrwbyAX/dNhJAT94oCJxKCVR2UlglMgMt8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084939303474.3120294384946; Mon, 23 Oct 2023 11:15:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRA-0005fb-AR; Mon, 23 Oct 2023 14:14:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQz-0005Y8-2N for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:49 -0400 Received: from mail-oo1-xc35.google.com ([2607:f8b0:4864:20::c35]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQx-0008B6-4t for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:48 -0400 Received: by mail-oo1-xc35.google.com with SMTP id 006d021491bc7-583552eafd3so1945340eaf.0 for ; Mon, 23 Oct 2023 11:13:46 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084826; x=1698689626; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H+PnCNXxM75sZlgHHFx2OEqwx4bspJhNCS0HMsehl/Y=; b=tDRknbAVpuAijBJZ3ciFzBLOBG0Szsk0s2BPO+NemsfHakJrfodj4jlTbZwxzPirdJ lw7kF1RXqFmXXZ+y5g265NYJenV+1MBFdVQhOQaOY+CVCIb1Ld7SvvHgdHxzwr4ehRh2 sTslmD9f4NPYiyidS/Y9680y70oj+6ymUL75DsYK0z1aDowHmqUwYULsP7NeJode3YUr 3lCUjTZtKzcmB8CSu9PRNg2DgJ1s9ddbLtOYUOvRdUJPPGrX8UK+PqehEI7y1b/tMOuX eieKQAAiMkl3QP/9E3iuvV0d2OFgBBTDOnIO2lAhKVqQfb9Xvka5cRKWOGvP0pLsCa9W U7WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084826; x=1698689626; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H+PnCNXxM75sZlgHHFx2OEqwx4bspJhNCS0HMsehl/Y=; b=tKSAzXb5Qa9F1Ia3VGwi9py8nuF2YO908XzNShg2DmwbDT/A0zJ6Q3iEn18WpP8H57 eFBN6PEOumzqcMCYwYUNfLb/B/VHMUKfzhVFQ+KFq+DkgBfhC0Nfxq8uV930IUFCHabL ABTyt+v3q8a51gMoLro1MTAf/NbP/EmXlmRNivKMDurSSiEW4MpJLmwLVeRihCRhkfXC d/eInxkvgrjaXToekBYnGNtTFz4sp+/05jeYxGMuYz0aL7oIGaj/7qE1T/S/2f+qsI5I tBcOYauhm8skc6hSZSv9WfQHK/bRHEVApBwCebsnAo6Z+7Nex+sqQVyEa30EoYjPavkJ hU5A== X-Gm-Message-State: AOJu0YwVGqJew4TqdfqgdKiEhwEoLbvxY/rWVC9WoUUoMcZ0YKu1L/IY x77GWGpE6ylkLlerXTTxfGChJNlgsBU3GwHWwhw= X-Google-Smtp-Source: AGHT+IHYaWfQ/AtM4TrR+NRHMWkCFGjBd1JOU0m5PAIWkk1WBsvuvNRMXcAqc0O7gWb8NgaVOIIOBg== X-Received: by 2002:a05:6359:6a2:b0:168:ec55:d164 with SMTP id ei34-20020a05635906a200b00168ec55d164mr1028207rwb.25.1698084825796; Mon, 23 Oct 2023 11:13:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 17/38] tcg/aarch64: Use tcg_use_softmmu Date: Mon, 23 Oct 2023 11:13:08 -0700 Message-Id: <20231023181329.171490-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c35; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084940973100004 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 177 +++++++++++++++++------------------ 1 file changed, 88 insertions(+), 89 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 3afb896a3a..a3efa1e67a 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -77,9 +77,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind = kind, int slot) #define TCG_REG_TMP2 TCG_REG_X30 #define TCG_VEC_TMP0 TCG_REG_V31 =20 -#ifndef CONFIG_SOFTMMU #define TCG_REG_GUEST_BASE TCG_REG_X28 -#endif =20 static bool reloc_pc26(tcg_insn_unit *src_rw, const tcg_insn_unit *target) { @@ -1664,97 +1662,98 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGConte= xt *s, HostAddress *h, s_bits =3D=3D MO_128); a_mask =3D (1 << h->aa.align) - 1; =20 -#ifdef CONFIG_SOFTMMU - unsigned s_mask =3D (1u << s_bits) - 1; - unsigned mem_index =3D get_mmuidx(oi); - TCGReg addr_adj; - TCGType mask_type; - uint64_t compare_mask; + if (tcg_use_softmmu) { + unsigned s_mask =3D (1u << s_bits) - 1; + unsigned mem_index =3D get_mmuidx(oi); + TCGReg addr_adj; + TCGType mask_type; + uint64_t compare_mask; =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addr_reg; - - mask_type =3D (s->page_bits + s->tlb_dyn_max_bits > 32 - ? TCG_TYPE_I64 : TCG_TYPE_I32); - - /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {tmp0,tmp1}. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 8); - tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0, - tlb_mask_table_ofs(s, mem_index), 1, 0); - - /* Extract the TLB index from the address into X0. */ - tcg_out_insn(s, 3502S, AND_LSR, mask_type =3D=3D TCG_TYPE_I64, - TCG_REG_TMP0, TCG_REG_TMP0, addr_reg, - s->page_bits - CPU_TLB_ENTRY_BITS); - - /* Add the tlb_table pointer, forming the CPUTLBEntry address in TMP1.= */ - tcg_out_insn(s, 3502, ADD, 1, TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP0= ); - - /* Load the tlb comparator into TMP0, and the fast path addend into TM= P1. */ - QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); - tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP1, - is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write)); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, - offsetof(CPUTLBEntry, addend)); - - /* - * For aligned accesses, we check the first byte and include the align= ment - * bits within the address. For unaligned access, we check that we do= n't - * cross pages using the address of the last byte of the access. - */ - if (a_mask >=3D s_mask) { - addr_adj =3D addr_reg; - } else { - addr_adj =3D TCG_REG_TMP2; - tcg_out_insn(s, 3401, ADDI, addr_type, - addr_adj, addr_reg, s_mask - a_mask); - } - compare_mask =3D (uint64_t)s->page_mask | a_mask; - - /* Store the page mask part of the address into TMP2. */ - tcg_out_logicali(s, I3404_ANDI, addr_type, TCG_REG_TMP2, - addr_adj, compare_mask); - - /* Perform the address comparison. */ - tcg_out_cmp(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, 0); - - /* If not equal, we jump to the slow path. */ - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); - - h->base =3D TCG_REG_TMP1; - h->index =3D addr_reg; - h->index_ext =3D addr_type; -#else - if (a_mask) { ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addr_reg; =20 - /* tst addr, #mask */ - tcg_out_logicali(s, I3404_ANDSI, 0, TCG_REG_XZR, addr_reg, a_mask); + mask_type =3D (s->page_bits + s->tlb_dyn_max_bits > 32 + ? TCG_TYPE_I64 : TCG_TYPE_I32); =20 - /* b.ne slow_path */ + /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {tmp0,tmp1}. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) !=3D 0); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) !=3D 8); + tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0, + tlb_mask_table_ofs(s, mem_index), 1, 0); + + /* Extract the TLB index from the address into X0. */ + tcg_out_insn(s, 3502S, AND_LSR, mask_type =3D=3D TCG_TYPE_I64, + TCG_REG_TMP0, TCG_REG_TMP0, addr_reg, + s->page_bits - CPU_TLB_ENTRY_BITS); + + /* Add the tlb_table pointer, forming the CPUTLBEntry address. */ + tcg_out_insn(s, 3502, ADD, 1, TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_= TMP0); + + /* Load the tlb comparator into TMP0, and the fast path addend. */ + QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); + tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP1, + is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write)); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, + offsetof(CPUTLBEntry, addend)); + + /* + * For aligned accesses, we check the first byte and include + * the alignment bits within the address. For unaligned access, + * we check that we don't cross pages using the address of the + * last byte of the access. + */ + if (a_mask >=3D s_mask) { + addr_adj =3D addr_reg; + } else { + addr_adj =3D TCG_REG_TMP2; + tcg_out_insn(s, 3401, ADDI, addr_type, + addr_adj, addr_reg, s_mask - a_mask); + } + compare_mask =3D (uint64_t)s->page_mask | a_mask; + + /* Store the page mask part of the address into TMP2. */ + tcg_out_logicali(s, I3404_ANDI, addr_type, TCG_REG_TMP2, + addr_adj, compare_mask); + + /* Perform the address comparison. */ + tcg_out_cmp(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, 0); + + /* If not equal, we jump to the slow path. */ ldst->label_ptr[0] =3D s->code_ptr; tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); - } =20 - if (guest_base || addr_type =3D=3D TCG_TYPE_I32) { - h->base =3D TCG_REG_GUEST_BASE; + h->base =3D TCG_REG_TMP1; h->index =3D addr_reg; h->index_ext =3D addr_type; } else { - h->base =3D addr_reg; - h->index =3D TCG_REG_XZR; - h->index_ext =3D TCG_TYPE_I64; + if (a_mask) { + ldst =3D new_ldst_label(s); + + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addr_reg; + + /* tst addr, #mask */ + tcg_out_logicali(s, I3404_ANDSI, 0, TCG_REG_XZR, addr_reg, a_m= ask); + + /* b.ne slow_path */ + ldst->label_ptr[0] =3D s->code_ptr; + tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); + } + + if (guest_base || addr_type =3D=3D TCG_TYPE_I32) { + h->base =3D TCG_REG_GUEST_BASE; + h->index =3D addr_reg; + h->index_ext =3D addr_type; + } else { + h->base =3D addr_reg; + h->index =3D TCG_REG_XZR; + h->index_ext =3D TCG_TYPE_I64; + } } -#endif =20 return ldst; } @@ -3117,16 +3116,16 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_set_frame(s, TCG_REG_SP, TCG_STATIC_CALL_ARGS_SIZE, CPU_TEMP_BUF_NLONGS * sizeof(long)); =20 -#if !defined(CONFIG_SOFTMMU) - /* - * Note that XZR cannot be encoded in the address base register slot, - * as that actually encodes SP. Depending on the guest, we may need - * to zero-extend the guest address via the address index register slo= t, - * therefore we need to load even a zero guest base into a register. - */ - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); -#endif + if (!tcg_use_softmmu) { + /* + * Note that XZR cannot be encoded in the address base register sl= ot, + * as that actually encodes SP. Depending on the guest, we may ne= ed + * to zero-extend the guest address via the address index register= slot, + * therefore we need to load even a zero guest base into a registe= r. + */ + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); + } =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out_insn(s, 3207, BR, tcg_target_call_iarg_regs[1]); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084973; cv=none; d=zohomail.com; s=zohoarc; b=AXhZZV3YOu1NFf9FDI1m0MWC9UgZoLF0rA2HUEj2ygEsxmWFuKHWrZEyUjEbd7YYvqcwGyNnu0+Aro2Wo1mvbrsRlzOk9BJ3yZArumAOCEZD5yGXAblntY7LBd//+itwJyAN4zAvQ4vShwplCIwsy59CP8x6zcKMT/CV76CGkOs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084973; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WWoQZ73KhTN/ADC9+C/3f9sBjz2oSl2r5ie5s835XCE=; b=mv4BH44Kjs/a6ql6THAzSjcRHdXRh1GkbfIiuq6ENvaV9LHYD8uklJPXqKYohHi8svp5tXY9D9CYFWIhvLfEBv7ZahvcXQYRbyoVjVfx3cPkKBxBUzKDWHx7EK9C2A26wkglFp3EQCXhYK5+WHqXFH5xmXeCFVvsGav+Ien0JJQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084973484601.7703978926196; Mon, 23 Oct 2023 11:16:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRD-0005hx-Oy; Mon, 23 Oct 2023 14:14:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzQz-0005aK-Ox for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:49 -0400 Received: from mail-il1-x12a.google.com ([2607:f8b0:4864:20::12a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQx-0008BY-PS for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:49 -0400 Received: by mail-il1-x12a.google.com with SMTP id e9e14a558f8ab-357ccaf982eso9113325ab.0 for ; Mon, 23 Oct 2023 11:13:47 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084826; x=1698689626; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WWoQZ73KhTN/ADC9+C/3f9sBjz2oSl2r5ie5s835XCE=; b=xd9TXPtMY7/Zvx7MaOpoLKrWTOwrarm8wulW5Ke019gDlj+7D/hnRiiG+2NnQZn71P HIXCQbKLdROsFpLvdamL3HaU9g3lusFC0KbxwARax2oh2kFxNLCBivwU0wkEv5rKZ+mZ UIn8OpHwKyhJyzpVSCipu+2+JpSVMjPJLO0c9TnxrwrNz/a0PwHv0ORP7m8P4DxTuaeQ MF1PWND7efSFuZ0CcO8h8uhAiX9SnJdAgRF2G0ELM3mdOOWxNRHZiiQVaq9cpb/nBKk0 rweopDrh17qya2a4N4hRm2qetSGB/bKUXjaiSCz6HPKrqMpGN9MYRqHCYX69ttPH/tn6 +64w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084826; x=1698689626; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WWoQZ73KhTN/ADC9+C/3f9sBjz2oSl2r5ie5s835XCE=; b=nXRQ74JmOGHOtIgcqtoiPZ+5x9SI7ByFO4gUwLIXhVKvHbfTr6uWX4YjNx1MrHVR/F ML/nIxMkakn9U8ZN+4YEytI40XjZUt2sEBIUNAmB+u0yQLJTb/duepsPmfmTCnQDGDx3 r72pTQZAannHxvWMixUru4DrjZNFMOKAxdry/dCrl/rcMX9+nFScbx1IWW69gLByzHqR wBIw2xic9eHA+DwGSo4waaoaaV3XGHzDMDFbJs7SmeV46VaYxSYilRLFumJEnrl6C97D LQ9djbUz40YmVLSZcg1LgpyI35l2CYROzU0AZhzwjKyZXxQ4ENA7Uky0cw4kD7WBkNnk jSew== X-Gm-Message-State: AOJu0YyBJp/z/PQjzkp4iMQzUxL95J+ArDS+RhIEaiH1hTwQW6ZL7UEF Knzl1oGUsjb/32jx6y6ZM7P+BghTWwflhKWqXIA= X-Google-Smtp-Source: AGHT+IHdVBXEKFtwniOmBwVmA4vwe/+E+X48xUFbco+F9VUWG1CjQEXP8NZ476pBuILi1DEYI4a1hQ== X-Received: by 2002:a92:d381:0:b0:357:4fab:e24c with SMTP id o1-20020a92d381000000b003574fabe24cmr9863155ilo.13.1698084826627; Mon, 23 Oct 2023 11:13:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 18/38] tcg/i386: Use tcg_use_softmmu Date: Mon, 23 Oct 2023 11:13:09 -0700 Message-Id: <20231023181329.171490-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::12a; envelope-from=richard.henderson@linaro.org; helo=mail-il1-x12a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084975013100001 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 198 +++++++++++++++++++------------------- 1 file changed, 98 insertions(+), 100 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 788d608150..a83f8aab30 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -153,11 +153,8 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKi= nd kind, int slot) # define ALL_VECTOR_REGS 0x00ff0000u # define ALL_BYTEL_REGS 0x0000000fu #endif -#ifdef CONFIG_SOFTMMU -# define SOFTMMU_RESERVE_REGS ((1 << TCG_REG_L0) | (1 << TCG_REG_L1)) -#else -# define SOFTMMU_RESERVE_REGS 0 -#endif +#define SOFTMMU_RESERVE_REGS \ + (tcg_use_softmmu ? (1 << TCG_REG_L0) | (1 << TCG_REG_L1) : 0) =20 /* For 64-bit, we always know that CMOV is available. */ #if TCG_TARGET_REG_BITS =3D=3D 64 @@ -1933,7 +1930,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, = TCGLabelQemuLdst *l) return true; } =20 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY static HostAddress x86_guest_base =3D { .index =3D -1 }; @@ -1949,6 +1946,7 @@ static inline int setup_guest_base_seg(void) } return 0; } +#define setup_guest_base_seg setup_guest_base_seg #elif defined(__x86_64__) && \ (defined (__FreeBSD__) || defined (__FreeBSD_kernel__)) # include @@ -1959,13 +1957,14 @@ static inline int setup_guest_base_seg(void) } return 0; } +#define setup_guest_base_seg setup_guest_base_seg +#endif #else -static inline int setup_guest_base_seg(void) -{ - return 0; -} -#endif /* setup_guest_base_seg */ -#endif /* !SOFTMMU */ +# define x86_guest_base (*(HostAddress *)({ qemu_build_not_reached(); NULL= ; })) +#endif /* CONFIG_USER_ONLY */ +#ifndef setup_guest_base_seg +# define setup_guest_base_seg() 0 +#endif =20 #define MIN_TLB_MASK_TABLE_OFS INT_MIN =20 @@ -1984,94 +1983,94 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGConte= xt *s, HostAddress *h, MemOp s_bits =3D opc & MO_SIZE; unsigned a_mask; =20 -#ifdef CONFIG_SOFTMMU - h->index =3D TCG_REG_L0; - h->ofs =3D 0; - h->seg =3D 0; -#else - *h =3D x86_guest_base; -#endif + if (tcg_use_softmmu) { + h->index =3D TCG_REG_L0; + h->ofs =3D 0; + h->seg =3D 0; + } else { + *h =3D x86_guest_base; + } h->base =3D addrlo; h->aa =3D atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, s_bits =3D= =3D MO_128); a_mask =3D (1 << h->aa.align) - 1; =20 -#ifdef CONFIG_SOFTMMU - int cmp_ofs =3D is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write); - TCGType ttype =3D TCG_TYPE_I32; - TCGType tlbtype =3D TCG_TYPE_I32; - int trexw =3D 0, hrexw =3D 0, tlbrexw =3D 0; - unsigned mem_index =3D get_mmuidx(oi); - unsigned s_mask =3D (1 << s_bits) - 1; - int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); - int tlb_mask; + if (tcg_use_softmmu) { + int cmp_ofs =3D is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write); + TCGType ttype =3D TCG_TYPE_I32; + TCGType tlbtype =3D TCG_TYPE_I32; + int trexw =3D 0, hrexw =3D 0, tlbrexw =3D 0; + unsigned mem_index =3D get_mmuidx(oi); + unsigned s_mask =3D (1 << s_bits) - 1; + int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); + int tlb_mask; =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addrlo; - ldst->addrhi_reg =3D addrhi; + ldst =3D new_ldst_label(s); + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addrlo; + ldst->addrhi_reg =3D addrhi; =20 - if (TCG_TARGET_REG_BITS =3D=3D 64) { - ttype =3D s->addr_type; - trexw =3D (ttype =3D=3D TCG_TYPE_I32 ? 0 : P_REXW); - if (TCG_TYPE_PTR =3D=3D TCG_TYPE_I64) { - hrexw =3D P_REXW; - if (s->page_bits + s->tlb_dyn_max_bits > 32) { - tlbtype =3D TCG_TYPE_I64; - tlbrexw =3D P_REXW; + if (TCG_TARGET_REG_BITS =3D=3D 64) { + ttype =3D s->addr_type; + trexw =3D (ttype =3D=3D TCG_TYPE_I32 ? 0 : P_REXW); + if (TCG_TYPE_PTR =3D=3D TCG_TYPE_I64) { + hrexw =3D P_REXW; + if (s->page_bits + s->tlb_dyn_max_bits > 32) { + tlbtype =3D TCG_TYPE_I64; + tlbrexw =3D P_REXW; + } } } - } =20 - tcg_out_mov(s, tlbtype, TCG_REG_L0, addrlo); - tcg_out_shifti(s, SHIFT_SHR + tlbrexw, TCG_REG_L0, - s->page_bits - CPU_TLB_ENTRY_BITS); + tcg_out_mov(s, tlbtype, TCG_REG_L0, addrlo); + tcg_out_shifti(s, SHIFT_SHR + tlbrexw, TCG_REG_L0, + s->page_bits - CPU_TLB_ENTRY_BITS); =20 - tcg_out_modrm_offset(s, OPC_AND_GvEv + trexw, TCG_REG_L0, TCG_AREG0, - fast_ofs + offsetof(CPUTLBDescFast, mask)); + tcg_out_modrm_offset(s, OPC_AND_GvEv + trexw, TCG_REG_L0, TCG_AREG= 0, + fast_ofs + offsetof(CPUTLBDescFast, mask)); =20 - tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, TCG_REG_L0, TCG_AREG0, - fast_ofs + offsetof(CPUTLBDescFast, table)); + tcg_out_modrm_offset(s, OPC_ADD_GvEv + hrexw, TCG_REG_L0, TCG_AREG= 0, + fast_ofs + offsetof(CPUTLBDescFast, table)); =20 - /* - * If the required alignment is at least as large as the access, simply - * copy the address and mask. For lesser alignments, check that we do= n't - * cross pages for the complete access. - */ - if (a_mask >=3D s_mask) { - tcg_out_mov(s, ttype, TCG_REG_L1, addrlo); - } else { - tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1, - addrlo, s_mask - a_mask); - } - tlb_mask =3D s->page_mask | a_mask; - tgen_arithi(s, ARITH_AND + trexw, TCG_REG_L1, tlb_mask, 0); + /* + * If the required alignment is at least as large as the access, + * simply copy the address and mask. For lesser alignments, + * check that we don't cross pages for the complete access. + */ + if (a_mask >=3D s_mask) { + tcg_out_mov(s, ttype, TCG_REG_L1, addrlo); + } else { + tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1, + addrlo, s_mask - a_mask); + } + tlb_mask =3D s->page_mask | a_mask; + tgen_arithi(s, ARITH_AND + trexw, TCG_REG_L1, tlb_mask, 0); =20 - /* cmp 0(TCG_REG_L0), TCG_REG_L1 */ - tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, - TCG_REG_L1, TCG_REG_L0, cmp_ofs); - - /* jne slow_path */ - tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0); - ldst->label_ptr[0] =3D s->code_ptr; - s->code_ptr +=3D 4; - - if (TCG_TARGET_REG_BITS =3D=3D 32 && s->addr_type =3D=3D TCG_TYPE_I64)= { - /* cmp 4(TCG_REG_L0), addrhi */ - tcg_out_modrm_offset(s, OPC_CMP_GvEv, addrhi, TCG_REG_L0, cmp_ofs = + 4); + /* cmp 0(TCG_REG_L0), TCG_REG_L1 */ + tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, + TCG_REG_L1, TCG_REG_L0, cmp_ofs); =20 /* jne slow_path */ tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0); - ldst->label_ptr[1] =3D s->code_ptr; + ldst->label_ptr[0] =3D s->code_ptr; s->code_ptr +=3D 4; - } =20 - /* TLB Hit. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0, - offsetof(CPUTLBEntry, addend)); -#else - if (a_mask) { + if (TCG_TARGET_REG_BITS =3D=3D 32 && s->addr_type =3D=3D TCG_TYPE_= I64) { + /* cmp 4(TCG_REG_L0), addrhi */ + tcg_out_modrm_offset(s, OPC_CMP_GvEv, addrhi, + TCG_REG_L0, cmp_ofs + 4); + + /* jne slow_path */ + tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0); + ldst->label_ptr[1] =3D s->code_ptr; + s->code_ptr +=3D 4; + } + + /* TLB Hit. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0, + offsetof(CPUTLBEntry, addend)); + } else if (a_mask) { ldst =3D new_ldst_label(s); =20 ldst->is_ld =3D is_ld; @@ -2085,7 +2084,6 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, HostAddress *h, ldst->label_ptr[0] =3D s->code_ptr; s->code_ptr +=3D 4; } -#endif =20 return ldst; } @@ -4140,35 +4138,35 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_push(s, tcg_target_callee_save_regs[i]); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 - tcg_out_ld(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, - (ARRAY_SIZE(tcg_target_callee_save_regs) + 1) * 4); - tcg_out_addi(s, TCG_REG_ESP, -stack_addend); - /* jmp *tb. */ - tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_ESP, - (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 - + stack_addend); -#else -# if !defined(CONFIG_SOFTMMU) - if (guest_base) { + if (!tcg_use_softmmu && guest_base) { int seg =3D setup_guest_base_seg(); if (seg !=3D 0) { x86_guest_base.seg =3D seg; } else if (guest_base =3D=3D (int32_t)guest_base) { x86_guest_base.ofs =3D guest_base; } else { + assert(TCG_TARGET_REG_BITS =3D=3D 64); /* Choose R12 because, as a base, it requires a SIB byte. */ x86_guest_base.index =3D TCG_REG_R12; tcg_out_movi(s, TCG_TYPE_PTR, x86_guest_base.index, guest_base= ); tcg_regset_set_reg(s->reserved_regs, x86_guest_base.index); } } -# endif - tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); - tcg_out_addi(s, TCG_REG_ESP, -stack_addend); - /* jmp *tb. */ - tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, tcg_target_call_iarg_regs[1]); -#endif + + if (TCG_TARGET_REG_BITS =3D=3D 32) { + tcg_out_ld(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, + (ARRAY_SIZE(tcg_target_callee_save_regs) + 1) * 4); + tcg_out_addi(s, TCG_REG_ESP, -stack_addend); + /* jmp *tb. */ + tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_ESP, + (ARRAY_SIZE(tcg_target_callee_save_regs) + 2)= * 4 + + stack_addend); + } else { + tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[= 0]); + tcg_out_addi(s, TCG_REG_ESP, -stack_addend); + /* jmp *tb. */ + tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, tcg_target_call_iarg_regs= [1]); + } =20 /* * Return path for goto_ptr. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084904814100004 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 126 +++++++++++++++---------------- 1 file changed, 61 insertions(+), 65 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index 801302d85d..ccf133db4b 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -165,10 +165,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKi= nd kind, int slot) return TCG_REG_A0 + slot; } =20 -#ifndef CONFIG_SOFTMMU -#define USE_GUEST_BASE (guest_base !=3D 0) #define TCG_GUEST_BASE_REG TCG_REG_S1 -#endif =20 #define TCG_CT_CONST_ZERO 0x100 #define TCG_CT_CONST_S12 0x200 @@ -908,76 +905,77 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, HostAddress *h, h->aa =3D atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false); a_bits =3D h->aa.align; =20 -#ifdef CONFIG_SOFTMMU - unsigned s_bits =3D opc & MO_SIZE; - int mem_index =3D get_mmuidx(oi); - int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); - int mask_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, mask); - int table_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, table); + if (tcg_use_softmmu) { + unsigned s_bits =3D opc & MO_SIZE; + int mem_index =3D get_mmuidx(oi); + int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); + int mask_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, mask); + int table_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, table); =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addr_reg; - - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs); - - tcg_out_opc_srli_d(s, TCG_REG_TMP2, addr_reg, - s->page_bits - CPU_TLB_ENTRY_BITS); - tcg_out_opc_and(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0); - tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1); - - /* Load the tlb comparator and the addend. */ - QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); - tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, - is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write)); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2, - offsetof(CPUTLBEntry, addend)); - - /* - * For aligned accesses, we check the first byte and include the align= ment - * bits within the address. For unaligned access, we check that we do= n't - * cross pages using the address of the last byte of the access. - */ - if (a_bits < s_bits) { - unsigned a_mask =3D (1u << a_bits) - 1; - unsigned s_mask =3D (1u << s_bits) - 1; - tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask= ); - } else { - tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg); - } - tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO, - a_bits, s->page_bits - 1); - - /* Compare masked address with the TLB entry. */ - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0); - - h->index =3D TCG_REG_TMP2; -#else - if (a_bits) { ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addr_reg; =20 + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs); + + tcg_out_opc_srli_d(s, TCG_REG_TMP2, addr_reg, + s->page_bits - CPU_TLB_ENTRY_BITS); + tcg_out_opc_and(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0); + tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1); + + /* Load the tlb comparator and the addend. */ + QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); + tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, + is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write)); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2, + offsetof(CPUTLBEntry, addend)); + /* - * Without micro-architecture details, we don't know which of - * bstrpick or andi is faster, so use bstrpick as it's not - * constrained by imm field width. Not to say alignments >=3D 2^12 - * are going to happen any time soon. + * For aligned accesses, we check the first byte and include the + * alignment bits within the address. For unaligned access, we + * check that we don't cross pages using the address of the last + * byte of the access. */ - tcg_out_opc_bstrpick_d(s, TCG_REG_TMP1, addr_reg, 0, a_bits - 1); + if (a_bits < s_bits) { + unsigned a_mask =3D (1u << a_bits) - 1; + unsigned s_mask =3D (1u << s_bits) - 1; + tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_= mask); + } else { + tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg); + } + tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO, + a_bits, s->page_bits - 1); =20 + /* Compare masked address with the TLB entry. */ ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_opc_bne(s, TCG_REG_TMP1, TCG_REG_ZERO, 0); - } + tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0); =20 - h->index =3D USE_GUEST_BASE ? TCG_GUEST_BASE_REG : TCG_REG_ZERO; -#endif + h->index =3D TCG_REG_TMP2; + } else { + if (a_bits) { + ldst =3D new_ldst_label(s); + + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addr_reg; + + /* + * Without micro-architecture details, we don't know which of + * bstrpick or andi is faster, so use bstrpick as it's not + * constrained by imm field width. Not to say alignments >=3D = 2^12 + * are going to happen any time soon. + */ + tcg_out_opc_bstrpick_d(s, TCG_REG_TMP1, addr_reg, 0, a_bits - = 1); + + ldst->label_ptr[0] =3D s->code_ptr; + tcg_out_opc_bne(s, TCG_REG_TMP1, TCG_REG_ZERO, 0); + } + + h->index =3D guest_base ? TCG_GUEST_BASE_REG : TCG_REG_ZERO; + } =20 if (addr_type =3D=3D TCG_TYPE_I32) { h->base =3D TCG_REG_TMP0; @@ -2272,12 +2270,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } =20 -#if !defined(CONFIG_SOFTMMU) - if (USE_GUEST_BASE) { + if (!tcg_use_softmmu && guest_base) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif =20 /* Call generated code */ tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085006; cv=none; d=zohomail.com; s=zohoarc; b=FzqP9VtcG5DMY5eXxfmIePhrngqycvi+oAX+1tGiODlGzCSqk70o2nBIRHmDLR2fREAUTSOlcmPbb+TEkIEmMlk7uhurbF5NtgbZmAOAryUp701y7uiJsYsb0Hp+47riVry6a/n3M3Sc0jmhStuztIr7fTTAwGWQHOQP+Q3GdN8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085006; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=6NA4v6NXBUoR4C0a50DqS4JX4mw0CRsfvfpO9da4xso=; b=Ukz5mJ6aVd/w91g6Tl/ZPjncye/0Wzrh419IDrts3UBr7z4AifvdVfHJ2bvODntfK1KYERVABVrv2T8ape1mW8d6Fn4Kg6ib6BKloVdXnFmD/zavEjlm3BXmt2D1haaZXG4ttrxsPQGo+cuUfcc3+gkRniupDVXGkW4KXTxq+dA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085006858866.7615061008196; Mon, 23 Oct 2023 11:16:46 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRE-0005k0-Hh; Mon, 23 Oct 2023 14:14:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzR1-0005aq-Lc for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:51 -0400 Received: from mail-oo1-xc2c.google.com ([2607:f8b0:4864:20::c2c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzQz-0008CZ-Ig for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:51 -0400 Received: by mail-oo1-xc2c.google.com with SMTP id 006d021491bc7-581b6b93bd1so2157649eaf.1 for ; Mon, 23 Oct 2023 11:13:49 -0700 (PDT) Received: from stoup.. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2c; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085009182100003 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 231 +++++++++++++++++++------------------- 1 file changed, 113 insertions(+), 118 deletions(-) diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index e2892edc6a..328984ccff 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -78,13 +78,11 @@ static const char * const tcg_target_reg_names[TCG_TARG= ET_NB_REGS] =3D { #define TCG_TMP2 TCG_REG_T8 #define TCG_TMP3 TCG_REG_T7 =20 -#ifndef CONFIG_SOFTMMU #define TCG_GUEST_BASE_REG TCG_REG_S7 -#endif #if TCG_TARGET_REG_BITS =3D=3D 64 #define TCG_REG_TB TCG_REG_S6 #else -#define TCG_REG_TB (qemu_build_not_reached(), TCG_REG_ZERO) +#define TCG_REG_TB ({ qemu_build_not_reached(); TCG_REG_ZERO; }) #endif =20 /* check if we really need so many registers :P */ @@ -1279,130 +1277,129 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGCon= text *s, HostAddress *h, a_bits =3D h->aa.align; a_mask =3D (1 << a_bits) - 1; =20 -#ifdef CONFIG_SOFTMMU - unsigned s_mask =3D (1 << s_bits) - 1; - int mem_index =3D get_mmuidx(oi); - int fast_off =3D tlb_mask_table_ofs(s, mem_index); - int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); - int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); - int add_off =3D offsetof(CPUTLBEntry, addend); - int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write); + if (tcg_use_softmmu) { + unsigned s_mask =3D (1 << s_bits) - 1; + int mem_index =3D get_mmuidx(oi); + int fast_off =3D tlb_mask_table_ofs(s, mem_index); + int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); + int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); + int add_off =3D offsetof(CPUTLBEntry, addend); + int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write); =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addrlo; - ldst->addrhi_reg =3D addrhi; - - /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_AREG0, mask_off); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP1, TCG_AREG0, table_off); - - /* Extract the TLB index from the address into TMP3. */ - if (TCG_TARGET_REG_BITS =3D=3D 32 || addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_opc_sa(s, OPC_SRL, TCG_TMP3, addrlo, - s->page_bits - CPU_TLB_ENTRY_BITS); - } else { - tcg_out_dsrl(s, TCG_TMP3, addrlo, - s->page_bits - CPU_TLB_ENTRY_BITS); - } - tcg_out_opc_reg(s, OPC_AND, TCG_TMP3, TCG_TMP3, TCG_TMP0); - - /* Add the tlb_table pointer, creating the CPUTLBEntry address in TMP3= . */ - tcg_out_opc_reg(s, ALIAS_PADD, TCG_TMP3, TCG_TMP3, TCG_TMP1); - - if (TCG_TARGET_REG_BITS =3D=3D 32 || addr_type =3D=3D TCG_TYPE_I32) { - /* Load the (low half) tlb comparator. */ - tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_TMP3, - cmp_off + HOST_BIG_ENDIAN * 4); - } else { - tcg_out_ld(s, TCG_TYPE_I64, TCG_TMP0, TCG_TMP3, cmp_off); - } - - if (TCG_TARGET_REG_BITS =3D=3D 64 || addr_type =3D=3D TCG_TYPE_I32) { - /* Load the tlb addend for the fast path. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP3, TCG_TMP3, add_off); - } - - /* - * Mask the page bits, keeping the alignment bits to compare against. - * For unaligned accesses, compare against the end of the access to - * verify that it does not cross a page boundary. - */ - tcg_out_movi(s, addr_type, TCG_TMP1, s->page_mask | a_mask); - if (a_mask < s_mask) { - if (TCG_TARGET_REG_BITS =3D=3D 32 || addr_type =3D=3D TCG_TYPE_I32= ) { - tcg_out_opc_imm(s, OPC_ADDIU, TCG_TMP2, addrlo, s_mask - a_mas= k); - } else { - tcg_out_opc_imm(s, OPC_DADDIU, TCG_TMP2, addrlo, s_mask - a_ma= sk); - } - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, TCG_TMP2); - } else { - tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrlo); - } - - /* Zero extend a 32-bit guest address for a 64-bit host. */ - if (TCG_TARGET_REG_BITS =3D=3D 64 && addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ext32u(s, TCG_TMP2, addrlo); - addrlo =3D TCG_TMP2; - } - - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); - - /* Load and test the high half tlb comparator. */ - if (TCG_TARGET_REG_BITS =3D=3D 32 && addr_type !=3D TCG_TYPE_I32) { - /* delay slot */ - tcg_out_ldst(s, OPC_LW, TCG_TMP0, TCG_TMP3, cmp_off + HI_OFF); - - /* Load the tlb addend for the fast path. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP3, TCG_TMP3, add_off); - - ldst->label_ptr[1] =3D s->code_ptr; - tcg_out_opc_br(s, OPC_BNE, addrhi, TCG_TMP0); - } - - /* delay slot */ - base =3D TCG_TMP3; - tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_TMP3, addrlo); -#else - if (a_mask && (use_mips32r6_instructions || a_bits !=3D s_bits)) { ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addrlo; ldst->addrhi_reg =3D addrhi; =20 - /* We are expecting a_bits to max out at 7, much lower than ANDI. = */ - tcg_debug_assert(a_bits < 16); - tcg_out_opc_imm(s, OPC_ANDI, TCG_TMP0, addrlo, a_mask); + /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP0, TCG_AREG0, mask_off); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP1, TCG_AREG0, table_off); + + /* Extract the TLB index from the address into TMP3. */ + if (TCG_TARGET_REG_BITS =3D=3D 32 || addr_type =3D=3D TCG_TYPE_I32= ) { + tcg_out_opc_sa(s, OPC_SRL, TCG_TMP3, addrlo, + s->page_bits - CPU_TLB_ENTRY_BITS); + } else { + tcg_out_dsrl(s, TCG_TMP3, addrlo, + s->page_bits - CPU_TLB_ENTRY_BITS); + } + tcg_out_opc_reg(s, OPC_AND, TCG_TMP3, TCG_TMP3, TCG_TMP0); + + /* Add the tlb_table pointer, creating the CPUTLBEntry address. */ + tcg_out_opc_reg(s, ALIAS_PADD, TCG_TMP3, TCG_TMP3, TCG_TMP1); + + if (TCG_TARGET_REG_BITS =3D=3D 32 || addr_type =3D=3D TCG_TYPE_I32= ) { + /* Load the (low half) tlb comparator. */ + tcg_out_ld(s, TCG_TYPE_I32, TCG_TMP0, TCG_TMP3, + cmp_off + HOST_BIG_ENDIAN * 4); + } else { + tcg_out_ld(s, TCG_TYPE_I64, TCG_TMP0, TCG_TMP3, cmp_off); + } + + if (TCG_TARGET_REG_BITS =3D=3D 64 || addr_type =3D=3D TCG_TYPE_I32= ) { + /* Load the tlb addend for the fast path. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP3, TCG_TMP3, add_off); + } + + /* + * Mask the page bits, keeping the alignment bits to compare again= st. + * For unaligned accesses, compare against the end of the access to + * verify that it does not cross a page boundary. + */ + tcg_out_movi(s, addr_type, TCG_TMP1, s->page_mask | a_mask); + if (a_mask < s_mask) { + tcg_out_opc_imm(s, (TCG_TARGET_REG_BITS =3D=3D 32 + || addr_type =3D=3D TCG_TYPE_I32 + ? OPC_ADDIU : OPC_DADDIU), + TCG_TMP2, addrlo, s_mask - a_mask); + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, TCG_TMP2); + } else { + tcg_out_opc_reg(s, OPC_AND, TCG_TMP1, TCG_TMP1, addrlo); + } + + /* Zero extend a 32-bit guest address for a 64-bit host. */ + if (TCG_TARGET_REG_BITS =3D=3D 64 && addr_type =3D=3D TCG_TYPE_I32= ) { + tcg_out_ext32u(s, TCG_TMP2, addrlo); + addrlo =3D TCG_TMP2; + } =20 ldst->label_ptr[0] =3D s->code_ptr; - if (use_mips32r6_instructions) { - tcg_out_opc_br(s, OPC_BNEZALC_R6, TCG_REG_ZERO, TCG_TMP0); - } else { - tcg_out_opc_br(s, OPC_BNEL, TCG_TMP0, TCG_REG_ZERO); - tcg_out_nop(s); - } - } + tcg_out_opc_br(s, OPC_BNE, TCG_TMP1, TCG_TMP0); =20 - base =3D addrlo; - if (TCG_TARGET_REG_BITS =3D=3D 64 && addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ext32u(s, TCG_REG_A0, base); - base =3D TCG_REG_A0; - } - if (guest_base) { - if (guest_base =3D=3D (int16_t)guest_base) { - tcg_out_opc_imm(s, ALIAS_PADDI, TCG_REG_A0, base, guest_base); - } else { - tcg_out_opc_reg(s, ALIAS_PADD, TCG_REG_A0, base, - TCG_GUEST_BASE_REG); + /* Load and test the high half tlb comparator. */ + if (TCG_TARGET_REG_BITS =3D=3D 32 && addr_type !=3D TCG_TYPE_I32) { + /* delay slot */ + tcg_out_ldst(s, OPC_LW, TCG_TMP0, TCG_TMP3, cmp_off + HI_OFF); + + /* Load the tlb addend for the fast path. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_TMP3, TCG_TMP3, add_off); + + ldst->label_ptr[1] =3D s->code_ptr; + tcg_out_opc_br(s, OPC_BNE, addrhi, TCG_TMP0); + } + + /* delay slot */ + base =3D TCG_TMP3; + tcg_out_opc_reg(s, ALIAS_PADD, base, TCG_TMP3, addrlo); + } else { + if (a_mask && (use_mips32r6_instructions || a_bits !=3D s_bits)) { + ldst =3D new_ldst_label(s); + + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addrlo; + ldst->addrhi_reg =3D addrhi; + + /* We are expecting a_bits to max out at 7, much lower than AN= DI. */ + tcg_debug_assert(a_bits < 16); + tcg_out_opc_imm(s, OPC_ANDI, TCG_TMP0, addrlo, a_mask); + + ldst->label_ptr[0] =3D s->code_ptr; + if (use_mips32r6_instructions) { + tcg_out_opc_br(s, OPC_BNEZALC_R6, TCG_REG_ZERO, TCG_TMP0); + } else { + tcg_out_opc_br(s, OPC_BNEL, TCG_TMP0, TCG_REG_ZERO); + tcg_out_nop(s); + } + } + + base =3D addrlo; + if (TCG_TARGET_REG_BITS =3D=3D 64 && addr_type =3D=3D TCG_TYPE_I32= ) { + tcg_out_ext32u(s, TCG_REG_A0, base); + base =3D TCG_REG_A0; + } + if (guest_base) { + if (guest_base =3D=3D (int16_t)guest_base) { + tcg_out_opc_imm(s, ALIAS_PADDI, TCG_REG_A0, base, guest_ba= se); + } else { + tcg_out_opc_reg(s, ALIAS_PADD, TCG_REG_A0, base, + TCG_GUEST_BASE_REG); + } + base =3D TCG_REG_A0; } - base =3D TCG_REG_A0; } -#endif =20 h->base =3D base; return ldst; @@ -2465,8 +2462,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } =20 -#ifndef CONFIG_SOFTMMU - if (guest_base !=3D (int16_t)guest_base) { + if (!tcg_use_softmmu && guest_base !=3D (int16_t)guest_base) { /* * The function call abi for n32 and n64 will have loaded $25 (t9) * with the address of the prologue, so we can use that instead @@ -2479,7 +2475,6 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_TARGET_REG_BITS =3D=3D 64 ? TCG_REG_T9 : 0); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif =20 if (TCG_TARGET_REG_BITS =3D=3D 64) { tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, tcg_target_call_iarg_regs= [1]); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084904; cv=none; d=zohomail.com; s=zohoarc; b=K0q+7eYINsOiab4YhG3WIWuwsHpO9fC0LqFoWI2N2/xEINr4DHVFTBlB4erch2SXsz/E51WUZiDa+0OpK6VFMS6XiICe4ldae0PE9o/EBLD61QKY43M9b0ro7Rg9mZRBLhkAAB4wujHeD9e32NGX7HmN5yR4GH1icyseGmRdvjE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084904; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UPfL8PRDqxISdNKDDtEx7VkZ1IZG1ok5c8lkQqcFV18=; b=cg7H7TcLzvPHRwIPsWb46XuoWUfvSUGGQmWR8ULUIAkMx3fJil8+Y9cVRWRdbtrt5zh4HQ1sNTyUqPiQHHD+bMTQ2tZUG8lKfxc5nSZACkOIY5/508sIskO0565QUAlDOrIc59BwWfvTJWf0BcDMIMd1oK9dMTq9Rk3Ql1XVC/k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084904385635.3273578172624; Mon, 23 Oct 2023 11:15:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRA-0005fz-MW; Mon, 23 Oct 2023 14:14:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzR4-0005bv-Aj for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:55 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR0-0008Fa-PR for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:53 -0400 Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-692c02adeefso2727381b3a.3 for ; Mon, 23 Oct 2023 11:13:50 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084829; x=1698689629; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UPfL8PRDqxISdNKDDtEx7VkZ1IZG1ok5c8lkQqcFV18=; b=fxwrrxhbG8eoYGrDWSp0ObVXQVIQFX2EHfm2PwwwXqiRsIsfZg2qoBvQxdlhLfpn4j tDnGcmxnFeLUAAS0QhOvbEkiUIgaewo35bWw6tTA2ZrW/PCzxFPHYuguhLoxpT2BP8/t iTJrxAQklao1N2Rzg0PlvGVjgJAq9ojk0BN100GruLwc6YNnHBEdyaLSMAxJAWQYF3VS F0l8A4JSDOaexLMZ5hJsFKACo4qtmrlp4EGCvZ09Jw012bzC2cKwNi1bYIxFRwdkWoOy 6FpA7dUWTnE6oTigkzJZ5hfSU7ZM5N4HB74OH0DJixuqdIrD9GnQLFEwhXq6JWx6IWOs IoJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084829; x=1698689629; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UPfL8PRDqxISdNKDDtEx7VkZ1IZG1ok5c8lkQqcFV18=; b=Eqm9geA+1FKMhqePbtQzy65Mo1YukkOq5syR2w+K+4aOpE6mDW03RmD6OW/ZeA0WyC yKm3EmiUqYvbXsQV2UkNTS1jsnkUJwYD5iD4QTEha0t4C1lAZS3IxNUv9REfBGXihQGx /nizj34xwa5bq+2uPYrnPj0bPVkD+lDwsAqGA3l8Mz3a1iFtRZLa0O3IUFSXC7Lab4/N 3WJR2gTY/QnsOYSFs3miFFw+LnLGNOq4Tr6trb0s2gJOUjixwUe1VJWtL3CpAU7JSvTa aJ62HJDNoX3bvo603MInlX7a6RAPg0LZhxwnh+s4CLh8XxsEjN4GHqdXVoi4Kl92O/mW VZTg== X-Gm-Message-State: AOJu0YzgB4nQIa5fYSs3M8bdRiCwdAF3vL5wr4kHqVCtWFdbv8GbSY0C qxhdNADfSYOXRShgE8JOSXk7AhZTSI3gP7Cvma8= X-Google-Smtp-Source: AGHT+IFt7ApQw9OIC7l93hyO2NpME1rbo+sh2uhxJkwMXYcidoyA6U1vq/EVHx0N61zU8Xe4lISfmA== X-Received: by 2002:a05:6a00:2e8e:b0:666:e1f4:5153 with SMTP id fd14-20020a056a002e8e00b00666e1f45153mr8650257pfb.0.1698084829375; Mon, 23 Oct 2023 11:13:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 21/38] tcg/ppc: Use tcg_use_softmmu Date: Mon, 23 Oct 2023 11:13:12 -0700 Message-Id: <20231023181329.171490-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084904804100003 Fix TCG_GUEST_BASE_REG to use 'TCG_REG_R30' instead of '30'. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 284 ++++++++++++++++++++------------------- 1 file changed, 143 insertions(+), 141 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index c31da4da9d..856c3b18f5 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -107,9 +107,7 @@ =20 #define have_isel (cpuinfo & CPUINFO_ISEL) =20 -#ifndef CONFIG_SOFTMMU -#define TCG_GUEST_BASE_REG 30 -#endif +#define TCG_GUEST_BASE_REG TCG_REG_R30 =20 #ifdef CONFIG_DEBUG_TCG static const char tcg_target_reg_names[TCG_TARGET_NB_REGS][4] =3D { @@ -2317,151 +2315,157 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGCon= text *s, HostAddress *h, s_bits =3D=3D MO_128); a_bits =3D h->aa.align; =20 -#ifdef CONFIG_SOFTMMU - int mem_index =3D get_mmuidx(oi); - int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write); - int fast_off =3D tlb_mask_table_ofs(s, mem_index); - int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); - int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); + if (tcg_use_softmmu) { + int mem_index =3D get_mmuidx(oi); + int cmp_off =3D is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write); + int fast_off =3D tlb_mask_table_ofs(s, mem_index); + int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); + int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addrlo; - ldst->addrhi_reg =3D addrhi; - - /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, mask_off); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_AREG0, table_off); - - /* Extract the page index, shifted into place for tlb index. */ - if (TCG_TARGET_REG_BITS =3D=3D 32) { - tcg_out_shri32(s, TCG_REG_R0, addrlo, - s->page_bits - CPU_TLB_ENTRY_BITS); - } else { - tcg_out_shri64(s, TCG_REG_R0, addrlo, - s->page_bits - CPU_TLB_ENTRY_BITS); - } - tcg_out32(s, AND | SAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_R0)); - - /* - * Load the (low part) TLB comparator into TMP2. - * For 64-bit host, always load the entire 64-bit slot for simplicity. - * We will ignore the high bits with tcg_out_cmp(..., addr_type). - */ - if (TCG_TARGET_REG_BITS =3D=3D 64) { - if (cmp_off =3D=3D 0) { - tcg_out32(s, LDUX | TAB(TCG_REG_TMP2, TCG_REG_TMP1, TCG_REG_TM= P2)); - } else { - tcg_out32(s, ADD | TAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP= 2)); - tcg_out_ld(s, TCG_TYPE_I64, TCG_REG_TMP2, TCG_REG_TMP1, cmp_of= f); - } - } else if (cmp_off =3D=3D 0 && !HOST_BIG_ENDIAN) { - tcg_out32(s, LWZUX | TAB(TCG_REG_TMP2, TCG_REG_TMP1, TCG_REG_TMP2)= ); - } else { - tcg_out32(s, ADD | TAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP2)); - tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2, TCG_REG_TMP1, - cmp_off + 4 * HOST_BIG_ENDIAN); - } - - /* - * Load the TLB addend for use on the fast path. - * Do this asap to minimize any load use delay. - */ - if (TCG_TARGET_REG_BITS =3D=3D 64 || addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, - offsetof(CPUTLBEntry, addend)); - } - - /* Clear the non-page, non-alignment bits from the address in R0. */ - if (TCG_TARGET_REG_BITS =3D=3D 32) { - /* - * We don't support unaligned accesses on 32-bits. - * Preserve the bottom bits and thus trigger a comparison - * failure on unaligned accesses. - */ - if (a_bits < s_bits) { - a_bits =3D s_bits; - } - tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0, - (32 - a_bits) & 31, 31 - s->page_bits); - } else { - TCGReg t =3D addrlo; - - /* - * If the access is unaligned, we need to make sure we fail if we - * cross a page boundary. The trick is to add the access size-1 - * to the address before masking the low bits. That will make the - * address overflow to the next page if we cross a page boundary, - * which will then force a mismatch of the TLB compare. - */ - if (a_bits < s_bits) { - unsigned a_mask =3D (1 << a_bits) - 1; - unsigned s_mask =3D (1 << s_bits) - 1; - tcg_out32(s, ADDI | TAI(TCG_REG_R0, t, s_mask - a_mask)); - t =3D TCG_REG_R0; - } - - /* Mask the address for the requested alignment. */ - if (addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_rlw(s, RLWINM, TCG_REG_R0, t, 0, - (32 - a_bits) & 31, 31 - s->page_bits); - } else if (a_bits =3D=3D 0) { - tcg_out_rld(s, RLDICR, TCG_REG_R0, t, 0, 63 - s->page_bits); - } else { - tcg_out_rld(s, RLDICL, TCG_REG_R0, t, - 64 - s->page_bits, s->page_bits - a_bits); - tcg_out_rld(s, RLDICL, TCG_REG_R0, TCG_REG_R0, s->page_bits, 0= ); - } - } - - if (TCG_TARGET_REG_BITS =3D=3D 32 && addr_type !=3D TCG_TYPE_I32) { - /* Low part comparison into cr7. */ - tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, - 0, 7, TCG_TYPE_I32); - - /* Load the high part TLB comparator into TMP2. */ - tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2, TCG_REG_TMP1, - cmp_off + 4 * !HOST_BIG_ENDIAN); - - /* Load addend, deferred for this case. */ - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, - offsetof(CPUTLBEntry, addend)); - - /* High part comparison into cr6. */ - tcg_out_cmp(s, TCG_COND_EQ, addrhi, TCG_REG_TMP2, 0, 6, TCG_TYPE_I= 32); - - /* Combine comparisons into cr7. */ - tcg_out32(s, CRAND | BT(7, CR_EQ) | BA(6, CR_EQ) | BB(7, CR_EQ)); - } else { - /* Full comparison into cr7. */ - tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, 0, 7, addr_t= ype); - } - - /* Load a pointer into the current opcode w/conditional branch-link. */ - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); - - h->base =3D TCG_REG_TMP1; -#else - if (a_bits) { ldst =3D new_ldst_label(s); ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addrlo; ldst->addrhi_reg =3D addrhi; =20 - /* We are expecting a_bits to max out at 7, much lower than ANDI. = */ - tcg_debug_assert(a_bits < 16); - tcg_out32(s, ANDI | SAI(addrlo, TCG_REG_R0, (1 << a_bits) - 1)); + /* Load tlb_mask[mmu_idx] and tlb_table[mmu_idx]. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, mask_off); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_AREG0, table_off); =20 + /* Extract the page index, shifted into place for tlb index. */ + if (TCG_TARGET_REG_BITS =3D=3D 32) { + tcg_out_shri32(s, TCG_REG_R0, addrlo, + s->page_bits - CPU_TLB_ENTRY_BITS); + } else { + tcg_out_shri64(s, TCG_REG_R0, addrlo, + s->page_bits - CPU_TLB_ENTRY_BITS); + } + tcg_out32(s, AND | SAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_R0)); + + /* + * Load the (low part) TLB comparator into TMP2. + * For 64-bit host, always load the entire 64-bit slot for simplic= ity. + * We will ignore the high bits with tcg_out_cmp(..., addr_type). + */ + if (TCG_TARGET_REG_BITS =3D=3D 64) { + if (cmp_off =3D=3D 0) { + tcg_out32(s, LDUX | TAB(TCG_REG_TMP2, + TCG_REG_TMP1, TCG_REG_TMP2)); + } else { + tcg_out32(s, ADD | TAB(TCG_REG_TMP1, + TCG_REG_TMP1, TCG_REG_TMP2)); + tcg_out_ld(s, TCG_TYPE_I64, TCG_REG_TMP2, + TCG_REG_TMP1, cmp_off); + } + } else if (cmp_off =3D=3D 0 && !HOST_BIG_ENDIAN) { + tcg_out32(s, LWZUX | TAB(TCG_REG_TMP2, + TCG_REG_TMP1, TCG_REG_TMP2)); + } else { + tcg_out32(s, ADD | TAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP= 2)); + tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2, TCG_REG_TMP1, + cmp_off + 4 * HOST_BIG_ENDIAN); + } + + /* + * Load the TLB addend for use on the fast path. + * Do this asap to minimize any load use delay. + */ + if (TCG_TARGET_REG_BITS =3D=3D 64 || addr_type =3D=3D TCG_TYPE_I32= ) { + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, + offsetof(CPUTLBEntry, addend)); + } + + /* Clear the non-page, non-alignment bits from the address in R0. = */ + if (TCG_TARGET_REG_BITS =3D=3D 32) { + /* + * We don't support unaligned accesses on 32-bits. + * Preserve the bottom bits and thus trigger a comparison + * failure on unaligned accesses. + */ + if (a_bits < s_bits) { + a_bits =3D s_bits; + } + tcg_out_rlw(s, RLWINM, TCG_REG_R0, addrlo, 0, + (32 - a_bits) & 31, 31 - s->page_bits); + } else { + TCGReg t =3D addrlo; + + /* + * If the access is unaligned, we need to make sure we fail if= we + * cross a page boundary. The trick is to add the access size= -1 + * to the address before masking the low bits. That will make= the + * address overflow to the next page if we cross a page bounda= ry, + * which will then force a mismatch of the TLB compare. + */ + if (a_bits < s_bits) { + unsigned a_mask =3D (1 << a_bits) - 1; + unsigned s_mask =3D (1 << s_bits) - 1; + tcg_out32(s, ADDI | TAI(TCG_REG_R0, t, s_mask - a_mask)); + t =3D TCG_REG_R0; + } + + /* Mask the address for the requested alignment. */ + if (addr_type =3D=3D TCG_TYPE_I32) { + tcg_out_rlw(s, RLWINM, TCG_REG_R0, t, 0, + (32 - a_bits) & 31, 31 - s->page_bits); + } else if (a_bits =3D=3D 0) { + tcg_out_rld(s, RLDICR, TCG_REG_R0, t, 0, 63 - s->page_bits= ); + } else { + tcg_out_rld(s, RLDICL, TCG_REG_R0, t, + 64 - s->page_bits, s->page_bits - a_bits); + tcg_out_rld(s, RLDICL, TCG_REG_R0, TCG_REG_R0, s->page_bit= s, 0); + } + } + + if (TCG_TARGET_REG_BITS =3D=3D 32 && addr_type !=3D TCG_TYPE_I32) { + /* Low part comparison into cr7. */ + tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, + 0, 7, TCG_TYPE_I32); + + /* Load the high part TLB comparator into TMP2. */ + tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2, TCG_REG_TMP1, + cmp_off + 4 * !HOST_BIG_ENDIAN); + + /* Load addend, deferred for this case. */ + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1, + offsetof(CPUTLBEntry, addend)); + + /* High part comparison into cr6. */ + tcg_out_cmp(s, TCG_COND_EQ, addrhi, TCG_REG_TMP2, + 0, 6, TCG_TYPE_I32); + + /* Combine comparisons into cr7. */ + tcg_out32(s, CRAND | BT(7, CR_EQ) | BA(6, CR_EQ) | BB(7, CR_EQ= )); + } else { + /* Full comparison into cr7. */ + tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, + 0, 7, addr_type); + } + + /* Load a pointer into the current opcode w/conditional branch-lin= k. */ ldst->label_ptr[0] =3D s->code_ptr; - tcg_out32(s, BC | BI(0, CR_EQ) | BO_COND_FALSE | LK); - } + tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK); =20 - h->base =3D guest_base ? TCG_GUEST_BASE_REG : 0; -#endif + h->base =3D TCG_REG_TMP1; + } else { + if (a_bits) { + ldst =3D new_ldst_label(s); + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addrlo; + ldst->addrhi_reg =3D addrhi; + + /* We are expecting a_bits to max out at 7, much lower than AN= DI. */ + tcg_debug_assert(a_bits < 16); + tcg_out32(s, ANDI | SAI(addrlo, TCG_REG_R0, (1 << a_bits) - 1)= ); + + ldst->label_ptr[0] =3D s->code_ptr; + tcg_out32(s, BC | BI(0, CR_EQ) | BO_COND_FALSE | LK); + } + + h->base =3D guest_base ? TCG_GUEST_BASE_REG : 0; + } =20 if (TCG_TARGET_REG_BITS =3D=3D 64 && addr_type =3D=3D TCG_TYPE_I32) { /* Zero-extend the guest address for use in the host address. */ @@ -2695,12 +2699,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) } tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_R1, FRAME_SIZE+LR_OFFS= ET); =20 -#ifndef CONFIG_SOFTMMU - if (guest_base) { + if (!tcg_use_softmmu && guest_base) { tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base, = true); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out32(s, MTSPR | RS(tcg_target_call_iarg_regs[1]) | CTR); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085014; cv=none; d=zohomail.com; s=zohoarc; b=fx2MBckz3XSVLxTYQOgMwkrPTKNVtNgyGEd9csroNa19e2xaoncGVX8qi5aavj+3osO+Ck3LGKdaOzN9z+5Zg1XkoKrKbf/TVu0MY1vpULkxo2DH67EASETu541fqRhWycjYmo+TLoyJVDjtv6CS0h/UUzl0LEvUQlE1kjJA9u8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085014; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=Gscgf9TaNURfjEVsbC8XIQGIbXkPOrKC3iA1FwA6PsE=; b=C1H8D0pRwax7AAuWKuyF5qlZJm3On72sLMiu01NISMwtgWxwOYNNUKJAFJz5X06wK6rCl23R4bhIDhEZhf8YhgMeUNzGYY1FBxj5WPOOgeLGDpxFU9bahigI9gTLoqV+REezTi7GEMYk7xA36TENwNsdbIkJlIVf+uTdhFSiON4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169808501455750.13441654972462; Mon, 23 Oct 2023 11:16:54 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRD-0005if-No; Mon, 23 Oct 2023 14:14:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzR3-0005bo-98 for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:54 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR1-0008Fy-Hc for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:52 -0400 Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6be0277c05bso2742232b3a.0 for ; Mon, 23 Oct 2023 11:13:51 -0700 (PDT) Received: from stoup.. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085015108100005 Content-Type: text/plain; charset="utf-8" Fixes: 92c041c59b ("tcg/riscv: Add the prologue generation and register the= JIT") Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index d6dbcaf3cb..dc71f829d1 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -2076,8 +2076,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) } =20 #if !defined(CONFIG_SOFTMMU) - tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); - tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + if (guest_base) { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); + tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); + } #endif =20 /* Call generated code */ --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084967; cv=none; d=zohomail.com; s=zohoarc; b=IUvVxaQZG7gtNb0PnGmtXE3Q6Bz5Gq/BEtUj8XdRdkQBBu1jbuS7y6NUFJWjVMZUXhbKtDH1MXsQpwxOddafRR4K3NLQvJz9taa8x59WovdH0ge387OPQg/2BMvu6z0v7qgKd7w42w0OgqYjKGg8vPEeHQ637CV1IIWH8SFJmbs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084967; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084969031100010 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 185 +++++++++++++++++++------------------ 1 file changed, 94 insertions(+), 91 deletions(-) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index dc71f829d1..34e10e77d9 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -1245,105 +1245,110 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGCon= text *s, TCGReg *pbase, aa =3D atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, false); a_mask =3D (1u << aa.align) - 1; =20 -#ifdef CONFIG_SOFTMMU - unsigned s_bits =3D opc & MO_SIZE; - unsigned s_mask =3D (1u << s_bits) - 1; - int mem_index =3D get_mmuidx(oi); - int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); - int mask_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, mask); - int table_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, table); - int compare_mask; - TCGReg addr_adj; + if (tcg_use_softmmu) { + unsigned s_bits =3D opc & MO_SIZE; + unsigned s_mask =3D (1u << s_bits) - 1; + int mem_index =3D get_mmuidx(oi); + int fast_ofs =3D tlb_mask_table_ofs(s, mem_index); + int mask_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, mask); + int table_ofs =3D fast_ofs + offsetof(CPUTLBDescFast, table); + int compare_mask; + TCGReg addr_adj; =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addr_reg; - - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs); - - tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP2, addr_reg, - s->page_bits - CPU_TLB_ENTRY_BITS); - tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP0); - tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1); - - /* - * For aligned accesses, we check the first byte and include the align= ment - * bits within the address. For unaligned access, we check that we do= n't - * cross pages using the address of the last byte of the access. - */ - addr_adj =3D addr_reg; - if (a_mask < s_mask) { - addr_adj =3D TCG_REG_TMP0; - tcg_out_opc_imm(s, addr_type =3D=3D TCG_TYPE_I32 ? OPC_ADDIW : OPC= _ADDI, - addr_adj, addr_reg, s_mask - a_mask); - } - compare_mask =3D s->page_mask | a_mask; - if (compare_mask =3D=3D sextreg(compare_mask, 0, 12)) { - tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addr_adj, compare_mask); - } else { - tcg_out_movi(s, addr_type, TCG_REG_TMP1, compare_mask); - tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP1, TCG_REG_TMP1, addr_adj); - } - - /* Load the tlb comparator and the addend. */ - QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); - tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, - is_ld ? offsetof(CPUTLBEntry, addr_read) - : offsetof(CPUTLBEntry, addr_write)); - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2, - offsetof(CPUTLBEntry, addend)); - - /* Compare masked address with the TLB entry. */ - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP0, TCG_REG_TMP1, 0); - - /* TLB Hit - translate address using addend. */ - if (addr_type !=3D TCG_TYPE_I32) { - tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, addr_reg, TCG_REG_TMP2); - } else if (have_zba) { - tcg_out_opc_reg(s, OPC_ADD_UW, TCG_REG_TMP0, addr_reg, TCG_REG_TMP= 2); - } else { - tcg_out_ext32u(s, TCG_REG_TMP0, addr_reg); - tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, TCG_REG_TMP0, TCG_REG_TM= P2); - } - *pbase =3D TCG_REG_TMP0; -#else - TCGReg base; - - if (a_mask) { ldst =3D new_ldst_label(s); ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addr_reg; =20 - /* We are expecting alignment max 7, so we can always use andi. */ - tcg_debug_assert(a_mask =3D=3D sextreg(a_mask, 0, 12)); - tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addr_reg, a_mask); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_AREG0, mask_ofs); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs); =20 - ldst->label_ptr[0] =3D s->code_ptr; - tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP1, TCG_REG_ZERO, 0); - } + tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP2, addr_reg, + s->page_bits - CPU_TLB_ENTRY_BITS); + tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TM= P0); + tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TM= P1); =20 - if (guest_base !=3D 0) { - base =3D TCG_REG_TMP0; - if (addr_type !=3D TCG_TYPE_I32) { - tcg_out_opc_reg(s, OPC_ADD, base, addr_reg, TCG_GUEST_BASE_REG= ); - } else if (have_zba) { - tcg_out_opc_reg(s, OPC_ADD_UW, base, addr_reg, TCG_GUEST_BASE_= REG); - } else { - tcg_out_ext32u(s, base, addr_reg); - tcg_out_opc_reg(s, OPC_ADD, base, base, TCG_GUEST_BASE_REG); + /* + * For aligned accesses, we check the first byte and include the + * alignment bits within the address. For unaligned access, we + * check that we don't cross pages using the address of the last + * byte of the access. + */ + addr_adj =3D addr_reg; + if (a_mask < s_mask) { + addr_adj =3D TCG_REG_TMP0; + tcg_out_opc_imm(s, addr_type =3D=3D TCG_TYPE_I32 ? OPC_ADDIW := OPC_ADDI, + addr_adj, addr_reg, s_mask - a_mask); } - } else if (addr_type !=3D TCG_TYPE_I32) { - base =3D addr_reg; + compare_mask =3D s->page_mask | a_mask; + if (compare_mask =3D=3D sextreg(compare_mask, 0, 12)) { + tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addr_adj, compare_m= ask); + } else { + tcg_out_movi(s, addr_type, TCG_REG_TMP1, compare_mask); + tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP1, TCG_REG_TMP1, addr_a= dj); + } + + /* Load the tlb comparator and the addend. */ + QEMU_BUILD_BUG_ON(HOST_BIG_ENDIAN); + tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP2, + is_ld ? offsetof(CPUTLBEntry, addr_read) + : offsetof(CPUTLBEntry, addr_write)); + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP2, TCG_REG_TMP2, + offsetof(CPUTLBEntry, addend)); + + /* Compare masked address with the TLB entry. */ + ldst->label_ptr[0] =3D s->code_ptr; + tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP0, TCG_REG_TMP1, 0); + + /* TLB Hit - translate address using addend. */ + if (addr_type !=3D TCG_TYPE_I32) { + tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, addr_reg, TCG_REG_TM= P2); + } else if (have_zba) { + tcg_out_opc_reg(s, OPC_ADD_UW, TCG_REG_TMP0, + addr_reg, TCG_REG_TMP2); + } else { + tcg_out_ext32u(s, TCG_REG_TMP0, addr_reg); + tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, + TCG_REG_TMP0, TCG_REG_TMP2); + } + *pbase =3D TCG_REG_TMP0; } else { - base =3D TCG_REG_TMP0; - tcg_out_ext32u(s, base, addr_reg); + TCGReg base; + + if (a_mask) { + ldst =3D new_ldst_label(s); + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addr_reg; + + /* We are expecting alignment max 7, so we can always use andi= . */ + tcg_debug_assert(a_mask =3D=3D sextreg(a_mask, 0, 12)); + tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_TMP1, addr_reg, a_mask); + + ldst->label_ptr[0] =3D s->code_ptr; + tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP1, TCG_REG_ZERO, 0); + } + + if (guest_base !=3D 0) { + base =3D TCG_REG_TMP0; + if (addr_type !=3D TCG_TYPE_I32) { + tcg_out_opc_reg(s, OPC_ADD, base, addr_reg, + TCG_GUEST_BASE_REG); + } else if (have_zba) { + tcg_out_opc_reg(s, OPC_ADD_UW, base, addr_reg, + TCG_GUEST_BASE_REG); + } else { + tcg_out_ext32u(s, base, addr_reg); + tcg_out_opc_reg(s, OPC_ADD, base, base, TCG_GUEST_BASE_REG= ); + } + } else if (addr_type !=3D TCG_TYPE_I32) { + base =3D addr_reg; + } else { + base =3D TCG_REG_TMP0; + tcg_out_ext32u(s, base, addr_reg); + } + *pbase =3D base; } - *pbase =3D base; -#endif =20 return ldst; } @@ -2075,12 +2080,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } =20 -#if !defined(CONFIG_SOFTMMU) - if (guest_base) { + if (!tcg_use_softmmu && guest_base) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif =20 /* Call generated code */ tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084940942100003 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 161 ++++++++++++++++++------------------- 1 file changed, 79 insertions(+), 82 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 4ef9ac3d5b..fbee43d3b0 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -46,9 +46,7 @@ /* A scratch register that may be be used throughout the backend. */ #define TCG_TMP0 TCG_REG_R1 =20 -#ifndef CONFIG_SOFTMMU #define TCG_GUEST_BASE_REG TCG_REG_R13 -#endif =20 /* All of the following instructions are prefixed with their instruction format, and are defined as 8- or 16-bit quantities, even when the two @@ -1768,94 +1766,95 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGConte= xt *s, HostAddress *h, h->aa =3D atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, s_bits =3D= =3D MO_128); a_mask =3D (1 << h->aa.align) - 1; =20 -#ifdef CONFIG_SOFTMMU - unsigned s_mask =3D (1 << s_bits) - 1; - int mem_index =3D get_mmuidx(oi); - int fast_off =3D tlb_mask_table_ofs(s, mem_index); - int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); - int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); - int ofs, a_off; - uint64_t tlb_mask; + if (tcg_use_softmmu) { + unsigned s_mask =3D (1 << s_bits) - 1; + int mem_index =3D get_mmuidx(oi); + int fast_off =3D tlb_mask_table_ofs(s, mem_index); + int mask_off =3D fast_off + offsetof(CPUTLBDescFast, mask); + int table_off =3D fast_off + offsetof(CPUTLBDescFast, table); + int ofs, a_off; + uint64_t tlb_mask; =20 - ldst =3D new_ldst_label(s); - ldst->is_ld =3D is_ld; - ldst->oi =3D oi; - ldst->addrlo_reg =3D addr_reg; - - tcg_out_sh64(s, RSY_SRLG, TCG_TMP0, addr_reg, TCG_REG_NONE, - s->page_bits - CPU_TLB_ENTRY_BITS); - - tcg_out_insn(s, RXY, NG, TCG_TMP0, TCG_AREG0, TCG_REG_NONE, mask_off); - tcg_out_insn(s, RXY, AG, TCG_TMP0, TCG_AREG0, TCG_REG_NONE, table_off); - - /* - * For aligned accesses, we check the first byte and include the align= ment - * bits within the address. For unaligned access, we check that we do= n't - * cross pages using the address of the last byte of the access. - */ - a_off =3D (a_mask >=3D s_mask ? 0 : s_mask - a_mask); - tlb_mask =3D (uint64_t)s->page_mask | a_mask; - if (a_off =3D=3D 0) { - tgen_andi_risbg(s, TCG_REG_R0, addr_reg, tlb_mask); - } else { - tcg_out_insn(s, RX, LA, TCG_REG_R0, addr_reg, TCG_REG_NONE, a_off); - tgen_andi(s, addr_type, TCG_REG_R0, tlb_mask); - } - - if (is_ld) { - ofs =3D offsetof(CPUTLBEntry, addr_read); - } else { - ofs =3D offsetof(CPUTLBEntry, addr_write); - } - if (addr_type =3D=3D TCG_TYPE_I32) { - ofs +=3D HOST_BIG_ENDIAN * 4; - tcg_out_insn(s, RX, C, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs); - } else { - tcg_out_insn(s, RXY, CG, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs); - } - - tcg_out16(s, RI_BRC | (S390_CC_NE << 4)); - ldst->label_ptr[0] =3D s->code_ptr++; - - h->index =3D TCG_TMP0; - tcg_out_insn(s, RXY, LG, h->index, TCG_TMP0, TCG_REG_NONE, - offsetof(CPUTLBEntry, addend)); - - if (addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_insn(s, RRE, ALGFR, h->index, addr_reg); - h->base =3D TCG_REG_NONE; - } else { - h->base =3D addr_reg; - } - h->disp =3D 0; -#else - if (a_mask) { ldst =3D new_ldst_label(s); ldst->is_ld =3D is_ld; ldst->oi =3D oi; ldst->addrlo_reg =3D addr_reg; =20 - /* We are expecting a_bits to max out at 7, much lower than TMLL. = */ - tcg_debug_assert(a_mask <=3D 0xffff); - tcg_out_insn(s, RI, TMLL, addr_reg, a_mask); + tcg_out_sh64(s, RSY_SRLG, TCG_TMP0, addr_reg, TCG_REG_NONE, + s->page_bits - CPU_TLB_ENTRY_BITS); =20 - tcg_out16(s, RI_BRC | (7 << 4)); /* CC in {1,2,3} */ + tcg_out_insn(s, RXY, NG, TCG_TMP0, TCG_AREG0, TCG_REG_NONE, mask_o= ff); + tcg_out_insn(s, RXY, AG, TCG_TMP0, TCG_AREG0, TCG_REG_NONE, table_= off); + + /* + * For aligned accesses, we check the first byte and include the + * alignment bits within the address. For unaligned access, we + * check that we don't cross pages using the address of the last + * byte of the access. + */ + a_off =3D (a_mask >=3D s_mask ? 0 : s_mask - a_mask); + tlb_mask =3D (uint64_t)s->page_mask | a_mask; + if (a_off =3D=3D 0) { + tgen_andi_risbg(s, TCG_REG_R0, addr_reg, tlb_mask); + } else { + tcg_out_insn(s, RX, LA, TCG_REG_R0, addr_reg, TCG_REG_NONE, a_= off); + tgen_andi(s, addr_type, TCG_REG_R0, tlb_mask); + } + + if (is_ld) { + ofs =3D offsetof(CPUTLBEntry, addr_read); + } else { + ofs =3D offsetof(CPUTLBEntry, addr_write); + } + if (addr_type =3D=3D TCG_TYPE_I32) { + ofs +=3D HOST_BIG_ENDIAN * 4; + tcg_out_insn(s, RX, C, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, ofs= ); + } else { + tcg_out_insn(s, RXY, CG, TCG_REG_R0, TCG_TMP0, TCG_REG_NONE, o= fs); + } + + tcg_out16(s, RI_BRC | (S390_CC_NE << 4)); ldst->label_ptr[0] =3D s->code_ptr++; - } =20 - h->base =3D addr_reg; - if (addr_type =3D=3D TCG_TYPE_I32) { - tcg_out_ext32u(s, TCG_TMP0, addr_reg); - h->base =3D TCG_TMP0; - } - if (guest_base < 0x80000) { - h->index =3D TCG_REG_NONE; - h->disp =3D guest_base; - } else { - h->index =3D TCG_GUEST_BASE_REG; + h->index =3D TCG_TMP0; + tcg_out_insn(s, RXY, LG, h->index, TCG_TMP0, TCG_REG_NONE, + offsetof(CPUTLBEntry, addend)); + + if (addr_type =3D=3D TCG_TYPE_I32) { + tcg_out_insn(s, RRE, ALGFR, h->index, addr_reg); + h->base =3D TCG_REG_NONE; + } else { + h->base =3D addr_reg; + } h->disp =3D 0; + } else { + if (a_mask) { + ldst =3D new_ldst_label(s); + ldst->is_ld =3D is_ld; + ldst->oi =3D oi; + ldst->addrlo_reg =3D addr_reg; + + /* We are expecting a_bits to max out at 7, much lower than TM= LL. */ + tcg_debug_assert(a_mask <=3D 0xffff); + tcg_out_insn(s, RI, TMLL, addr_reg, a_mask); + + tcg_out16(s, RI_BRC | (7 << 4)); /* CC in {1,2,3} */ + ldst->label_ptr[0] =3D s->code_ptr++; + } + + h->base =3D addr_reg; + if (addr_type =3D=3D TCG_TYPE_I32) { + tcg_out_ext32u(s, TCG_TMP0, addr_reg); + h->base =3D TCG_TMP0; + } + if (guest_base < 0x80000) { + h->index =3D TCG_REG_NONE; + h->disp =3D guest_base; + } else { + h->index =3D TCG_GUEST_BASE_REG; + h->disp =3D 0; + } } -#endif =20 return ldst; } @@ -3453,12 +3452,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_STATIC_CALL_ARGS_SIZE + TCG_TARGET_CALL_STACK_OFFSET, CPU_TEMP_BUF_NLONGS * sizeof(long)); =20 -#ifndef CONFIG_SOFTMMU - if (guest_base >=3D 0x80000) { + if (!tcg_use_softmmu && guest_base >=3D 0x80000) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif =20 tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084967; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084833; x=1698689633; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qq+/ocKlHxuwOLYzAnqcUyLG835LUOMki3n0K/cpOvs=; b=bsCcC0Sxvck583GAqCPuD772Xa9MTtQkm82jMrnyZweJyohV+oCmLuAApqA22vNwdM +hP6K61Dc+WXh9aHDYOXv4KeUFKOgw2F1UhmZu9ZrhmN5RYZ38trFEvJwS4laqriVjJV XsbjvJVsW/O9UC1d7lCqtByzUFoWLt0hX5c2JCAwFHVD3V6BATC5fFI021dcKorTfGJ4 N/hOSvdhI3w1v0OjTYHWw+vrSkgBrzvXQ7NyNU4jEc7n5osjeScluaYQS9ZE/PVdQlrO eviTalKJ4mKHflhMqisYDY8r3rumSswB28KNSVhQFGuRFsWdZti0acjoCNG0mnv83+k/ DykA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084833; x=1698689633; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qq+/ocKlHxuwOLYzAnqcUyLG835LUOMki3n0K/cpOvs=; b=nKYo7NeX0lDG2He6R0KLuqbapYCHPgVamzPhTMLTC6sFiX2JN0ZPH3dIpdhetfcchw 2P72egwF+2/6tqXghtu1f5KGltq5j+uT5xPsCDZZ0z8TfE3uET4Ijhmv9w/nGFfZ85NQ lMS2tr0WADOKlRV76jqjv6uhR8BQAWGgU3ZRwsPDd2IKSzaiSiXtKgqfV3BqipDvJxcO H7aSYkvJHFE30hF3yavOoY6aRXtQpvOGaNMB8Hn67I1g8dXSyYYPJzR18n/VU0BOMnGP QN2re2fTYKLOQ6RgqDM1Od20Hh2kpnBVq5+A8KrFVeGg4QYtwXCvr+cMWwZSv10h/aNv nLPA== X-Gm-Message-State: AOJu0YyL6m0R80I3k6aa8UYDRJT40+QxOUc0LKunwuSKbN3H9AAG/Y5r 9W+25B2OGY9JPTm3AbMV/Hokyqyn2gL+PGQ5SwI= X-Google-Smtp-Source: AGHT+IFefyQgv60OhoeVKFWEACFf/3/Rxu7G4QmTGsLgkNwlYpY7PSH5Y/3V3CgeQSRT5fgy0jECLQ== X-Received: by 2002:a05:6a21:3d85:b0:16b:d853:90be with SMTP id bj5-20020a056a213d8500b0016bd85390bemr386550pzc.25.1698084832813; Mon, 23 Oct 2023 11:13:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Mike Frysinger , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 25/38] tcg: drop unused tcg_temp_free define Date: Mon, 23 Oct 2023 11:13:16 -0700 Message-Id: <20231023181329.171490-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084968963100009 From: Mike Frysinger Use of the API was removed a while back, but the define wasn't. Signed-off-by: Mike Frysinger Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20231015010046.16020-1-vapier@gentoo.org> Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 80cfcf8104..3ead59e459 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -52,7 +52,6 @@ static inline void tcg_gen_insn_start(target_ulong pc, ta= rget_ulong a1, typedef TCGv_i32 TCGv; #define tcg_temp_new() tcg_temp_new_i32() #define tcg_global_mem_new tcg_global_mem_new_i32 -#define tcg_temp_free tcg_temp_free_i32 #define tcgv_tl_temp tcgv_i32_temp #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32 @@ -60,7 +59,6 @@ typedef TCGv_i32 TCGv; typedef TCGv_i64 TCGv; #define tcg_temp_new() tcg_temp_new_i64() #define tcg_global_mem_new tcg_global_mem_new_i64 -#define tcg_temp_free tcg_temp_free_i64 #define tcgv_tl_temp tcgv_i64_temp #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64 --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084939; cv=none; d=zohomail.com; s=zohoarc; b=I9iS+qFFiBPCS9k1U1l0easBdXMygkVasRi1rlrALpdVYcrSzVX4S/q/BCvB9qydCH+sIxKvCExQxe7K71vZP+gmrGA4Pk9r+hQLXuNC30bva7MJCIJlBgSt3Yb62fnxuqzFl/cdoG1eGDVZWX6a/WWXUrRFApUVr9l3XTcCXdE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084939; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=F3d0+LIJRpydd1LcLJpx5zgMPpG2uno1kweVdtXY0oQ=; b=NarLf5WeM8SRV6WMucD+YWCnRKR9U8qiwy/tf4X1NSKyoeeK0QaXmhnGXhaKDOFeNarSiHdQwLIQJ3Ig8T5+EPQ1F3aww351hrDeOsE23+9UItxmT5vsDs1DKOSEG2V0utt82DNMxAYBJbamYbOdEZpHedLplzzyXuFHu5bRcH8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084939293449.5141948571121; Mon, 23 Oct 2023 11:15:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRL-00068H-Dw; Mon, 23 Oct 2023 14:14:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzR9-0005ee-Do for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:59 -0400 Received: from mail-oa1-x31.google.com ([2001:4860:4864:20::31]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR6-0008Gq-Gy for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:13:59 -0400 Received: by mail-oa1-x31.google.com with SMTP id 586e51a60fabf-1ea05b3f228so2498128fac.1 for ; Mon, 23 Oct 2023 11:13:54 -0700 (PDT) Received: from stoup.. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::31; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084940909100002 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 393dbcd01c..c29355b67b 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -342,8 +342,8 @@ void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv= _i32 arg2) tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2); } else if (TCG_TARGET_HAS_div2_i32) { TCGv_i32 t0 =3D tcg_temp_ebb_new_i32(); - tcg_gen_movi_i32(t0, 0); - tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); + TCGv_i32 zero =3D tcg_constant_i32(0); + tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, zero, arg2); tcg_temp_free_i32(t0); } else { gen_helper_divu_i32(ret, arg1, arg2); @@ -362,8 +362,8 @@ void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv= _i32 arg2) tcg_temp_free_i32(t0); } else if (TCG_TARGET_HAS_div2_i32) { TCGv_i32 t0 =3D tcg_temp_ebb_new_i32(); - tcg_gen_movi_i32(t0, 0); - tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); + TCGv_i32 zero =3D tcg_constant_i32(0); + tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, zero, arg2); tcg_temp_free_i32(t0); } else { gen_helper_remu_i32(ret, arg1, arg2); @@ -1674,8 +1674,8 @@ void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TC= Gv_i64 arg2) tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2); } else if (TCG_TARGET_HAS_div2_i64) { TCGv_i64 t0 =3D tcg_temp_ebb_new_i64(); - tcg_gen_movi_i64(t0, 0); - tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); + TCGv_i64 zero =3D tcg_constant_i64(0); + tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, zero, arg2); tcg_temp_free_i64(t0); } else { gen_helper_divu_i64(ret, arg1, arg2); @@ -1694,8 +1694,8 @@ void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TC= Gv_i64 arg2) tcg_temp_free_i64(t0); } else if (TCG_TARGET_HAS_div2_i64) { TCGv_i64 t0 =3D tcg_temp_ebb_new_i64(); - tcg_gen_movi_i64(t0, 0); - tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); + TCGv_i64 zero =3D tcg_constant_i64(0); + tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, zero, arg2); tcg_temp_free_i64(t0); } else { gen_helper_remu_i64(ret, arg1, arg2); --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084835; x=1698689635; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=QOgygXHDxUHtfSFg6wMi8J9He8Jq0o2OiYkY7oLrEpM=; b=PrshqDM37Noanvu4ezPThl2V/kkmtx5+5ahssjfzCdSPfJJ+s6+ILW1AIMl/ja+OJb ll/teYNj7Ow0vTubsCIgb1Bz315I+NAPkOBkahxbjuaa5+3anBoCgjGTTfUSQAJZAVpb CQKHM5akfQ4O5Y9vncpzSC9/Bmcye7P55nZ1MLavda5zK5HwevFSUQcOkS5TDVtUo5PG J50ENOS0OWjdfbn3Ylzh+MVRcN60QOR7/mH+iG2tejg0g6rdr9SWa5lcK8HS/s3tBzcc /iGZag/Ys9aa+KJ7icZl448AsNsEdouj+IoMIWJwkrlv1BvIrSAkZV+HtP+pfx3ZZHOH 6YZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084835; x=1698689635; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QOgygXHDxUHtfSFg6wMi8J9He8Jq0o2OiYkY7oLrEpM=; b=R38Fu2g5bVOsECpGxG5jxoxLKsQB6tpwToRKhKvxleyozS5uXadUuQlNCeCEcBVKQz JGJNB/T56+ofobK/Rmt6frlrqi7xltJ9c4VBvI++KU+6up9ykPKy05ZxVJ497T6czwtw Htogk+6etaDmyvRNYBJYKPYQ9+8AH9uunp4Uu8BGYNxKimmdZY5wKCmW9ORdXXOR6Ql/ 9PvXgSrJYv/xhUvzLJptj8QdEeLm2XaUONACskVEMt5LTMwE4gGvLdgUiF0xQxoinGso LcPFoqV0+CM3M46SDn8rLN1HhKBj3soRy9Baj21nYasOcBDPiODm3JQdY7T2YJ/3Nalv 6lHA== X-Gm-Message-State: AOJu0YxmP515xfYlvR2SPVLJO6yqBV5r6ZsueCq7nAoJVTHpEiSrYE/s dZ68OfHXt7Xcb3QhYZVMfDCRV1u+0Y2qgNPzET0= X-Google-Smtp-Source: AGHT+IFfoN5L+vwHGQxHVykmb4r1VWURoJBJEG9/LtXKD8SsT9zEsTKEXIsdBntwPg3Cm/rGaR9xnA== X-Received: by 2002:a05:6a00:10c4:b0:6b8:780:94e5 with SMTP id d4-20020a056a0010c400b006b8078094e5mr8729053pfu.18.1698084834755; Mon, 23 Oct 2023 11:13:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 27/38] tcg: Optimize past conditional branches Date: Mon, 23 Oct 2023 11:13:18 -0700 Message-Id: <20231023181329.171490-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084870623100003 Content-Type: text/plain; charset="utf-8" We already register allocate through extended basic blocks, optimize through extended basic blocks as well. Signed-off-by: Richard Henderson --- tcg/optimize.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 3013eb04e6..2db5177c32 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -688,12 +688,14 @@ static void finish_folding(OptContext *ctx, TCGOp *op) int i, nb_oargs; =20 /* - * For an opcode that ends a BB, reset all temp data. - * We do no cross-BB optimization. + * We only optimize extended basic blocks. If the opcode ends a BB + * and is not a conditional branch, reset all temp data. */ if (def->flags & TCG_OPF_BB_END) { - memset(&ctx->temps_used, 0, sizeof(ctx->temps_used)); ctx->prev_mb =3D NULL; + if (!(def->flags & TCG_OPF_COND_BRANCH)) { + memset(&ctx->temps_used, 0, sizeof(ctx->temps_used)); + } return; } =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:12 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085007; cv=none; d=zohomail.com; s=zohoarc; b=BdFlWoB7SOhCjy3kf1xaM4PgCAgsP2ZsuiUlQOf6D/Vh/GscDAxHmpwYNaR8g26WtNi1U0aqv/alEQYUx+1UzRSjmzIcAJhRriBxpHJ/XNc5tCVN/dOopETLnnRXnVvzN2ylf4LKk82Cwaz++tYNu/k3oNIkOkSd80FDc0j0XDA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085007; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=i+3c/q3YHMTCq7WXcy5yo10z7tmQCbWln7ShYoiyjhk=; b=JT+4WZtXVEm5t4kzTdlFp9yVSrBSUv7MpvwzRFmYauqDxGrgYcUfjkWQQS5YjT0EmUr92mCz2vK6QNsaXhP088pbNhoAKnFhaNfbMFGm70d5WwR3506H5z44C2EWNJv1G1s0NP5HnJS7bBGCaj1S75UhCNABE9M8TqSrtDdtEWw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085007890129.309855519027; Mon, 23 Oct 2023 11:16:47 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRI-00061e-AC; Mon, 23 Oct 2023 14:14:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRA-0005g0-Kl for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:00 -0400 Received: from mail-oo1-xc2e.google.com ([2607:f8b0:4864:20::c2e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR7-0008H7-OT for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:00 -0400 Received: by mail-oo1-xc2e.google.com with SMTP id 006d021491bc7-5840fe01176so2283012eaf.1 for ; Mon, 23 Oct 2023 11:13:56 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084836; x=1698689636; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i+3c/q3YHMTCq7WXcy5yo10z7tmQCbWln7ShYoiyjhk=; b=IZjoJGwIRbcZYnoSriIOCMXL/4gz+pt+htEaHjH5/EQo547t4i0vdtbceSj2KYTV+h i++8x904Qo3ArOP8zhJLSxjeULtqWNuE7ajrP/ZzSi711i3bflcwmzEU42gj+77mEDBK SMonMEXN207HQtRvdbdVtsfta0bp7IF38vh9xO7bp/g0lO3KeSKne62m+guF36beTk72 NSdqjlo3fH7/IY2aUJwQXxvEOZY0d0ITLaBA3N+k0umkCluCBmV5K/AK4tboU48rHLEu lfhjIzN+80DBAU7Zc9JaYGqiUoA9IQ7mIU9swr3TIGXS6kqbH4bghKo1loqm0yIdHt/F M6eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084836; x=1698689636; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i+3c/q3YHMTCq7WXcy5yo10z7tmQCbWln7ShYoiyjhk=; b=QlqECqXRprfc8pbK1an8Wx5bLp8Dg3q7sc9tfG0ptUWeolVd4Z3aCG77kcUVb+WPOO uZftTlwjZVkye0VnpWFxpsgoz62tAMcpxbTFiN66OfRsiA+e6JoAzJRSGaRmkgzWU00e OwQJAkDorQLHMBYIQoJA1xbyit6i4y4DmtFMAw8AmZCK7zQlO3L4A848DcukM89hg5Xv Of8qMdNyO/6PxCf/F07OqDPU34eyfO9s0EUKNWS0HDDKsWfF/QB/XsV/ADIJpHWC+Ol1 UfstV9RjtKdCHf3pGSQlx8+4ZfqH6qV3+wMwf9/2ZvFxjcI2LenPm1Ite9ZyAhMjmIIT DqaA== X-Gm-Message-State: AOJu0Yy9bRgRfG6I3ok9hUzZIrl6Nclmu8edKUmtn2SMi/T+E9/qlTgG KXzxP7sPWnelGMObDlINHW8kWvpVdTX/AJo5WdA= X-Google-Smtp-Source: AGHT+IGZGsesex72tWOxHZmSLV1vK6zxZWHSCRoLZQnljIhS0SqGHGG1WqwiXm7X/encjabcc94PsQ== X-Received: by 2002:a05:6358:5bc8:b0:168:e469:7530 with SMTP id i8-20020a0563585bc800b00168e4697530mr2610905rwf.32.1698084835820; Mon, 23 Oct 2023 11:13:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 28/38] tcg: Add tcg_gen_{ld,st}_i128 Date: Mon, 23 Oct 2023 11:13:19 -0700 Message-Id: <20231023181329.171490-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2e; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085009367100005 Do not require the translators to jump through concat and extract of i64 in order to move values to and from env. Tested-by: Song Gao Reviewed-by: Song Gao Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg-op-common.h | 3 +++ tcg/tcg-op.c | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index 2048f92b5e..56d4e9cb9f 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -747,6 +747,9 @@ void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src); void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg); void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi); =20 +void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset); +void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset); + static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i6= 4 hi) { tcg_gen_deposit_i64(ret, lo, hi, 32, 32); diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index c29355b67b..b4dbb2f2ba 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2880,6 +2880,28 @@ void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src) } } =20 +void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset) +{ + if (HOST_BIG_ENDIAN) { + tcg_gen_ld_i64(TCGV128_HIGH(ret), base, offset); + tcg_gen_ld_i64(TCGV128_LOW(ret), base, offset + 8); + } else { + tcg_gen_ld_i64(TCGV128_LOW(ret), base, offset); + tcg_gen_ld_i64(TCGV128_HIGH(ret), base, offset + 8); + } +} + +void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset) +{ + if (HOST_BIG_ENDIAN) { + tcg_gen_st_i64(TCGV128_HIGH(val), base, offset); + tcg_gen_st_i64(TCGV128_LOW(val), base, offset + 8); + } else { + tcg_gen_st_i64(TCGV128_LOW(val), base, offset); + tcg_gen_st_i64(TCGV128_HIGH(val), base, offset + 8); + } +} + /* QEMU specific operations. */ =20 void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx) --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084905; cv=none; d=zohomail.com; s=zohoarc; b=BjxFkCZ5nDkklg3n0tSSeGPUAzgSY40eCveMj2PaUGdK3VzFB9VO8oIOFPL0vkbt9npXl+qQJNf2CZ8Usnd28ya9BK/xXFzit9Lzg73j45lLDLHHHaxM3ixKgd5iB5LOEkVg8kQK0y9i2mnihGBJxK85+mf25G7qjJX/ha3jNMg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084905; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=/+snroCXssJGe4IIYkDLyy8cs4QbLodfmBU5jWNYWK4=; b=UI0l3atLxObwY09YJxDbkxlrXH8XLT9aEbnOKuI65ioU1b/aY5NUHQLEt1ExFy4dfGDpP4Xnb1V5KKTLaFcGvtuaPHqcqvvUS7dKYJBfMQIrWqmRT7Q0JE1X/CqrdmIdWefeVJno4ka7rd31qxgh6CVUG5fKUUvzFU/l3RYhXBo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084905978173.7769920380946; Mon, 23 Oct 2023 11:15:05 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRF-0005nW-N6; Mon, 23 Oct 2023 14:14:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRB-0005h7-CF for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:01 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR8-0008HH-Mq for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:00 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6b9af7d41d2so2967446b3a.0 for ; Mon, 23 Oct 2023 11:13:57 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084837; x=1698689637; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=/+snroCXssJGe4IIYkDLyy8cs4QbLodfmBU5jWNYWK4=; b=XSg1ExP6acc9Vzx3uYkyP4sRL8IiyVW39KX/D32XpG7+qOAFy4rMwoAz9ZPTBsfScL THZEtsDSZ0Fsh2aLROPV0piwP2w/6xuSmzxmM31eyL/DxxaZzJLZNOyO2dX1NO4CK9Bj qlEPBYeYdNjVgx7956steRX8UprdlzlB5GCqtcBhb5KPMjpbD59vvTPvFzyYlyXr5yk1 XeWZWSLWb9/f+gwXzMS7eovWHCMiFQnJolmXAfe4aQ/7/vWS2j6amEtJZgKt8Q2ku0aH INA/BGBDQDJxqu4tp3DSAY7fdeNF2zKrKR6MKaqMGKtxvDot0DgywNY55kb4S0kfbLkr pVpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084837; x=1698689637; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/+snroCXssJGe4IIYkDLyy8cs4QbLodfmBU5jWNYWK4=; b=Sbe4Xp9lyiXJ+Tq/TVwh9YGLa4fWkpojrYK3exNPXW+jxH39fZ0ah1fQ8oeQRRAOu7 822NsRIo+n/rdNphJhgIXMOWNESlAkwkdU+YgjGHwFx+4EKznloBicn9PJ4uiUAMHmN0 1NY0aKsw0yolHI92xAjatKJfDQsh+vfnj9wD3+ogL1D4HnmGKWMnq4CseC5zvlMDV7RZ 0n4S74Fm78ybFhbf25A+zwTZx6+ydIkNLRZQxfbC2roE2C8XjHhJ+TGCir5HEvahSlJk 7xv86WMROlZOyP56K34UUw7j/69wSQAcshjVCNQldtKSUfF3kEt9sNWjgriG+OtZ6RBt tB0w== X-Gm-Message-State: AOJu0YwQF3OCuwWLTOmVBgmfK05w9weox15+KZAs+jfqFb/HUJP6aklH 1dw0HAsGtL1MO8p/qWh7i5GOYEqCr1zceMnk/i4= X-Google-Smtp-Source: AGHT+IEIIeZL57lAHkc7efbkYWAL4qEdGOElPcH5sUwm6QdOSaoes+jLALUCrYI5dHZwL9iGaHR+Cw== X-Received: by 2002:a05:6a21:3e0a:b0:14b:f9b2:eb7 with SMTP id bk10-20020a056a213e0a00b0014bf9b20eb7mr316254pzc.59.1698084836703; Mon, 23 Oct 2023 11:13:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 29/38] target/i386: Use i128 for 128 and 256-bit loads and stores Date: Mon, 23 Oct 2023 11:13:20 -0700 Message-Id: <20231023181329.171490-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084906934100011 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 63 +++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 34 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 4f6f9fa7e5..18d06ab247 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2918,59 +2918,54 @@ static inline void gen_stq_env_A0(DisasContext *s, = int offset) =20 static inline void gen_ldo_env_A0(DisasContext *s, int offset, bool align) { + MemOp atom =3D (s->cpuid_ext_features & CPUID_EXT_AVX + ? MO_ATOM_IFALIGN : MO_ATOM_IFALIGN_PAIR); + MemOp mop =3D MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0); int mem_index =3D s->mem_index; - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, mem_index, - MO_LEUQ | (align ? MO_ALIGN_16 : 0)); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(0= ))); - tcg_gen_addi_tl(s->tmp0, s->A0, 8); - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(1= ))); + TCGv_i128 t =3D tcg_temp_new_i128(); + + tcg_gen_qemu_ld_i128(t, s->A0, mem_index, mop); + tcg_gen_st_i128(t, tcg_env, offset); } =20 static inline void gen_sto_env_A0(DisasContext *s, int offset, bool align) { + MemOp atom =3D (s->cpuid_ext_features & CPUID_EXT_AVX + ? MO_ATOM_IFALIGN : MO_ATOM_IFALIGN_PAIR); + MemOp mop =3D MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0); int mem_index =3D s->mem_index; - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(0= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, mem_index, - MO_LEUQ | (align ? MO_ALIGN_16 : 0)); - tcg_gen_addi_tl(s->tmp0, s->A0, 8); - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(XMMReg, XMM_Q(1= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); + TCGv_i128 t =3D tcg_temp_new_i128(); + + tcg_gen_ld_i128(t, tcg_env, offset); + tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop); } =20 static void gen_ldy_env_A0(DisasContext *s, int offset, bool align) { + MemOp mop =3D MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR; int mem_index =3D s->mem_index; - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, mem_index, - MO_LEUQ | (align ? MO_ALIGN_32 : 0)); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(0= ))); - tcg_gen_addi_tl(s->tmp0, s->A0, 8); - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(1= ))); + TCGv_i128 t0 =3D tcg_temp_new_i128(); + TCGv_i128 t1 =3D tcg_temp_new_i128(); =20 + tcg_gen_qemu_ld_i128(t0, s->A0, mem_index, mop | (align ? MO_ALIGN_32 = : 0)); tcg_gen_addi_tl(s->tmp0, s->A0, 16); - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(2= ))); - tcg_gen_addi_tl(s->tmp0, s->A0, 24); - tcg_gen_qemu_ld_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); - tcg_gen_st_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(3= ))); + tcg_gen_qemu_ld_i128(t1, s->tmp0, mem_index, mop); + + tcg_gen_st_i128(t0, tcg_env, offset + offsetof(YMMReg, YMM_X(0))); + tcg_gen_st_i128(t1, tcg_env, offset + offsetof(YMMReg, YMM_X(1))); } =20 static void gen_sty_env_A0(DisasContext *s, int offset, bool align) { + MemOp mop =3D MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR; int mem_index =3D s->mem_index; - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(0= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->A0, mem_index, - MO_LEUQ | (align ? MO_ALIGN_32 : 0)); - tcg_gen_addi_tl(s->tmp0, s->A0, 8); - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(1= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); + TCGv_i128 t =3D tcg_temp_new_i128(); + + tcg_gen_ld_i128(t, tcg_env, offset + offsetof(YMMReg, YMM_X(0))); + tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop | (align ? MO_ALIGN_32 := 0)); tcg_gen_addi_tl(s->tmp0, s->A0, 16); - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(2= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); - tcg_gen_addi_tl(s->tmp0, s->A0, 24); - tcg_gen_ld_i64(s->tmp1_i64, tcg_env, offset + offsetof(YMMReg, YMM_Q(3= ))); - tcg_gen_qemu_st_i64(s->tmp1_i64, s->tmp0, mem_index, MO_LEUQ); + tcg_gen_ld_i128(t, tcg_env, offset + offsetof(YMMReg, YMM_X(1))); + tcg_gen_qemu_st_i128(t, s->tmp0, mem_index, mop); } =20 #include "decode-new.h" --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084940; cv=none; d=zohomail.com; s=zohoarc; b=U4nnRPqmTNUngRsiU3Ji9oUlCR1Nm3sCiMr1GOYrjVXOVj7b8tTBqGwC1JqD4OqbAbdGXpPjem8hZhVLqOD0FVTXdhOfzOYW8E94HHRaeeD+PY+Hma+ROjlTT2gQuhx/8KX/Npd8SuMS5FCInytVp1dpBMhtdQ100Ex/+wFywOQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084940; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3PSV1d0+Nd9u1BeAFewAMmI3bPYXAWKfgIrndrhftjU=; b=LCHNwXieVQrJzcWiyIvlHHqnC/djrXxvtgLVKWonVC1g98x67x4AGwrk3sWnuZhWF+fIyUoSQrwtgHKpTJ3bMEuto1YHBI1fQswo0/hFvJcrxt2VOVculZSFLdBT3ETakWPlkKQpVaTK7D83nRYmBl4uta2cc6PXhxfC2JaOnC8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084940237729.9672794851222; Mon, 23 Oct 2023 11:15:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRS-0006EE-66; Mon, 23 Oct 2023 14:14:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRB-0005h8-Cs for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:01 -0400 Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzR9-0008Hd-BM for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:00 -0400 Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-6b89ab5ddb7so3585052b3a.0 for ; Mon, 23 Oct 2023 11:13:58 -0700 (PDT) Received: from stoup.. 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Signed-off-by: Paolo Bonzini Message-Id: <20231019104648.389942-15-pbonzini@redhat.com> Signed-off-by: Richard Henderson --- include/tcg/tcg-op-common.h | 4 ++++ include/tcg/tcg-op.h | 2 ++ tcg/tcg-op.c | 12 ++++++++++++ 3 files changed, 18 insertions(+) diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index 56d4e9cb9f..a0bae5df01 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -346,6 +346,8 @@ void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); +void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret, + TCGv_i32 arg1, int32_t arg2); void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1, TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2); void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, @@ -544,6 +546,8 @@ void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); +void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret, + TCGv_i64 arg1, int64_t arg2); void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2); void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al, diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 3ead59e459..e81dd7dd9e 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -199,6 +199,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64) #define tcg_gen_setcond_tl tcg_gen_setcond_i64 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64 #define tcg_gen_negsetcond_tl tcg_gen_negsetcond_i64 +#define tcg_gen_negsetcondi_tl tcg_gen_negsetcondi_i64 #define tcg_gen_mul_tl tcg_gen_mul_i64 #define tcg_gen_muli_tl tcg_gen_muli_i64 #define tcg_gen_div_tl tcg_gen_div_i64 @@ -317,6 +318,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64) #define tcg_gen_setcond_tl tcg_gen_setcond_i32 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32 #define tcg_gen_negsetcond_tl tcg_gen_negsetcond_i32 +#define tcg_gen_negsetcondi_tl tcg_gen_negsetcondi_i32 #define tcg_gen_mul_tl tcg_gen_mul_i32 #define tcg_gen_muli_tl tcg_gen_muli_i32 #define tcg_gen_div_tl tcg_gen_div_i32 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b4dbb2f2ba..828eb9ee46 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -291,6 +291,12 @@ void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret, } } =20 +void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret, + TCGv_i32 arg1, int32_t arg2) +{ + tcg_gen_negsetcond_i32(cond, ret, arg1, tcg_constant_i32(arg2)); +} + void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) { if (arg2 =3D=3D 0) { @@ -1602,6 +1608,12 @@ void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, } } =20 +void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret, + TCGv_i64 arg1, int64_t arg2) +{ + tcg_gen_negsetcond_i64(cond, ret, arg1, tcg_constant_i64(arg2)); +} + void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084907; cv=none; d=zohomail.com; s=zohoarc; b=JXTar0kGG9CdpqvXu4kzk4D7DSyH7T+H6ZvqSZBWiuxsoVVzn8J3tRarrvL3uf3gdLTVheMAbuWL3/SUuOSDN3AED8oxNmNdw34Nd6mhabJUPueZ7yG0XqgrMzg7qopGmMxl7mxrdsrRppQfdzQwenxQKab2f/IHmbV2FM0KcJA= ARC-Message-Signature: i=1; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084839; x=1698689639; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gvOyipzTKG60zeb6vbq80oIWpFAQowpjRgOLngWjDDA=; b=QiLcaNk4GMT8ig0h/sK+3t5Mqr61JUoSHjahvMuPC0onI6Qat064ujBKDbrmPYcaOj TTZsiT8HEQmm2d+8L6hLbt3AQttUaDaDTk7tfBC74vQkFzNrK3GnjXxsagr1H8Rm0+aX jOd2t+j4DI+oswv03v0ihXXLkKZkHPnwryAdfDGJWN64ZdoJX3lHa4r52UnfKixBYDLy D/6mhNXH3lgwpd60dIrOS5soQbiWisc5aEIALRwyVlLHrQv/fFjXjSJxeEDy6sByquNA f5+3/P89oKrQhi9XZF3bEVr83EEwHtyXeLo0sQxGxOBo2OXbigxt0i3Ixw+0sGOese/D Jg9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084839; x=1698689639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gvOyipzTKG60zeb6vbq80oIWpFAQowpjRgOLngWjDDA=; b=ds1LWjLXoV13yvM36QJVXoVUkAPZjbVn3O1xemNP6MD5a/y+UivmvOHMOIGE7stAjN crtskx+vMndq/JuNedtW9Ec8meGuh2avTHLI0r67hVC/n3rTCJTAyt6KtZRZTpTXpPIJ U9iM7fRhslwl4Cui1PBMXnhn8TemfQaKdXyXMZkEANViPwcDUqYBJNWYVIbs/wrPWfRQ OaYYxGl/58pi+BcUhH1sQyDavSUr6uOcuERSquKG/JPTlxvFZFltm/4ElqFpsFGHtC+d Vto9F7VfXP85maBW9kg8eomtgD8Eph9YB4RTSUfMLORFZSGVZ5Eed/7L7fmPNwfD8o/7 Aqqg== X-Gm-Message-State: AOJu0YwlRTVt1nMaUwtsgZktsCSqyBiSf5kMJaDZJeJp+ccgapQ/JkgP iUKmkcUi58OJZac1YNL/vn3nXDmXHgM2QFRGCGU= X-Google-Smtp-Source: AGHT+IF07de9wVhsYkXYJmx3pzOjvBwA4f8I6Pw+e4JT9UVpRMlPaguaSG5KRoERbXHsNnrAovJGPg== X-Received: by 2002:a05:6358:f0e:b0:168:d3e7:5ee6 with SMTP id b14-20020a0563580f0e00b00168d3e75ee6mr5751410rwj.26.1698084838990; Mon, 23 Oct 2023 11:13:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 31/38] tcg: Export tcg_gen_ext_{i32,i64,tl} Date: Mon, 23 Oct 2023 11:13:22 -0700 Message-Id: <20231023181329.171490-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c30; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc30.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084908807100014 The two concrete type functions already existed, merely needing a bit of hardening to invalid inputs. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/tcg/tcg-op-common.h | 2 ++ include/tcg/tcg-op.h | 2 ++ tcg/tcg-op-ldst.c | 14 ++++++++++---- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h index a0bae5df01..677aea6dd1 100644 --- a/include/tcg/tcg-op-common.h +++ b/include/tcg/tcg-op-common.h @@ -361,6 +361,7 @@ void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg); +void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc); void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags); void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg); @@ -564,6 +565,7 @@ void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg); +void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc); void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index e81dd7dd9e..a02850583b 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -219,6 +219,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64) #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 +#define tcg_gen_ext_tl tcg_gen_ext_i64 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64 @@ -338,6 +339,7 @@ DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64) #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32 #define tcg_gen_ext32u_tl tcg_gen_mov_i32 #define tcg_gen_ext32s_tl tcg_gen_mov_i32 +#define tcg_gen_ext_tl tcg_gen_ext_i32 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32 #define tcg_gen_bswap32_tl(D, S, F) tcg_gen_bswap32_i32(D, S) #define tcg_gen_bswap_tl tcg_gen_bswap32_i32 diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 2b96687699..e2c55df217 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -714,7 +714,7 @@ void tcg_gen_qemu_st_i128_chk(TCGv_i128 val, TCGTemp *a= ddr, TCGArg idx, tcg_gen_qemu_st_i128_int(val, addr, idx, memop); } =20 -static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc) +void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc) { switch (opc & MO_SSIZE) { case MO_SB: @@ -729,13 +729,16 @@ static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 va= l, MemOp opc) case MO_UW: tcg_gen_ext16u_i32(ret, val); break; - default: + case MO_UL: + case MO_SL: tcg_gen_mov_i32(ret, val); break; + default: + g_assert_not_reached(); } } =20 -static void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc) +void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc) { switch (opc & MO_SSIZE) { case MO_SB: @@ -756,9 +759,12 @@ static void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val= , MemOp opc) case MO_UL: tcg_gen_ext32u_i64(ret, val); break; - default: + case MO_UQ: + case MO_SQ: tcg_gen_mov_i64(ret, val); break; + default: + g_assert_not_reached(); } } =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:13:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084839; x=1698689639; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zU+v3676qRcEsyxppjdiDrJD+V8v/rvklw88kLBv4us=; b=thEWhLrvBKwu7FLa/CVVfGnBCoYRTjw9MkS4oe4mtnQl5XA06TilmiEeghPFaCoDSf 0eVnNI0rUjWEOnBNPD5j3lF5ICNBLoNFkA+vFd5jm74PPdTWXU/EgF17rR/TIhlrUwje vNY8WjJ9CYEjFZ6yvouNrHYjTWgc+l3VsUk5r2tuQId5l6Q/6dQjd+xd7c3bglZf9/pv zmMb50p4jVZjmeZbBa2rRuUkB5Ib64QRF8fi6ZXMqsa4WWjZ+c4Kz9y99f6UjZx0DI+P CuetvCRXeV+7BoK+wcXaSC3+w68iYdhQqn6a8y4hImyX+1H0YGVLqp6oXvsJLU1LgF6C mNgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084839; x=1698689639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zU+v3676qRcEsyxppjdiDrJD+V8v/rvklw88kLBv4us=; b=WGmsr48Q/plRlwi8hZkKkDjJU5xF351Wu/tNjoIeGyWKWppZ2r6MLombJDxVa25ZCY vQANa2lJULdNMuQqxbaoUTM8FoJHtBRotIWYNALQU/T7tfUbFwiz0ubz/8B7VSEYu3BM qMZ6c5YgcJYX797bLrF4RcN2H9w1r5O/V7e1Ag9Dg3MMK3Hg+WB/zpEyVovrjuwYJr2F iDHDbNq/aJrOJJ5Q323CKH7W+Y5Ii1/l1O1CIYT5gEywWcq/7XUchoaH54IDzJeC1kbR rQe+Wl+YsNo/GT3Iss5HXEcGFVJRsMljl8kshQk+Vs3c1QtsMxWVW01XVsQnyuOTELSs RgPQ== X-Gm-Message-State: AOJu0YzpbCV5oPLjiKXSEotUcmgW58t3a5wqtw2lV8C3TZJui9B9YhtE vCtkGDP3DTejM9+khxbmFgGjyb4dVJy+DBPkJ38= X-Google-Smtp-Source: AGHT+IF1s+aCrA6vfLq4ExczpSAKIRKjvN5q6Iq9OcPFS8uZoFvXXtLqY0L05vpX0FqyIPo+bbxlXw== X-Received: by 2002:a05:6358:1a9e:b0:168:e3e1:11d5 with SMTP id gm30-20020a0563581a9e00b00168e3e111d5mr2539604rwb.28.1698084839703; Mon, 23 Oct 2023 11:13:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Paolo Bonzini Subject: [PULL v3 32/38] tcg: Define MO_TL Date: Mon, 23 Oct 2023 11:13:23 -0700 Message-Id: <20231023181329.171490-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c36; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084971040100015 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini This will also come in handy later for "less than" comparisons. Signed-off-by: Paolo Bonzini Message-Id: <03ba02fd-fade-4409-be16-2f81a5690b4c@redhat.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/target_long.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/exec/target_long.h b/include/exec/target_long.h index 93c9472971..3cd8e26a23 100644 --- a/include/exec/target_long.h +++ b/include/exec/target_long.h @@ -29,12 +29,14 @@ typedef uint32_t target_ulong; #define TARGET_FMT_lx "%08x" #define TARGET_FMT_ld "%d" #define TARGET_FMT_lu "%u" +#define MO_TL MO_32 #elif TARGET_LONG_SIZE =3D=3D 8 typedef int64_t target_long; typedef uint64_t target_ulong; #define TARGET_FMT_lx "%016" PRIx64 #define TARGET_FMT_ld "%" PRId64 #define TARGET_FMT_lu "%" PRIu64 +#define MO_TL MO_64 #else #error TARGET_LONG_SIZE undefined #endif --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085116; cv=none; d=zohomail.com; s=zohoarc; b=OeJ4K5BGqDL9R6hkzBnjlEJSNOFSFb2Sznx2MEFiktRHJPqj/3ARofuI5V++GAk7qKypyVgp/7mxRDIPxy+k4fcex6f56GDyeU0NOymLHGycRO4cHFU8RqWC1za27X5u6bDLFxHCWHoiTLFgD6HseWro8v89Qa4sSYeDGA/IJhE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085116; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=T4DZaKL6rPO4eOmJB5sgPBMNx7MhU9e4zPB2kNBWFXU=; b=D1fH6JrD5uSqn3rVdqD19JrD1wziRBj1OxP5VSUImtPrfVt4hXm0lSV66qtAyBHYNZd3Z23mFVqbb1NvuZ1jKyGxlj/yMR8OyG+uI0XOUZlDU2Tc0rXdz02pUP4aGUolSGWDnpicVT51vCm9yth27GD9iquYEBpxbOsX3vr1yng= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085116601205.64857377430621; Mon, 23 Oct 2023 11:18:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRH-0005tO-6u; Mon, 23 Oct 2023 14:14:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRE-0005jr-7x for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:04 -0400 Received: from mail-oo1-xc31.google.com ([2607:f8b0:4864:20::c31]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzRC-0008IK-Nn for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:03 -0400 Received: by mail-oo1-xc31.google.com with SMTP id 006d021491bc7-581f78a0206so2091547eaf.2 for ; Mon, 23 Oct 2023 11:14:01 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.13.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:14:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084840; x=1698689640; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=T4DZaKL6rPO4eOmJB5sgPBMNx7MhU9e4zPB2kNBWFXU=; b=olsCo6+eTtThKj8CnIcjq9KnsnjYyL4kCeUg0aj7hRS8Z2b2aGsacBGjH9HnX0pRQw OyOLBXmL/UN6wQmaPOYERRRqi5IbBseAhrsRrVqn4u8MiRi/AdbvZcRFBgejPtRggeCU nLcijn18T6hgpafL56PEDHp+1hrfFUxjOBZv4NnunGl3/TBk5bLiYJuR/JLg4bG2XtvY viIfqukZkdgTGiRXX4TFsiGnO2ip021JkG3EJmbOay/A3/86zb2Cwp7RWXO5119BmcBX A7An5tjB8H6zYUl0UOAD3Rw+/Qk3Hdy2JXx0AGUfrLZt3Gz2Kp9+Q+vHQ1xxOaWFvrje vq1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084840; x=1698689640; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T4DZaKL6rPO4eOmJB5sgPBMNx7MhU9e4zPB2kNBWFXU=; b=wEY1AKfS0q6Rgh4i20IdCoA2Vbz0/pWKdXgCN0LS1+lryaITGh4icn3q9fRn3/eEAu 3B5Wucw99Wvr72PzIDLiL8XKsTtAkG6o0Gq6mkf/CQCbJk+0T8i5A6iHB9ERhImQ3YRZ 5VSpEAW5CSDw71sEa1SNiDHCz0NaVM7wdNbMl40bLTIyWARQv+FVI19kj1LS4Juh0N9Z FXD+RB24RzNInwif34fmZSlHbQvg9ZihzXyE96gOzllg1+YoQ76zEX7iILcNwz88Ja5P sBjNqKlgWM7JfozMldnKAH1e0iF1zHIANt/0brbprRcAPYeeCyxaOVg645xJAKWKWgOd p65Q== X-Gm-Message-State: AOJu0YzlIFtTWBbRw5GxwBMom2HehW60bIWj/Ii50L/WBdFP3WRXLxel A/WuUBRb6snMmB/392hByrHPIEsh7g4fpq+hhXE= X-Google-Smtp-Source: AGHT+IEGUN1oPEANmdamX6TRqXIRCQTDNgaGnqIosC3Mv80tl5WGrNHTLxV+ss3PpVeirwMmWcIjiA== X-Received: by 2002:a05:6359:6c11:b0:168:e697:ce0d with SMTP id tc17-20020a0563596c1100b00168e697ce0dmr1980721rwb.31.1698084840509; Mon, 23 Oct 2023 11:14:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v3 33/38] target/arm: Use tcg_gen_ext_i64 Date: Mon, 23 Oct 2023 11:13:24 -0700 Message-Id: <20231023181329.171490-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c31; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085117577100003 Content-Type: text/plain; charset="utf-8" The ext_and_shift_reg helper does this plus a shift. The non-zero check for shift count is duplicate to the one done within tcg_gen_shli_i64. Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 37 ++-------------------------------- 1 file changed, 2 insertions(+), 35 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 10e8dcf743..ad78b8b120 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -1324,41 +1324,8 @@ static void ext_and_shift_reg(TCGv_i64 tcg_out, TCGv= _i64 tcg_in, int extsize =3D extract32(option, 0, 2); bool is_signed =3D extract32(option, 2, 1); =20 - if (is_signed) { - switch (extsize) { - case 0: - tcg_gen_ext8s_i64(tcg_out, tcg_in); - break; - case 1: - tcg_gen_ext16s_i64(tcg_out, tcg_in); - break; - case 2: - tcg_gen_ext32s_i64(tcg_out, tcg_in); - break; - case 3: - tcg_gen_mov_i64(tcg_out, tcg_in); - break; - } - } else { - switch (extsize) { - case 0: - tcg_gen_ext8u_i64(tcg_out, tcg_in); - break; - case 1: - tcg_gen_ext16u_i64(tcg_out, tcg_in); - break; - case 2: - tcg_gen_ext32u_i64(tcg_out, tcg_in); - break; - case 3: - tcg_gen_mov_i64(tcg_out, tcg_in); - break; - } - } - - if (shift) { - tcg_gen_shli_i64(tcg_out, tcg_out, shift); - } + tcg_gen_ext_i64(tcg_out, tcg_in, extsize | (is_signed ? MO_SIGN : 0)); + tcg_gen_shli_i64(tcg_out, tcg_out, shift); } =20 static inline void gen_check_sp_alignment(DisasContext *s) --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085116; cv=none; d=zohomail.com; s=zohoarc; b=WfbKzrsr/f+xUL+KOMNtqWs6GXKNQD3fwDbE8+bshJlnkcwlJjp/ztnzCpt1NiKxo+XeNHovkXXJxfyNLHNXKzeZlD3E9gZ34okswtulZZREwWT5zL9DqNx6FTKzMfjdPeo7TK50h48ZHeEAnhx7ZHxnRnu9aj8YgC1N95pW/qs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085116; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=MhCC9XTd6nS9RO+tM5LcavZGdQ2zIqBqYuneDU4EEqo=; b=fpohDg/GfSZhxNTcNMWAVuTkK7TqI1Iyvv7Bvi5x3aDz1bIn/mHw6K+WTCSFt2SXZHZv6tzp9QgCGXN73LxN4JU4jZK18ejicS1KdRdaHWPR/14FFCbD6zLV5Byfoa56kZagICE0NVMalp4GekWvLNH2OsoZjPkR20Yh1Ja8QiI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085116592519.3312934823576; Mon, 23 Oct 2023 11:18:36 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRI-00061o-AJ; Mon, 23 Oct 2023 14:14:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRD-0005ja-W5 for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:04 -0400 Received: from mail-oo1-xc36.google.com ([2607:f8b0:4864:20::c36]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzRC-0008Ic-GD for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:03 -0400 Received: by mail-oo1-xc36.google.com with SMTP id 006d021491bc7-58441865ffaso1326698eaf.1 for ; Mon, 23 Oct 2023 11:14:02 -0700 (PDT) Received: from stoup.. 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.14.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:14:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084842; x=1698689642; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0BPLQFLnOkGd2O+DZrp/H9MQMrrZMZjnNrX39kKF71w=; b=m4AO2phiy17MMXPImsHN22acalREyGv2TVRwm335D6kI+fgCNyvSWjx84xVBGt6/LJ dzkx58ARrdOp5Go5+tnhmsBVGJOaUpVgNZwZQ3BMZgSczmX6ehiLwunYqR5DHZhd5ZD2 FK/pduj5TvE/47YDwQQeFMgRqYiUxBnkn30EYOaMxKKeiMMZQ3jBAnELQgEWlBM6rACf g+yp9/QqNkFVda6lYfgZTvafhAzhbSog25yg9PPAJ52ba1OaceTtC7nMeoxpWyRb92cI jhNds9wwquaycq/4NW0QtlZXFuXMoDueeKTPeyWraRm28Xzpn9ItNNjbSVoYs6baw37X vBYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084842; x=1698689642; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0BPLQFLnOkGd2O+DZrp/H9MQMrrZMZjnNrX39kKF71w=; b=mVrwKHdyQvE6pnSy2mA2fVI14wLnB3TQBCQda5rNonXRiqngal1Ich3xLH8ClOhQf5 WlRdwSUTLAQaqQAuLtIp0mk3TK3Xz3E465+6XCvVcmohxQuYFHBRrkKGv9oVZNRyMDuf E765HmgRilxnGexlUgaFnVIQpKWm3yQd2RbXnnLn9JXX/fJ0qpJwUHK+nUP9ux8UqmY3 mnd/Uez9SOLwF/MDGSoKrw+yNg85TqXuShFf+24s9vKD7v/x8OjXXyqKolOuHqsoWoRv z9S5w0bbX1vmg8I6hEF6TMS2GjBsZo+0zPrlo1JZuJtwftP/6Fr9Ij3rZymt44YZFfcI aROw== X-Gm-Message-State: AOJu0Yyqqf7GeyX82Eg5nfEEaMdHl1wz5j2BywEvI/Mu8eT+A+RbuRTG +75dL2wG408IVX457YJTMw5BQErMKsY8gi8CyDY= X-Google-Smtp-Source: AGHT+IFvEBX8mOOHCvaS+U4VMnRQwHSI/ajw97u/wA1x4dvoFlta9eR4KXZQ0zmQhNBDBjEHS7e6/w== X-Received: by 2002:a05:6a21:4842:b0:16b:d137:de5a with SMTP id au2-20020a056a21484200b0016bd137de5amr345082pzc.28.1698084842377; Mon, 23 Oct 2023 11:14:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL v3 35/38] target/m68k: Use tcg_gen_ext_i32 Date: Mon, 23 Oct 2023 11:13:26 -0700 Message-Id: <20231023181329.171490-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084958954100001 We still need to check OS_{BYTE,WORD,LONG}, because m68k includes floating point in OS_*. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/m68k/translate.c | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 4d0110de95..4a0b0b2703 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -520,21 +520,9 @@ static inline void gen_ext(TCGv res, TCGv val, int ops= ize, int sign) { switch (opsize) { case OS_BYTE: - if (sign) { - tcg_gen_ext8s_i32(res, val); - } else { - tcg_gen_ext8u_i32(res, val); - } - break; case OS_WORD: - if (sign) { - tcg_gen_ext16s_i32(res, val); - } else { - tcg_gen_ext16u_i32(res, val); - } - break; case OS_LONG: - tcg_gen_mov_i32(res, val); + tcg_gen_ext_i32(res, val, opsize | (sign ? MO_SIGN : 0)); break; default: g_assert_not_reached(); @@ -1072,15 +1060,10 @@ static int gen_ea_mode_fp(CPUM68KState *env, DisasC= ontext *s, int mode, tmp =3D tcg_temp_new(); switch (opsize) { case OS_BYTE: - tcg_gen_ext8s_i32(tmp, reg); - gen_helper_exts32(tcg_env, fp, tmp); - break; case OS_WORD: - tcg_gen_ext16s_i32(tmp, reg); - gen_helper_exts32(tcg_env, fp, tmp); - break; case OS_LONG: - gen_helper_exts32(tcg_env, fp, reg); + tcg_gen_ext_i32(tmp, reg, opsize | MO_SIGN); + gen_helper_exts32(tcg_env, fp, tmp); break; case OS_SINGLE: gen_helper_extf32(tcg_env, fp, reg); --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698084916; cv=none; d=zohomail.com; s=zohoarc; b=E7imzgh0diVJ5Zj6Q1pwpCLoXVcOyeGomrUnrbjMzwwDO1bSmxe/AdfLe2J6mBldFJ2J5KhMQfujJiAbrh8rQVDQXKfib46xZPrzSBiZ4ForzmvwKaAM0WiuK3Rri06l66VWo48H2E4nNLH5S0ka0+HvIt5gDSFx9MUBl5EVg9M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698084916; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=lZTStllFRXXRJKs8va6Nw+b+x2His96pbgh13vqXpyU=; b=XMTbbIPjV05Xdv4qWkgOsDv5yYf4DopM4LScQ7cq6WYWEempEJVDMeapIGHoPtfZkbkzDiIFZGRbnc4ONrSEIZfIqEQd3sGYcXxII0HYkBfdvcqoDNTJ2nCjxBFAj7qxWTthoaq68nNLikvgF/nMZr0nkZTReHhjywDcYh/l88w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698084916403464.3338691218073; Mon, 23 Oct 2023 11:15:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRk-0006fY-Q8; Mon, 23 Oct 2023 14:14:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRG-0005pQ-1J for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:06 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzRE-0008J1-Eg for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:05 -0400 Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-6bd0e1b1890so2707647b3a.3 for ; Mon, 23 Oct 2023 11:14:04 -0700 (PDT) Received: from stoup.. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698084916865100001 Reviewed-by: Yoshinori Sato Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/rx/translate.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/target/rx/translate.c b/target/rx/translate.c index f8860830ae..c6ce717a95 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -492,13 +492,11 @@ static bool trans_MOV_ra(DisasContext *ctx, arg_MOV_r= a *a) /* mov. rs,rd */ static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a) { - static void (* const mov[])(TCGv ret, TCGv arg) =3D { - tcg_gen_ext8s_i32, tcg_gen_ext16s_i32, tcg_gen_mov_i32, - }; TCGv tmp, mem, addr; + if (a->lds =3D=3D 3 && a->ldd =3D=3D 3) { /* mov. rs,rd */ - mov[a->sz](cpu_regs[a->rd], cpu_regs[a->rs]); + tcg_gen_ext_i32(cpu_regs[a->rd], cpu_regs[a->rs], a->sz | MO_SIGN); return true; } =20 @@ -570,10 +568,7 @@ static bool trans_MOVU_mr(DisasContext *ctx, arg_MOVU_= mr *a) /* movu. rs,rd */ static bool trans_MOVU_rr(DisasContext *ctx, arg_MOVU_rr *a) { - static void (* const ext[])(TCGv ret, TCGv arg) =3D { - tcg_gen_ext8u_i32, tcg_gen_ext16u_i32, - }; - ext[a->sz](cpu_regs[a->rd], cpu_regs[a->rs]); + tcg_gen_ext_i32(cpu_regs[a->rd], cpu_regs[a->rs], a->sz); return true; } =20 --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085017; cv=none; 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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.14.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:14:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084844; x=1698689644; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HoubwkFzMAESazVThDNIBAh5pqmgk/UJhOFdR/AHQTc=; b=UK+hUxziVmi6209mz85zviyKaFuE/Mm5UWiLebuAvO6ap+HuPZZemQqnvSNzqsNKQ+ Wxzf0jmbsgqoIhs/FjutuJYCwRy+xDUIw5gNXmMzK7DHnyN1INQWz+mQbOJ39dwdD3eH f7NH5W8m6pbFc9sHqNFxpsf9GKiRVUlGxHdwkoM/JSuerjtzThUv3CAkPtFjRYRUrDyv GtYQR67kxV+TOylD7tpL04V9WedQXAUch9I5KDlJQdYpRBXmCW9ciV8KJRoVbWnEkgL3 FzfnGhADGzRTxKURgELuDTtpSE8zwQ6EUUVcbSGaypZxlXBV/j5wdyrnbALlw+Rls7Ee pqOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084844; x=1698689644; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HoubwkFzMAESazVThDNIBAh5pqmgk/UJhOFdR/AHQTc=; b=JYxAr2EVgXtJuRpjtyDwk4VWYhii7DE1AFNWU+drvTvggftcfF8nqz7u+m+c+gwr37 Yw5g9U4McjSu1wMegFw7FZFTOoukkc2R7bBnPBKrJDBuIUfpXyjo5ZZBeoFK+paCBvpp ySJDLlXMrCkFlrX4oNaFaDyP0QCOEXKB0Zxp+WRFI8+tD7oQ6Mqlor4gxrHSFAbEgnrr Vhubk1UmE0eYGQZPe76wLblFFR8iqaRoFC8JGlNDwYl5caPVzeF6GKpr4UOdXw9R1Wfx Z14wvyNeHzbn4/o/aViSR1bK814GlaNxff/lVKGqzLserBjcxbnmeJtbsaIIfcraM2JP E3Wg== X-Gm-Message-State: AOJu0YyR+DInanvLNsRzxMMVvarwjXYM1JKaoDh2O4dm04cxWh66xFV3 y59pws9TUoyywBZfZqx0SFQQdphFFQqmWbOJTbg= X-Google-Smtp-Source: AGHT+IHRLGM++o0VHyK4JjknGuKQDzUMJAUQIuoo8wPMQQtvdVXaW3kszjNvL4XLTpXLE98NNImNDg== X-Received: by 2002:a62:f246:0:b0:691:27b:15b4 with SMTP id y6-20020a62f246000000b00691027b15b4mr16941402pfl.5.1698084844093; Mon, 23 Oct 2023 11:14:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Bastian Koppelmann Subject: [PULL v3 37/38] target/tricore: Use tcg_gen_*extract_tl Date: Mon, 23 Oct 2023 11:13:28 -0700 Message-Id: <20231023181329.171490-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085019104100017 Content-Type: text/plain; charset="utf-8" The EXTR instructions can use the extract opcodes. Reviewed-by: Bastian Koppelmann Signed-off-by: Richard Henderson --- target/tricore/translate.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index dd812ec0f0..66553d1be0 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6542,28 +6542,16 @@ static void decode_rrpw_extract_insert(DisasContext= *ctx) switch (op2) { case OPC2_32_RRPW_EXTR: if (width =3D=3D 0) { - tcg_gen_movi_tl(cpu_gpr_d[r3], 0); - break; - } - - if (pos + width <=3D 32) { - /* optimize special cases */ - if ((pos =3D=3D 0) && (width =3D=3D 8)) { - tcg_gen_ext8s_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); - } else if ((pos =3D=3D 0) && (width =3D=3D 16)) { - tcg_gen_ext16s_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); - } else { - tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], 32 - pos - w= idth); - tcg_gen_sari_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], 32 - width); - } + tcg_gen_movi_tl(cpu_gpr_d[r3], 0); + } else if (pos + width <=3D 32) { + tcg_gen_sextract_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], pos, width); } break; case OPC2_32_RRPW_EXTR_U: if (width =3D=3D 0) { tcg_gen_movi_tl(cpu_gpr_d[r3], 0); } else { - tcg_gen_shri_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], pos); - tcg_gen_andi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], ~0u >> (32-width= )); + tcg_gen_extract_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], pos, width); } break; case OPC2_32_RRPW_IMASK: --=20 2.34.1 From nobody Wed Apr 16 16:46:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1698085110; cv=none; d=zohomail.com; s=zohoarc; b=li3BSTO2b4gRr3rLA9GGxX73Gv7giBbZ5JpeCWy/DplwVNiv8b5pDg1mEWU/K/+LJnp/rUAzYQ50GOajzQWS+GN5mRjMWllLcUhY86iww6bj69nXVwk412QAtfO9CiHeKDFEdUSe9RGmTMNGHQCADpEItC+omYWtaqvgcgZ//i8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1698085110; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zHmmFYF02i+OnY3fmwj8/XxXt0JUUTrQhyiW4ERnoxY=; b=G2BWHRQBFwxw5FWFurQB+S0r6+vybpP0P299q7G3aiqaPIz6bPHAGnqiBbvDqHV9CeUAtLswO+nQCXY4ypfo2SZvc1TXm3vPzSks2X/6kbF+i72upqmePUM/gFY/sB/gwgfH2HCloWIXTs1zpg9BF8hM100FnPVMNR7vsXXwgiM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698085110194378.9343595080296; Mon, 23 Oct 2023 11:18:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1quzRf-0006dl-Em; Mon, 23 Oct 2023 14:14:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1quzRI-00060e-58 for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:08 -0400 Received: from mail-oo1-xc33.google.com ([2607:f8b0:4864:20::c33]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1quzRG-0008JV-JG for qemu-devel@nongnu.org; Mon, 23 Oct 2023 14:14:07 -0400 Received: by mail-oo1-xc33.google.com with SMTP id 006d021491bc7-581f78a0206so2091588eaf.2 for ; Mon, 23 Oct 2023 11:14:06 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id v10-20020a65568a000000b005b83bc255fbsm5205137pgs.71.2023.10.23.11.14.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 11:14:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698084845; x=1698689645; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zHmmFYF02i+OnY3fmwj8/XxXt0JUUTrQhyiW4ERnoxY=; b=xDyj7uBiwUX+P9mTK1Cp7jOH4ec6tKeGipsnCJgTLNDln6sy3EfDpLleAXVZFrE4QB WExisMIM/wkJ3D410EeGeyR4WFYKycsmlvn+IiKQiWXvpWPL7zCuLfKT+A+GNC68SL0M ZkWiv9N0KD0AtbVrJ8CZlNkNxMFaL3gecWUo4atLF88x8P7v2CHU96/WcrKkDAlc/c65 syGAwYKcoxCces1BkycTrfqkM7I4F71E7zI+l2LP7hTcrC+55RXr6+kCBZ/WMcFG0i52 8aDJwonznUyMNYJKvcu+2J6RmKrIyDWYu+aHZTIFBmRPvaKSpEEVjCT/J3Ts1r5/j7OJ W6tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698084845; x=1698689645; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zHmmFYF02i+OnY3fmwj8/XxXt0JUUTrQhyiW4ERnoxY=; b=FWQuGxejSNQ0Xf5pHjQs9mheZe1xLJbQuv/WFSPUbhID+eRNcEeCzi+w19r1txWFLd s3DXNEHDTwfrW1vJXXFsFzyz2sv+Y7rdxV83dXtMNru0u0TeFs3C7MJApU38YpQ3OnYv z6Gep4JHYKhf/4zyzZNg5Ba1Z7FwAZvt3US/fn89hw+2ILu/IrKDukckV2B3JV6IR9Qt F/ZWXn1BUOdzWGNg0bN6wupr7BF5HjUWieI7vztLizwN8FvVMNR3UcvJ0Nq+rlTJkkeg lTBQUxlniBnpbSL2KF1MRwLtVJOWz6EXHUcmxsLsYixhyyYofqSJeHzyLg3+QXHBNWd7 a6eA== X-Gm-Message-State: AOJu0YwZW1c+jMfH3TG1mH0yomYSjLqsiz0O2JRfrximqZgxjGPe0OZi UywL3RR39aisOIscM5im7SH7+1uu0AfCD36MAM4= X-Google-Smtp-Source: AGHT+IEVt5DN6yeyCi/UqIUD15i9ZvX+3fqpkCUw45agfnvLS6XyTEOnuX/mYQlmHIlApkx3g9OujA== X-Received: by 2002:a05:6359:5c20:b0:168:e177:b2bf with SMTP id pu32-20020a0563595c2000b00168e177b2bfmr3032364rwb.5.1698084845220; Mon, 23 Oct 2023 11:14:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Max Filippov Subject: [PULL v3 38/38] target/xtensa: Use tcg_gen_sextract_i32 Date: Mon, 23 Oct 2023 11:13:29 -0700 Message-Id: <20231023181329.171490-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231023181329.171490-1-richard.henderson@linaro.org> References: <20231023181329.171490-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c33; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc33.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1698085111528100001 Content-Type: text/plain; charset="utf-8" Reviewed-by: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/translate.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 54bee7ddba..de89940599 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2262,17 +2262,7 @@ static void translate_salt(DisasContext *dc, const O= pcodeArg arg[], static void translate_sext(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - int shift =3D 31 - arg[2].imm; - - if (shift =3D=3D 24) { - tcg_gen_ext8s_i32(arg[0].out, arg[1].in); - } else if (shift =3D=3D 16) { - tcg_gen_ext16s_i32(arg[0].out, arg[1].in); - } else { - TCGv_i32 tmp =3D tcg_temp_new_i32(); - tcg_gen_shli_i32(tmp, arg[1].in, shift); - tcg_gen_sari_i32(arg[0].out, tmp, shift); - } + tcg_gen_sextract_i32(arg[0].out, arg[1].in, 0, arg[2].imm + 1); } =20 static uint32_t test_exceptions_simcall(DisasContext *dc, --=20 2.34.1