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([71.212.149.95]) by smtp.gmail.com with ESMTPSA id k15-20020aa7998f000000b00688965c5227sm1944975pfh.120.2023.10.20.13.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Oct 2023 13:44:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697834644; x=1698439444; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cvByl24MJI51YSIY+m9lpJLCF2jw0swZvW6LzKcbRvs=; b=PJOyGoQg9v1GTcdg20QkrBUd9+Myezkva+gQbJPi4ybeMfpcL/aIUySjSFa4a7pmQb TYk+itaCO6Ttuz9MTSqF9MkzcB4dLBKZq3W6N9P1wIWVUzmOTOdBhA2NFfpAjbMdYsR8 3x4jJvHhNk0iPo52hR2DWz/i8zfNHiyHTNN2381uDVY0ZMB16eL1og0b9tsL7HxmlR0h 65LlDw83Ifm9B60AKVH8OB7bX2WX4g6yahfRFy+r4U01IRHcDQe2e4VzdJ0ayqEMMQUj HAKjVInuFAT6PDp02knnw4Npv6fSVeBI9/KYv388JGDZ0Fc+uLCWoVzrL05i+YFrIzQC qSOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697834644; x=1698439444; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cvByl24MJI51YSIY+m9lpJLCF2jw0swZvW6LzKcbRvs=; b=rZjwTs+xHNz6fBvEzJPsycMZJyuCDhbn59PzcVc6YRpXnD5fx4GSFRvaiG4S9l/3kB hf1DLka2yAeV8dFqwKEDVWCNJdTlFXPaWvCwe+TZUHpLOmHrMpHAkIF3hrsxUEOzWz/c 7W6L7p+/jPoqqEbGNvgufYOzKqy5hQk4rTlv22uqgS8+VmgcBWg66qQ0MIO6+xvUMOsZ LlnCPhDTu4QBeckTrPC5+/bZcfr8aCJesq3xkgqACoYNH9q1SJmevjBkn6Aee0/Lvinh XpaP3aeMetB5PVN2Ch2oT8+83aBzUfM/V7fjWlh+WclTGm2uK3HucN1Cm9bhtnRNdCYb gMoQ== X-Gm-Message-State: AOJu0YxZMQHk3dpEOQLt75WDAglKgnabhMTcxuVHNxIGqQwit24nnvPN 2nTocYYu5Q/XaaKUAqlffobKoqbn8Oon3gV31yY= X-Google-Smtp-Source: AGHT+IECxuqpf9JCgQIIA4fLUcMhfZv81osKVAhPLx/nYshWrgziVRsdaPXhjjknfrg20sDY///Etw== X-Received: by 2002:a05:6a20:8f01:b0:15e:2d9f:cae0 with SMTP id b1-20020a056a208f0100b0015e2d9fcae0mr3309955pzk.10.1697834644636; Fri, 20 Oct 2023 13:44:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH v2 35/65] target/hppa: Decode d for bb instructions Date: Fri, 20 Oct 2023 13:43:01 -0700 Message-Id: <20231020204331.139847-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231020204331.139847-1-richard.henderson@linaro.org> References: <20231020204331.139847-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697834784217100003 Content-Type: text/plain; charset="utf-8" Manipulate the shift count so that the bit to be tested is always placed at the MSB. Signed-off-by: Richard Henderson --- target/hppa/insns.decode | 4 ++-- target/hppa/translate.c | 6 ++---- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index ad454adcbb..b185523021 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -290,8 +290,8 @@ fmpysub_d 100110 ..... ..... ..... ..... 1 ..... = @mpyadd # Conditional Branches #### =20 -bb_sar 110000 00000 r:5 c:1 10 ........... n:1 . disp=3D%assembl= e_12 -bb_imm 110001 p:5 r:5 c:1 10 ........... n:1 . disp=3D%assembl= e_12 +bb_sar 110000 00000 r:5 c:1 1 d:1 ........... n:1 . disp=3D%assem= ble_12 +bb_imm 110001 p:5 r:5 c:1 1 d:1 ........... n:1 . disp=3D%assem= ble_12 =20 movb 110010 ..... ..... ... ........... . . @rrb_cf f=3D0 movbi 110011 ..... ..... ... ........... . . @rib_cf f=3D0 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index df5a6dc896..543a694724 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3151,13 +3151,12 @@ static bool trans_bb_sar(DisasContext *ctx, arg_bb_= sar *a) { TCGv_reg tmp, tcg_r; DisasCond cond; - bool d =3D false; =20 nullify_over(ctx); =20 tmp =3D tcg_temp_new(); tcg_r =3D load_gpr(ctx, a->r); - if (cond_need_ext(ctx, d)) { + if (cond_need_ext(ctx, a->d)) { /* Force shift into [32,63] */ tcg_gen_ori_reg(tmp, cpu_sar, 32); tcg_gen_shl_reg(tmp, tcg_r, tmp); @@ -3173,14 +3172,13 @@ static bool trans_bb_imm(DisasContext *ctx, arg_bb_= imm *a) { TCGv_reg tmp, tcg_r; DisasCond cond; - bool d =3D false; int p; =20 nullify_over(ctx); =20 tmp =3D tcg_temp_new(); tcg_r =3D load_gpr(ctx, a->r); - p =3D a->p | (cond_need_ext(ctx, d) ? 32 : 0); + p =3D a->p | (cond_need_ext(ctx, a->d) ? 32 : 0); tcg_gen_shli_reg(tmp, tcg_r, p); =20 cond =3D cond_make_0(a->c ? TCG_COND_GE : TCG_COND_LT, tmp); --=20 2.34.1