From nobody Thu Nov 20 04:53:15 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1697819980; cv=none; d=zohomail.com; s=zohoarc; b=EfgBh4S/4+W0+xWESuUNSNjfrc4ss2jAwvv4rMRpP/rXdbEqRuhiIae1Lc7/kKfmxmRaGCX+be3lpDTZJHP2gdmZukpDsxib9hSLela8gdib6M6qZO15LtsWGSDNtV7IZOJUJFl0mKWkHTeiq4FzTt4MTUgjEkwTwthIeDrDEN8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1697819980; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tjEEqBquQG9Z9DNlaQ9SzOw2N7EVXn+JeOiCVrWLMU8=; b=gcYw/eiyIEF2FXCCVEoJl37g6Kur0JzBxLCh3tBhxFY0lXjdLDk2+rq79jyEC1gAuG4HlCIrgJr+iCl6IgZprkWmeaXf62zilF+/vHHiiqH5jXRq5zjuuViJ4rCdQwIUBVp6QeNG98aLKJzinFXZ1EWVexobMERmBzaUvBXFKYE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16978199808401014.7954123480371; Fri, 20 Oct 2023 09:39:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qtsVr-0004L7-Sv; Fri, 20 Oct 2023 12:38:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qtsVp-00048J-VS for qemu-devel@nongnu.org; Fri, 20 Oct 2023 12:38:13 -0400 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qtsVl-0002ck-1O for qemu-devel@nongnu.org; Fri, 20 Oct 2023 12:38:13 -0400 Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-9bf0ac97fdeso157605766b.2 for ; Fri, 20 Oct 2023 09:38:08 -0700 (PDT) Received: from m1x-phil.lan (tbo33-h01-176-171-212-97.dsl.sta.abo.bbox.fr. [176.171.212.97]) by smtp.gmail.com with ESMTPSA id m16-20020a1709066d1000b009a1a5a7ebacsm1763147ejr.201.2023.10.20.09.38.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 09:38:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697819885; x=1698424685; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tjEEqBquQG9Z9DNlaQ9SzOw2N7EVXn+JeOiCVrWLMU8=; b=kONw2MDyyydUprQjU5NZTT4LQIWUQzf0mnnw9KKyntjy8kVVBzAA8yDy6ZOk3wp8Bw A3kTp8ZVRyfVud1zG0V3wh4WGQLprvEXRzFS7W6CodZ/JCA/0/Joki0TVZf5MZSDbphM 9sGmGMmvzMIFnbhjP1IJ7MesuX0e3DsRCOqOAzgmpCEPBnkdSPRUr0HPugHE8pCyjLBS dl41gfE7bDZbt6uenlmh3AfWv2EhERAaBvZdWrNsOnwuQ7UnyUfqOfWDOszwjal6aAFx 3chJqM9K+axwNlJyqYmUGB6rDAZzbaiofok6glNk+7hB7w39tztlZ8CJMl5PgbCrSLmD ++WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697819885; x=1698424685; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tjEEqBquQG9Z9DNlaQ9SzOw2N7EVXn+JeOiCVrWLMU8=; b=oxz6Tce5dtQ6xHgRqooGovflA8W04R/QwJUUpma4sJ19WNLXMfpIay4zdkVZnIzqpS /X/TQu5cUjtKwoj2ZBJ37m5WXaObvaNBusNUx67x5zgN5enIa5LRncFPPOuMTwhDnCC+ x/Yazzw2pRCrrb85S7G/hgLrLgKcluYK89utAZQrLTAHUZgg+nWtUggLiVedj6E112KM gw7/IdBk42yUbwWcEEIYKNYvQuc8gNIw0pmbnRR5k43CNl07g+ne7k4g2LHqhHSqY/0r XoAcdRVfM2A490fCVjLM6raDGjeb0Oy9HCOlPB9/CBC6xWvD2zlNCbIvMBq5ofNjyUBX RPhQ== X-Gm-Message-State: AOJu0Yxrdu22NqalgUKMOn9AbkE4h/ZzwDl0uPRg5QA/xA7raBeT0qzR Q2g69C5QwCfJ5kC2CIVqYuUiSzD5CUEA6fgOpCY= X-Google-Smtp-Source: AGHT+IH1BrzvzSBXULb5Pinq/MRgXe3aitbx7Ej+tcC4IN3cXg4AnPGTjB6ty3nCHDDiMZGeA9k5VA== X-Received: by 2002:a17:907:720f:b0:9ae:6a60:81a2 with SMTP id dr15-20020a170907720f00b009ae6a6081a2mr1674744ejc.25.1697819885302; Fri, 20 Oct 2023 09:38:05 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Richard Henderson , Paolo Bonzini , Alistair Francis , qemu-arm@nongnu.org, qemu-riscv@nongnu.org, "Edgar E. Iglesias" , qemu-ppc@nongnu.org, Eduardo Habkost , "Michael S. Tsirkin" , qemu-s390x@nongnu.org, Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Zhao Liu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Andrew Jeffery , Joel Stanley , Igor Mitsyanko , Rob Herring , Subbaraya Sundeep , Alistair Francis , Felipe Balbi , Niek Linnenbank , Radoslaw Biernacki , Leif Lindholm , Marcin Juszkiewicz , Alexandre Iooss Subject: [PATCH 10/19] cpus: Replace first_cpu by qemu_get_cpu(0, TYPE_ARM_CPU) Date: Fri, 20 Oct 2023 18:36:32 +0200 Message-ID: <20231020163643.86105-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020163643.86105-1-philmd@linaro.org> References: <20231020163643.86105-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697819982780100003 Mechanical change using the following coccinelle script: @@ @@ - first_cpu + qemu_get_cpu(0, TYPE_ARM_CPU) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed.c | 5 +++-- hw/arm/bananapi_m2u.c | 3 ++- hw/arm/boot.c | 12 ++++++------ hw/arm/exynos4_boards.c | 6 ++++-- hw/arm/highbank.c | 3 ++- hw/arm/microbit.c | 3 ++- hw/arm/mps2-tz.c | 3 ++- hw/arm/mps2.c | 3 ++- hw/arm/msf2-som.c | 3 ++- hw/arm/musca.c | 3 ++- hw/arm/netduino2.c | 3 ++- hw/arm/netduinoplus2.c | 2 +- hw/arm/olimex-stm32-h405.c | 2 +- hw/arm/orangepi.c | 3 ++- hw/arm/realview.c | 5 +++-- hw/arm/sbsa-ref.c | 3 ++- hw/arm/stellaris.c | 3 ++- hw/arm/stm32vldiscovery.c | 2 +- hw/arm/vexpress.c | 3 ++- hw/arm/virt.c | 17 ++++++++++------- hw/arm/xilinx_zynq.c | 3 ++- target/arm/arch_dump.c | 6 +++--- 22 files changed, 58 insertions(+), 38 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index f8ba67531a..6a4d87bfe2 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -446,7 +446,8 @@ static void aspeed_machine_init(MachineState *machine) } } =20 - arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &aspeed_board_binfo); } =20 static void palmetto_bmc_i2c_init(AspeedMachineState *bmc) @@ -1553,7 +1554,7 @@ static void aspeed_minibmc_machine_init(MachineState = *machine) amc->i2c_init(bmc); } =20 - armv7m_load_kernel(ARM_CPU(first_cpu), + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine->kernel_filename, 0, AST1030_INTERNAL_FLASH_SIZE); diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index 74121d8966..431b1c9bf9 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -127,7 +127,8 @@ static void bpim2u_init(MachineState *machine) bpim2u_binfo.loader_start =3D r40->memmap[AW_R40_DEV_SDRAM]; bpim2u_binfo.ram_size =3D machine->ram_size; bpim2u_binfo.psci_conduit =3D QEMU_PSCI_CONDUIT_SMC; - arm_load_kernel(ARM_CPU(first_cpu), machine, &bpim2u_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &bpim2u_binfo); } =20 static void bpim2u_machine_init(MachineClass *mc) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index f7def3a60c..71c0775984 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -781,7 +781,7 @@ static void do_cpu_reset(void *opaque) =20 /* Set to non-secure if not a secure boot */ if (!info->secure_boot && - (cs !=3D first_cpu || !info->secure_board_setup)) { + (cs !=3D qemu_get_cpu(0, TYPE_ARM_CPU) || !info->secur= e_board_setup)) { /* Linux expects non-secure state */ env->cp15.scr_el3 |=3D SCR_NS; /* Set NSACR.{CP11,CP10} so NS can access the FPU */ @@ -800,7 +800,7 @@ static void do_cpu_reset(void *opaque) cpsr_write(env, ARM_CPU_MODE_HYP, CPSR_M, CPSRWriteRaw); } =20 - if (cs =3D=3D first_cpu) { + if (cs =3D=3D qemu_get_cpu(0, TYPE_ARM_CPU)) { AddressSpace *as =3D arm_boot_address_space(cpu, info); =20 cpu_set_pc(cs, info->loader_start); @@ -1187,7 +1187,7 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu, } info->is_linux =3D is_linux; =20 - for (cs =3D first_cpu; cs; cs =3D CPU_NEXT(cs)) { + for (cs =3D qemu_get_cpu(0, TYPE_ARM_CPU); cs; cs =3D CPU_NEXT(cs)) { ARM_CPU(cs)->env.boot_info =3D info; } } @@ -1264,7 +1264,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, s= truct arm_boot_info *info) * actually loading a kernel, the handler is also responsible for * arranging that we start it correctly. */ - for (cs =3D first_cpu; cs; cs =3D CPU_NEXT(cs)) { + for (cs =3D qemu_get_cpu(0, TYPE_ARM_CPU); cs; cs =3D CPU_NEXT(cs)) { qemu_register_reset(do_cpu_reset, ARM_CPU(cs)); nb_cpus++; } @@ -1325,7 +1325,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, s= truct arm_boot_info *info) } =20 if (info->psci_conduit !=3D QEMU_PSCI_CONDUIT_DISABLED) { - for (cs =3D first_cpu; cs; cs =3D CPU_NEXT(cs)) { + for (cs =3D qemu_get_cpu(0, TYPE_ARM_CPU); cs; cs =3D CPU_NEXT(cs)= ) { Object *cpuobj =3D OBJECT(cs); =20 object_property_set_int(cpuobj, "psci-conduit", info->psci_con= duit, @@ -1335,7 +1335,7 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms, s= truct arm_boot_info *info) * code in do_cpu_reset(), we assume first_cpu is the primary * CPU. */ - if (cs !=3D first_cpu) { + if (cs !=3D qemu_get_cpu(0, TYPE_ARM_CPU)) { object_property_set_bool(cpuobj, "start-powered-off", true, &error_abort); } diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index ef5bcbc212..f8cf0588b4 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -136,7 +136,8 @@ static void nuri_init(MachineState *machine) { exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI); =20 - arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &exynos4_board_binfo); } =20 static void smdkc210_init(MachineState *machine) @@ -146,7 +147,8 @@ static void smdkc210_init(MachineState *machine) =20 lan9215_init(SMDK_LAN9118_BASE_ADDR, qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); - arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &exynos4_board_binfo); } =20 static void nuri_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index f12aacea6b..393fa8a468 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -328,7 +328,8 @@ static void calxeda_init(MachineState *machine, enum cx= machines machine_id) highbank_binfo.board_setup_addr =3D BOARD_SETUP_ADDR; highbank_binfo.psci_conduit =3D QEMU_PSCI_CONDUIT_SMC; =20 - arm_load_kernel(ARM_CPU(first_cpu), machine, &highbank_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &highbank_binfo); } =20 static void highbank_init(MachineState *machine) diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c index 50df362088..19c2fc3b8e 100644 --- a/hw/arm/microbit.c +++ b/hw/arm/microbit.c @@ -56,7 +56,8 @@ static void microbit_init(MachineState *machine) memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BAS= E, mr, -1); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, s->nrf51.flash_size); } =20 diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index eae3639da2..0b26eab45d 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -1217,7 +1217,8 @@ static void mps2tz_common_init(MachineState *machine) mms->remap_irq); } =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, boot_ram_size(mms)); } =20 diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index d92fd60684..86e5ca0ce6 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -462,7 +462,8 @@ static void mps2_common_init(MachineState *machine) qdev_get_gpio_in(armv7m, mmc->fpga_type =3D=3D FPGA_AN511 ? 47 : = 13)); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, 0x400000); } =20 diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index 7b3106c790..42a3eb4905 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -100,7 +100,8 @@ static void emcraft_sf2_s2s010_init(MachineState *machi= ne) cs_line =3D qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, soc->envm_size); } =20 diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 6eeee57c9d..8d9b93d931 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -597,7 +597,8 @@ static void musca_init(MachineState *machine) "cfg_sec_resp", 0)); } =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, 0x2000000); } =20 diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index 83753d53a3..61fe0346fe 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -48,7 +48,8 @@ static void netduino2_init(MachineState *machine) qdev_connect_clock_in(dev, "sysclk", sysclk); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + machine->kernel_filename, 0, FLASH_SIZE); } =20 diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index 515c081605..ad68421b97 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -48,7 +48,7 @@ static void netduinoplus2_init(MachineState *machine) qdev_connect_clock_in(dev, "sysclk", sysclk); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine->kernel_filename, 0, FLASH_SIZE); } diff --git a/hw/arm/olimex-stm32-h405.c b/hw/arm/olimex-stm32-h405.c index 3aa61c91b7..a44c6188c4 100644 --- a/hw/arm/olimex-stm32-h405.c +++ b/hw/arm/olimex-stm32-h405.c @@ -51,7 +51,7 @@ static void olimex_stm32_h405_init(MachineState *machine) qdev_connect_clock_in(dev, "sysclk", sysclk); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine->kernel_filename, 0, FLASH_SIZE); } diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 10653361ed..7d44715111 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -105,7 +105,8 @@ static void orangepi_init(MachineState *machine) orangepi_binfo.loader_start =3D h3->memmap[AW_H3_DEV_SDRAM]; orangepi_binfo.ram_size =3D machine->ram_size; orangepi_binfo.psci_conduit =3D QEMU_PSCI_CONDUIT_SMC; - arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &orangepi_binfo); } =20 static void orangepi_machine_init(MachineClass *mc) diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8f89526596..be709146c8 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -136,7 +136,7 @@ static void realview_init(MachineState *machine, =20 cpu_irq[n] =3D qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ); } - cpu =3D ARM_CPU(first_cpu); + cpu =3D ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)); env =3D &cpu->env; if (arm_feature(env, ARM_FEATURE_V7)) { if (is_mpcore) { @@ -384,7 +384,8 @@ static void realview_init(MachineState *machine, realview_binfo.ram_size =3D ram_size; realview_binfo.board_id =3D realview_board_id[board_type]; realview_binfo.loader_start =3D (board_type =3D=3D BOARD_PB_A8 ? 0x700= 00000 : 0); - arm_load_kernel(ARM_CPU(first_cpu), machine, &realview_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &realview_binfo); } =20 static void realview_eb_init(MachineState *machine) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index a85004809f..01c948725c 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -844,7 +844,8 @@ static void sbsa_ref_init(MachineState *machine) sms->bootinfo.loader_start =3D sbsa_ref_memmap[SBSA_MEM].base; sms->bootinfo.get_dtb =3D sbsa_ref_dtb; sms->bootinfo.firmware_loaded =3D firmware_loaded; - arm_load_kernel(ARM_CPU(first_cpu), machine, &sms->bootinfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &sms->bootinfo); } =20 static const CPUArchIdList *sbsa_ref_possible_cpu_arch_ids(MachineState *m= s) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index aa5b0ddfaa..0920b9cb86 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1307,7 +1307,8 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) create_unimplemented_device("hibernation", 0x400fc000, 0x1000); create_unimplemented_device("flash-control", 0x400fd000, 0x1000); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), ms->kernel_filename, 0, flash_s= ize); + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), + ms->kernel_filename, 0, flash_size); } =20 /* FIXME: Figure out how to generate these from stellaris_boards. */ diff --git a/hw/arm/stm32vldiscovery.c b/hw/arm/stm32vldiscovery.c index 67675e952f..2df943295b 100644 --- a/hw/arm/stm32vldiscovery.c +++ b/hw/arm/stm32vldiscovery.c @@ -51,7 +51,7 @@ static void stm32vldiscovery_init(MachineState *machine) qdev_connect_clock_in(dev, "sysclk", sysclk); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - armv7m_load_kernel(ARM_CPU(first_cpu), + armv7m_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine->kernel_filename, 0, FLASH_SIZE); } diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index e20d865d5a..8107a7057a 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -712,7 +712,8 @@ static void vexpress_common_init(MachineState *machine) daughterboard->bootinfo.modify_dtb =3D vexpress_modify_dtb; /* When booting Linux we should be in secure state if the CPU has one.= */ daughterboard->bootinfo.secure_boot =3D vms->secure; - arm_load_kernel(ARM_CPU(first_cpu), machine, &daughterboard->bootinfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &daughterboard->bootinfo); } =20 static bool vexpress_get_secure(Object *obj, Error **errp) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index da5b738f0a..9f69be85ce 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -605,7 +605,7 @@ static void fdt_add_gic_node(VirtMachineState *vms) =20 static void fdt_add_pmu_nodes(const VirtMachineState *vms) { - ARMCPU *armcpu =3D ARM_CPU(first_cpu); + ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; MachineState *ms =3D MACHINE(vms); =20 @@ -1652,7 +1652,7 @@ void virt_machine_done(Notifier *notifier, void *data) VirtMachineState *vms =3D container_of(notifier, VirtMachineState, machine_done); MachineState *ms =3D MACHINE(vms); - ARMCPU *cpu =3D ARM_CPU(first_cpu); + ARMCPU *cpu =3D ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)); struct arm_boot_info *info =3D &vms->bootinfo; AddressSpace *as =3D arm_boot_address_space(cpu, info); =20 @@ -1957,9 +1957,11 @@ static void virt_cpu_post_init(VirtMachineState *vms= , MemoryRegion *sysmem) bool aarch64, pmu, steal_time; CPUState *cpu; =20 - aarch64 =3D object_property_get_bool(OBJECT(first_cpu), "aarch64", NUL= L); - pmu =3D object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); - steal_time =3D object_property_get_bool(OBJECT(first_cpu), + aarch64 =3D object_property_get_bool(OBJECT(qemu_get_cpu(0, TYPE_ARM_C= PU)), + "aarch64", NULL); + pmu =3D object_property_get_bool(OBJECT(qemu_get_cpu(0, TYPE_ARM_CPU)), + "pmu", NULL); + steal_time =3D object_property_get_bool(OBJECT(qemu_get_cpu(0, TYPE_AR= M_CPU)), "kvm-steal-time", NULL); =20 if (kvm_enabled()) { @@ -2001,7 +2003,7 @@ static void virt_cpu_post_init(VirtMachineState *vms,= MemoryRegion *sysmem) } else { if (aarch64 && vms->highmem) { int requested_pa_size =3D 64 - clz64(vms->highest_gpa); - int pamax =3D arm_pamax(ARM_CPU(first_cpu)); + int pamax =3D arm_pamax(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU))= ); =20 if (pamax < requested_pa_size) { error_report("VCPU supports less PA bits (%d) than " @@ -2324,7 +2326,8 @@ static void machvirt_init(MachineState *machine) vms->bootinfo.skip_dtb_autoload =3D true; vms->bootinfo.firmware_loaded =3D firmware_loaded; vms->bootinfo.psci_conduit =3D vms->psci_conduit; - arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &vms->bootinfo); =20 vms->machine_done.notify =3D virt_machine_done; qemu_add_machine_init_done_notifier(&vms->machine_done); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 8dc2ea83a9..90a052b841 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -349,7 +349,8 @@ static void zynq_init(MachineState *machine) zynq_binfo.board_setup_addr =3D BOARD_SETUP_ADDR; zynq_binfo.write_board_setup =3D zynq_write_board_setup; =20 - arm_load_kernel(ARM_CPU(first_cpu), machine, &zynq_binfo); + arm_load_kernel(ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)), machine, + &zynq_binfo); } =20 static void zynq_machine_class_init(ObjectClass *oc, void *data) diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c index 2d8e41ab8a..25dffccb99 100644 --- a/target/arm/arch_dump.c +++ b/target/arm/arch_dump.c @@ -395,11 +395,11 @@ int cpu_get_dump_info(ArchDumpInfo *info, GuestPhysBlock *block; hwaddr lowest_addr =3D ULLONG_MAX; =20 - if (first_cpu =3D=3D NULL) { + if (qemu_get_cpu(0, TYPE_ARM_CPU) =3D=3D NULL) { return -1; } =20 - cpu =3D ARM_CPU(first_cpu); + cpu =3D ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)); env =3D &cpu->env; =20 /* Take a best guess at the phys_base. If we get it wrong then crash @@ -443,7 +443,7 @@ int cpu_get_dump_info(ArchDumpInfo *info, =20 ssize_t cpu_get_note_size(int class, int machine, int nr_cpus) { - ARMCPU *cpu =3D ARM_CPU(first_cpu); + ARMCPU *cpu =3D ARM_CPU(qemu_get_cpu(0, TYPE_ARM_CPU)); size_t note_size; =20 if (class =3D=3D ELFCLASS64) { --=20 2.41.0