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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id v16-20020a50a450000000b0053635409213sm4561534edb.34.2023.10.19.06.17.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:17:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697721445; x=1698326245; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JX2lUXAyh6ZsGrvkFyzvjDLVRX8aZs36JFh58t9E+n0=; b=MII+XHSHBxeMjXaJFVjZCHdTTof1TqDYQZfHaeR3ANcCmzpbWIkE6IpXYHFvpGNssS hfv8G3dlfP3/U5nCgw+hjec1tlfgp6pOPYeBAXTQ5ITKk5DqZkepwpaOX7HAfZf4rGaQ wbpW0kWTByo4QbzggfFpmBIyvJB1KHtCmrytvvRcYiT/tfTwOhNfXLFGY/1vW6lIQ8Kq T5C7GPcko2bFleASNSIg21qk8+BMws6uRuYRZnlq2BuzIauhNBOBSoivrOr6+vzFONGj aneGiG8x+hHZ+lHtqSs4EW67hvrsDYRkfaz2B3NXFXUi04dtinZbNn7/UZ3SLGzQRXqL YpZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697721445; x=1698326245; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JX2lUXAyh6ZsGrvkFyzvjDLVRX8aZs36JFh58t9E+n0=; b=Dg5p7MY5GLoKawMywcFAAAZbT20iMFS54KQoGrp4ZKET6gvjWMBb7m6Enz1oQr/NhM mY3qQQ3oylCYUPetfTS62uIKJMASfCHsm7smaAHrXKUyFNPEfuJ1XkOXkACXRdVP3KZE RxqXBDOMx8Zv+isqLqvc/m3RiJtuU2nfqh2QrN6SwG5GChzgkhDwQZXh/VmqQ0bMjMZO OGsOK/qHUQPN4P3IrkHBT0qZZVlwIs7KbG2z5Wxd9W7blK0kTEWBYLC5X58VBeXHgJnG ywpby1xa5yB1Gmj8CFxKkGZwd1AfvUA3lDs3eYOAztVShfnKKBb85SYPCT7EhaWzZzWP jYpg== X-Gm-Message-State: AOJu0YyjuCXF7ufyhqIDlyQDOCmbSD6N/0GT8l93cYqlBBXR0QP9Cda6 qFL7jH7pgITYcERIo1z/VU7h4LlNITSAXjWJFkPIVw== X-Google-Smtp-Source: AGHT+IGO7/CJRHAmnT6b8nNG8N9RIoTAtLevp1mw5u5+fr5eQ06a9vIiruvOFPu+zpKQ+cgd+Xcseg== X-Received: by 2002:a05:6402:11c8:b0:53d:f4f5:7ab0 with SMTP id j8-20020a05640211c800b0053df4f57ab0mr1471516edw.40.1697721445322; Thu, 19 Oct 2023 06:17:25 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , LIU Zhiwei , Nicholas Piggin , qemu-ppc@nongnu.org, David Gibson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Daniel Henrique Barboza , Harsh Prateek Bora , Thomas Huth , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 5/7] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:16:45 +0200 Message-ID: <20231019131647.19690-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131647.19690-1-philmd@linaro.org> References: <20231019131647.19690-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1697721515279100001 There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when !=3D sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Er= ror **errp) =20 name =3D g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); =20 /* Map the ICP registers for each thread */ for (i =3D 0; i < chip->nr_cores; i++) { --=20 2.41.0